esp32s2/tie.h: Run the file though detab.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
parent
6d246eb18f
commit
a7d8d9dd98
@ -37,20 +37,20 @@
|
|||||||
* Pre-processor Definitions
|
* Pre-processor Definitions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#define XCHAL_CP_NUM 0 /* number of coprocessors */
|
#define XCHAL_CP_NUM 0 /* number of coprocessors */
|
||||||
#define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
|
#define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
|
||||||
#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
|
#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
|
||||||
#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
|
#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
|
||||||
|
|
||||||
/* Save area for non-coprocessor optional and custom (TIE) state: */
|
/* Save area for non-coprocessor optional and custom (TIE) state: */
|
||||||
|
|
||||||
#define XCHAL_NCP_SA_SIZE 4
|
#define XCHAL_NCP_SA_SIZE 4
|
||||||
#define XCHAL_NCP_SA_ALIGN 4
|
#define XCHAL_NCP_SA_ALIGN 4
|
||||||
|
|
||||||
/* Total save area for optional and custom state (NCP + CPn): */
|
/* Total save area for optional and custom state (NCP + CPn): */
|
||||||
|
|
||||||
#define XCHAL_TOTAL_SA_SIZE 16 /* with 16-byte align padding */
|
#define XCHAL_TOTAL_SA_SIZE 16 /* with 16-byte align padding */
|
||||||
#define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
|
#define XCHAL_TOTAL_SA_ALIGN 4 /* actual minimum alignment */
|
||||||
|
|
||||||
/* Detailed contents of save areas.
|
/* Detailed contents of save areas.
|
||||||
* NOTE: caller must define the XCHAL_SA_REG macro (not defined here)
|
* NOTE: caller must define the XCHAL_SA_REG macro (not defined here)
|
||||||
@ -91,41 +91,41 @@
|
|||||||
* ...what you want to expand...
|
* ...what you want to expand...
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define XCHAL_NCP_SA_NUM 1
|
#define XCHAL_NCP_SA_NUM 1
|
||||||
#define XCHAL_NCP_SA_LIST(s) \
|
#define XCHAL_NCP_SA_LIST(s) \
|
||||||
XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0)
|
XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0)
|
||||||
|
|
||||||
#define XCHAL_CP0_SA_NUM 0
|
#define XCHAL_CP0_SA_NUM 0
|
||||||
#define XCHAL_CP0_SA_LIST(s) /* empty */
|
#define XCHAL_CP0_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP1_SA_NUM 0
|
#define XCHAL_CP1_SA_NUM 0
|
||||||
#define XCHAL_CP1_SA_LIST(s) /* empty */
|
#define XCHAL_CP1_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP2_SA_NUM 0
|
#define XCHAL_CP2_SA_NUM 0
|
||||||
#define XCHAL_CP2_SA_LIST(s) /* empty */
|
#define XCHAL_CP2_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP3_SA_NUM 0
|
#define XCHAL_CP3_SA_NUM 0
|
||||||
#define XCHAL_CP3_SA_LIST(s) /* empty */
|
#define XCHAL_CP3_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP4_SA_NUM 0
|
#define XCHAL_CP4_SA_NUM 0
|
||||||
#define XCHAL_CP4_SA_LIST(s) /* empty */
|
#define XCHAL_CP4_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP5_SA_NUM 0
|
#define XCHAL_CP5_SA_NUM 0
|
||||||
#define XCHAL_CP5_SA_LIST(s) /* empty */
|
#define XCHAL_CP5_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP6_SA_NUM 0
|
#define XCHAL_CP6_SA_NUM 0
|
||||||
#define XCHAL_CP6_SA_LIST(s) /* empty */
|
#define XCHAL_CP6_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
#define XCHAL_CP7_SA_NUM 0
|
#define XCHAL_CP7_SA_NUM 0
|
||||||
#define XCHAL_CP7_SA_LIST(s) /* empty */
|
#define XCHAL_CP7_SA_LIST(s) /* empty */
|
||||||
|
|
||||||
/* Byte length of instruction from its first nibble (op0 field), per FLIX. */
|
/* Byte length of instruction from its first nibble (op0 field), per FLIX. */
|
||||||
|
|
||||||
#define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
|
#define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
|
||||||
|
|
||||||
/* Byte length of instruction from its first byte, per FLIX. */
|
/* Byte length of instruction from its first byte, per FLIX. */
|
||||||
|
|
||||||
#define XCHAL_BYTE0_FORMAT_LENGTHS \
|
#define XCHAL_BYTE0_FORMAT_LENGTHS \
|
||||||
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
||||||
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
||||||
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3,\
|
||||||
|
Loading…
x
Reference in New Issue
Block a user