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Merged nuttx/arch/master into atmega2560

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This commit is contained in:
Dimitry Kloper 2015-12-29 21:54:06 +02:00
commit a7fea840be
15 changed files with 286 additions and 298 deletions
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5
arch/avr/include/atmega/irq.h
View File

@ -146,7 +146,7 @@
# define ATMEGA_IRQ_INT4 6 /* 0x000A INT4 External Interrupt Request 4 */
# define ATMEGA_IRQ_INT5 7 /* 0x000C INT5 External Interrupt Request 5 */
# define ATMEGA_IRQ_INT6 8 /* 0x000E INT6 External Interrupt Request 6 */
# define ATMEGA_IRQ_INT7 9 /* 0x0010 INT7 External Interrupt Request 7 */
# define ATMEGA_IRQ_INT7 9 /* 0x0010 INT7 External Interrupt Request 7 */
# define ATMEGA_IRQ_PCINT0 10 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
# define ATMEGA_IRQ_PCINT1 11 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
# define ATMEGA_IRQ_PCINT2 12 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
@ -194,7 +194,7 @@
# define ATMEGA_IRQ_USART2_TXC 54 /* 0x006A USART2 TX USART2 Tx Complete */
# define ATMEGA_IRQ_USART3_RXC 55 /* 0x006C USART3 RX USART3 Rx Complete */
# define ATMEGA_IRQ_USART3_UDRE 56 /* 0x006E USART3 UDRE USART3 Data Register Empty */
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define NR_IRQS 58
# define ATMEGA_PC_SIZE 24
@ -239,4 +239,3 @@ extern "C"
#endif
#endif /* __ARCH_AVR_INCLUDE_ATMEGA_IRQ_H */

9
arch/avr/include/avr/irq.h
View File

@ -94,7 +94,7 @@
#define REG_PC0 35 /* PC */
#define REG_PC1 36
#if ATMEGA_PC_SIZE > 16
#define REG_PC2 37
# define REG_PC2 37
#endif
/****************************************************************************
@ -166,9 +166,9 @@ static inline irqstate_t irqsave(void)
asm volatile
(
"\tin %0, __SREG__\n"
"\tcli\n"
: "=&r" (sreg) ::
);
"\tcli\n"
: "=&r" (sreg) ::
);
return sreg;
}
@ -204,4 +204,3 @@ extern "C"
#endif
#endif /* __ARCH_AVR_INCLUDE_AVR_IRQ_H */

1
arch/avr/src/Makefile
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@ -183,4 +183,3 @@ endif
$(call DELFILE, .depend)
-include Make.dep

2
arch/avr/src/atmega/Kconfig
View File

@ -39,7 +39,6 @@ config AVR_USART1
endmenu # ATMega Peripheral Selections
menu "Low level UART driver options"
depends on AVR_USART0 || AVR_USART1
@ -54,4 +53,3 @@ config SERIAL_TERMIOS
endmenu
endif

462
arch/avr/src/atmega/atmega_head.S
View File

@ -40,11 +40,11 @@
#include <nuttx/config.h>
#include <avr/io.h>
#include <avr/common.h>
#include <avr/common.h>
#include <avr/sfr_defs.h>
#include <arch/irq.h>
/****************************************************************************
* Pre-processor definitions
****************************************************************************/
@ -115,97 +115,97 @@
.global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
.global atmega_int0 /* External interrupt request 0 */
.global atmega_int1 /* External interrupt request 1 */
.global atmega_int2 /* External interrupt request 2 */
.global atmega_pcint0 /* Pin change interrupt request 0 */
.global atmega_pcint1 /* Pin change interrupt request 1 */
.global atmega_pcint2 /* Pin change interrupt request 2 */
.global atmega_pcint3 /* Pin change interrupt request 3 */
.global atmega_wdt /* Watchdog time-out interrupt */
.global atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
.global atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
.global atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
.global atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
.global atmega_spi /* STC SPI serial transfer complete */
.global atmega_u0rx /* USART0 RX complete */
.global atmega_u0dre /* USART0 data register empty */
.global atmega_u0tx /* USART0 TX complete */
.global atmega_anacomp /* ANALOG COMP analog comparator */
.global atmega_adc /* ADC conversion complete */
.global atmega_ee /* EEPROM ready */
.global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */
.global atmega_u1rx /* USART1 RX complete */
.global atmega_u1dre /* USART1 data register empty */
.global atmega_u1tx /* USART1 TX complete */
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
.global atmega_int0 /* External interrupt request 0 */
.global atmega_int1 /* External interrupt request 1 */
.global atmega_int2 /* External interrupt request 2 */
.global atmega_pcint0 /* Pin change interrupt request 0 */
.global atmega_pcint1 /* Pin change interrupt request 1 */
.global atmega_pcint2 /* Pin change interrupt request 2 */
.global atmega_pcint3 /* Pin change interrupt request 3 */
.global atmega_wdt /* Watchdog time-out interrupt */
.global atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
.global atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
.global atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
.global atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
.global atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
.global atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
.global atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
.global atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
.global atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
.global atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
.global atmega_spi /* STC SPI serial transfer complete */
.global atmega_u0rx /* USART0 RX complete */
.global atmega_u0dre /* USART0 data register empty */
.global atmega_u0tx /* USART0 TX complete */
.global atmega_anacomp /* ANALOG COMP analog comparator */
.global atmega_adc /* ADC conversion complete */
.global atmega_ee /* EEPROM ready */
.global atmega_twi /* TWI two-wire serial interface */
.global atmega_spmrdy /* Store program memory ready */
.global atmega_u1rx /* USART1 RX complete */
.global atmega_u1dre /* USART1 data register empty */
.global atmega_u1tx /* USART1 TX complete */
.global atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
.global atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
.global atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
.global atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA2560)
.global atmega_int0 /* 0x0002 INT0 External Interrupt Request 0 */
.global atmega_int1 /* 0x0004 INT1 External Interrupt Request 1 */
.global atmega_int2 /* 0x0006 INT2 External Interrupt Request 2 */
.global atmega_int3 /* 0x0008 INT3 External Interrupt Request 3 */
.global atmega_int4 /* 0x000A INT4 External Interrupt Request 4 */
.global atmega_int5 /* 0x000C INT5 External Interrupt Request 5 */
.global atmega_int6 /* 0x000E INT6 External Interrupt Request 6 */
.global atmega_int7 /* 0x0010 INT7 External Interrupt Request 7 */
.global atmega_pcint0 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
.global atmega_pcint1 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
.global atmega_pcint2 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
.global atmega_wdt /* 0x0018 WDT Watchdog Time-out Interrupt */
.global atmega_tim2_compa /* 0x001A TIMER2 COMPA Timer/Counter2 Compare Match A */
.global atmega_tim2_compb /* 0x001C TIMER2 COMPB Timer/Counter2 Compare Match B */
.global atmega_tim2_ovf /* 0x001E TIMER2 OVF Timer/Counter2 Overflow */
.global atmega_tim1_capt /* 0x0020 TIMER1 CAPT Timer/Counter1 Capture Event */
.global atmega_tim1_compa /* 0x0022 TIMER1 COMPA Timer/Counter1 Compare Match A */
.global atmega_tim1_compb /* 0x0024 TIMER1 COMPB Timer/Counter1 Compare Match B */
.global atmega_tim1_compc /* 0x0026 TIMER1 COMPC Timer/Counter1 Compare Match C */
.global atmega_tim1_ovf /* 0x0028 TIMER1 OVF Timer/Counter1 Overflow */
.global atmega_tim0_compa /* 0x002A TIMER0 COMPA Timer/Counter0 Compare Match A */
.global atmega_tim0_compb /* 0x002C TIMER0 COMPB Timer/Counter0 Compare match B */
.global atmega_tim0_ovf /* 0x002E TIMER0 OVF Timer/Counter0 Overflow */
.global atmega_spi_stc /* 0x0030 SPI, STC SPI Serial Transfer Complete */
.global atmega_usart0_rxc /* 0x0032 USART0 RX USART0 Rx Complete */
.global atmega_usart0_udre /* 0x0034 USART0 UDRE USART0 Data Register Empty */
.global atmega_usart0_txc /* 0x0036 USART0 TX USART0 Tx Complete */
.global atmega_ana_comp /* 0x0038 ANALOG COMP Analog Comparator */
.global atmega_adc /* 0x003A ADC ADC Conversion Complete */
.global atmega_ee_rdy /* 0x003C EE READY EEPROM Ready */
.global atmega_tim3_capt /* 0x003E TIMER3 CAPT Timer/Counter3 Capture Event */
.global atmega_tim3_compa /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
.global atmega_tim3_compb /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
.global atmega_tim3_compc /* 0x0044 TIMER3 COMPC Timer/Counter3 Compare Match C */
.global atmega_tim3_ovf /* 0x0046 TIMER3 OVF Timer/Counter3 Overflow */
.global atmega_usart1_rxc /* 0x0048 USART1 RX USART1 Rx Complete */
.global atmega_usart1_udre /* 0x004A USART1 UDRE USART1 Data Register Empty */
.global atmega_usart1_txc /* 0x004C USART1 TX USART1 Tx Complete */
.global atmega_twi /* 0x004E TWI 2-wire Serial Interface */
.global atmega_spm_rdy /* 0x0050 SPM READY Store Program Memory Ready */
.global atmega_tim4_capt /* 0x0052 TIMER4 CAPT Timer/Counter4 Capture Event */
.global atmega_tim4_compa /* 0x0054 TIMER4 COMPA Timer/Counter4 Compare Match A */
.global atmega_tim4_compb /* 0x0056 TIMER4 COMPB Timer/Counter4 Compare Match B */
.global atmega_tim4_compc /* 0x0058 TIMER4 COMPC Timer/Counter4 Compare Match C */
.global atmega_tim4_ovf /* 0x005A TIMER4 OVF Timer/Counter4 Overflow */
.global atmega_tim5_capt /* 0x005C TIMER5 CAPT Timer/Counter5 Capture Event */
.global atmega_tim5_compa /* 0x005E TIMER5 COMPA Timer/Counter5 Compare Match A */
.global atmega_tim5_compb /* 0x0060 TIMER5 COMPB Timer/Counter5 Compare Match B */
.global atmega_tim5_compc /* 0x0062 TIMER5 COMPC Timer/Counter5 Compare Match C */
.global atmega_tim5_ovf /* 0x0064 TIMER5 OVF Timer/Counter5 Overflow */
.global atmega_usart2_rxc /* 0x0066 USART2 RX USART2 Rx Complete */
.global atmega_usart2_udre /* 0x0068 USART2 UDRE USART2 Data Register Empty */
.global atmega_usart2_txc /* 0x006A USART2 TX USART2 Tx Complete */
.global atmega_usart3_rxc /* 0x006C USART3 RX USART3 Rx Complete */
.global atmega_usart3_udre /* 0x006E USART3 UDRE USART3 Data Register Empty */
.global atmega_usart3_txc /* 0x0070 USART3 TX USART3 Tx Complete */
.global atmega_int0 /* 0x0002 INT0 External Interrupt Request 0 */
.global atmega_int1 /* 0x0004 INT1 External Interrupt Request 1 */
.global atmega_int2 /* 0x0006 INT2 External Interrupt Request 2 */
.global atmega_int3 /* 0x0008 INT3 External Interrupt Request 3 */
.global atmega_int4 /* 0x000A INT4 External Interrupt Request 4 */
.global atmega_int5 /* 0x000C INT5 External Interrupt Request 5 */
.global atmega_int6 /* 0x000E INT6 External Interrupt Request 6 */
.global atmega_int7 /* 0x0010 INT7 External Interrupt Request 7 */
.global atmega_pcint0 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
.global atmega_pcint1 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
.global atmega_pcint2 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
.global atmega_wdt /* 0x0018 WDT Watchdog Time-out Interrupt */
.global atmega_tim2_compa /* 0x001A TIMER2 COMPA Timer/Counter2 Compare Match A */
.global atmega_tim2_compb /* 0x001C TIMER2 COMPB Timer/Counter2 Compare Match B */
.global atmega_tim2_ovf /* 0x001E TIMER2 OVF Timer/Counter2 Overflow */
.global atmega_tim1_capt /* 0x0020 TIMER1 CAPT Timer/Counter1 Capture Event */
.global atmega_tim1_compa /* 0x0022 TIMER1 COMPA Timer/Counter1 Compare Match A */
.global atmega_tim1_compb /* 0x0024 TIMER1 COMPB Timer/Counter1 Compare Match B */
.global atmega_tim1_compc /* 0x0026 TIMER1 COMPC Timer/Counter1 Compare Match C */
.global atmega_tim1_ovf /* 0x0028 TIMER1 OVF Timer/Counter1 Overflow */
.global atmega_tim0_compa /* 0x002A TIMER0 COMPA Timer/Counter0 Compare Match A */
.global atmega_tim0_compb /* 0x002C TIMER0 COMPB Timer/Counter0 Compare match B */
.global atmega_tim0_ovf /* 0x002E TIMER0 OVF Timer/Counter0 Overflow */
.global atmega_spi_stc /* 0x0030 SPI, STC SPI Serial Transfer Complete */
.global atmega_usart0_rxc /* 0x0032 USART0 RX USART0 Rx Complete */
.global atmega_usart0_udre /* 0x0034 USART0 UDRE USART0 Data Register Empty */
.global atmega_usart0_txc /* 0x0036 USART0 TX USART0 Tx Complete */
.global atmega_ana_comp /* 0x0038 ANALOG COMP Analog Comparator */
.global atmega_adc /* 0x003A ADC ADC Conversion Complete */
.global atmega_ee_rdy /* 0x003C EE READY EEPROM Ready */
.global atmega_tim3_capt /* 0x003E TIMER3 CAPT Timer/Counter3 Capture Event */
.global atmega_tim3_compa /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
.global atmega_tim3_compb /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
.global atmega_tim3_compc /* 0x0044 TIMER3 COMPC Timer/Counter3 Compare Match C */
.global atmega_tim3_ovf /* 0x0046 TIMER3 OVF Timer/Counter3 Overflow */
.global atmega_usart1_rxc /* 0x0048 USART1 RX USART1 Rx Complete */
.global atmega_usart1_udre /* 0x004A USART1 UDRE USART1 Data Register Empty */
.global atmega_usart1_txc /* 0x004C USART1 TX USART1 Tx Complete */
.global atmega_twi /* 0x004E TWI 2-wire Serial Interface */
.global atmega_spm_rdy /* 0x0050 SPM READY Store Program Memory Ready */
.global atmega_tim4_capt /* 0x0052 TIMER4 CAPT Timer/Counter4 Capture Event */
.global atmega_tim4_compa /* 0x0054 TIMER4 COMPA Timer/Counter4 Compare Match A */
.global atmega_tim4_compb /* 0x0056 TIMER4 COMPB Timer/Counter4 Compare Match B */
.global atmega_tim4_compc /* 0x0058 TIMER4 COMPC Timer/Counter4 Compare Match C */
.global atmega_tim4_ovf /* 0x005A TIMER4 OVF Timer/Counter4 Overflow */
.global atmega_tim5_capt /* 0x005C TIMER5 CAPT Timer/Counter5 Capture Event */
.global atmega_tim5_compa /* 0x005E TIMER5 COMPA Timer/Counter5 Compare Match A */
.global atmega_tim5_compb /* 0x0060 TIMER5 COMPB Timer/Counter5 Compare Match B */
.global atmega_tim5_compc /* 0x0062 TIMER5 COMPC Timer/Counter5 Compare Match C */
.global atmega_tim5_ovf /* 0x0064 TIMER5 OVF Timer/Counter5 Overflow */
.global atmega_usart2_rxc /* 0x0066 USART2 RX USART2 Rx Complete */
.global atmega_usart2_udre /* 0x0068 USART2 UDRE USART2 Data Register Empty */
.global atmega_usart2_txc /* 0x006A USART2 TX USART2 Tx Complete */
.global atmega_usart3_rxc /* 0x006C USART3 RX USART3 Rx Complete */
.global atmega_usart3_udre /* 0x006E USART3 UDRE USART3 Data Register Empty */
.global atmega_usart3_txc /* 0x0070 USART3 TX USART3 Tx Complete */
#else
#error "Unrecognized chip"
#endif
@ -229,134 +229,134 @@
.section .vectors, "ax", @progbits
.func vectortab
vectortab:
jmp __start /* 0: Vector 0 is the reset vector */
jmp __start /* 0: Vector 0 is the reset vector */
#if defined(CONFIG_ARCH_CHIP_ATMEGA128)
vector atmega_int0 /* 1: External interrupt request 0 */
vector atmega_int1 /* 2: External interrupt request 1 */
vector atmega_int2 /* 3: External interrupt request 2 */
vector atmega_int3 /* 4: External interrupt request 3 */
vector atmega_int4 /* 5: External interrupt request 4 */
vector atmega_int5 /* 6 : External interrupt request 5 */
vector atmega_int6 /* 7: External interrupt request 6 */
vector atmega_int7 /* 8: External interrupt request 7 */
vector atmega_t2comp /* 9: TIMER2 COMP timer/counter2 compare match */
vector atmega_t2ovf /* 10: TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* 11: TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* 12: TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* 13: TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* 14: TIMER1 OVF timer/counter1 overflow */
vector atmega_t0comp /* 15: TIMER0 COMP timer/counter0 compare match */
vector atmega_t0ovf /* 16: TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* 17: STC SPI serial transfer complete */
vector atmega_u0rx /* 18: USART0 RX complete */
vector atmega_u0dre /* 19: USART0 data register empty */
vector atmega_u0tx /* 20: USART0 TX complete */
vector atmega_adc /* 21: ADC conversion complete */
vector atmega_ee /* 22: EEPROM ready */
vector atmega_anacomp /* 23: ANALOG COMP analog comparator */
vector atmega_t1compc /* 24: TIMER1 COMPC timer/countre1 compare match c */
vector atmega_t3capt /* 25: TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* 26: TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* 27: TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3compc /* 28: TIMER3 COMPC timer/counter3 compare match c */
vector atmega_t3ovf /* 29: TIMER3 OVF timer/counter3 overflow */
vector atmega_u1rx /* 30: USART1 RX complete */
vector atmega_u1dre /* 31: USART1 data register empty */
vector atmega_u1tx /* 32: USART1 TX complete */
vector atmega_twi /* 33: TWI two-wire serial interface */
vector atmega_spmrdy /* 34: Store program memory ready */
vector atmega_int0 /* 1: External interrupt request 0 */
vector atmega_int1 /* 2: External interrupt request 1 */
vector atmega_int2 /* 3: External interrupt request 2 */
vector atmega_int3 /* 4: External interrupt request 3 */
vector atmega_int4 /* 5: External interrupt request 4 */
vector atmega_int5 /* 6 : External interrupt request 5 */
vector atmega_int6 /* 7: External interrupt request 6 */
vector atmega_int7 /* 8: External interrupt request 7 */
vector atmega_t2comp /* 9: TIMER2 COMP timer/counter2 compare match */
vector atmega_t2ovf /* 10: TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* 11: TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* 12: TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* 13: TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* 14: TIMER1 OVF timer/counter1 overflow */
vector atmega_t0comp /* 15: TIMER0 COMP timer/counter0 compare match */
vector atmega_t0ovf /* 16: TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* 17: STC SPI serial transfer complete */
vector atmega_u0rx /* 18: USART0 RX complete */
vector atmega_u0dre /* 19: USART0 data register empty */
vector atmega_u0tx /* 20: USART0 TX complete */
vector atmega_adc /* 21: ADC conversion complete */
vector atmega_ee /* 22: EEPROM ready */
vector atmega_anacomp /* 23: ANALOG COMP analog comparator */
vector atmega_t1compc /* 24: TIMER1 COMPC timer/countre1 compare match c */
vector atmega_t3capt /* 25: TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* 26: TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* 27: TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3compc /* 28: TIMER3 COMPC timer/counter3 compare match c */
vector atmega_t3ovf /* 29: TIMER3 OVF timer/counter3 overflow */
vector atmega_u1rx /* 30: USART1 RX complete */
vector atmega_u1dre /* 31: USART1 data register empty */
vector atmega_u1tx /* 32: USART1 TX complete */
vector atmega_twi /* 33: TWI two-wire serial interface */
vector atmega_spmrdy /* 34: Store program memory ready */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
vector atmega_int0 /* External interrupt request 0 */
vector atmega_int1 /* External interrupt request 1 */
vector atmega_int2 /* External interrupt request 2 */
vector atmega_pcint0 /* Pin change interrupt request 0 */
vector atmega_pcint1 /* Pin change interrupt request 1 */
vector atmega_pcint2 /* Pin change interrupt request 2 */
vector atmega_pcint3 /* Pin change interrupt request 3 */
vector atmega_wdt /* Watchdog time-out interrupt */
vector atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
vector atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
vector atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
vector atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
vector atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
vector atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* STC SPI serial transfer complete */
vector atmega_u0rx /* USART0 RX complete */
vector atmega_u0dre /* USART0 data register empty */
vector atmega_u0tx /* USART0 TX complete */
vector atmega_anacomp /* ANALOG COMP analog comparator */
vector atmega_adc /* ADC conversion complete */
vector atmega_ee /* EEPROM ready */
vector atmega_twi /* TWI two-wire serial interface */
vector atmega_spmrdy /* Store program memory ready */
vector atmega_u1rx /* USART1 RX complete */
vector atmega_u1dre /* USART1 data register empty */
vector atmega_u1tx /* USART1 TX complete */
vector atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
vector atmega_int0 /* External interrupt request 0 */
vector atmega_int1 /* External interrupt request 1 */
vector atmega_int2 /* External interrupt request 2 */
vector atmega_pcint0 /* Pin change interrupt request 0 */
vector atmega_pcint1 /* Pin change interrupt request 1 */
vector atmega_pcint2 /* Pin change interrupt request 2 */
vector atmega_pcint3 /* Pin change interrupt request 3 */
vector atmega_wdt /* Watchdog time-out interrupt */
vector atmega_t2compa /* TIMER2 COMPA timer/counter2 compare match */
vector atmega_t2compb /* TIMER2 COMPB timer/counter2 compare match */
vector atmega_t2ovf /* TIMER2 OVF timer/counter2 overflow */
vector atmega_t1capt /* TIMER1 CAPT timer/counter1 capture event */
vector atmega_t1compa /* TIMER1 COMPA timer/counter1 compare match a */
vector atmega_t1compb /* TIMER1 COMPB timer/counter1 compare match b */
vector atmega_t1ovf /* TIMER1 OVF timer/counter1 overflow */
vector atmega_t0compa /* TIMER0 COMPA timer/counter0 compare match */
vector atmega_t0compb /* TIMER0 COMPB timer/counter0 compare match */
vector atmega_t0ovf /* TIMER0 OVF timer/counter0 overflow */
vector atmega_spi /* STC SPI serial transfer complete */
vector atmega_u0rx /* USART0 RX complete */
vector atmega_u0dre /* USART0 data register empty */
vector atmega_u0tx /* USART0 TX complete */
vector atmega_anacomp /* ANALOG COMP analog comparator */
vector atmega_adc /* ADC conversion complete */
vector atmega_ee /* EEPROM ready */
vector atmega_twi /* TWI two-wire serial interface */
vector atmega_spmrdy /* Store program memory ready */
vector atmega_u1rx /* USART1 RX complete */
vector atmega_u1dre /* USART1 data register empty */
vector atmega_u1tx /* USART1 TX complete */
vector atmega_t3capt /* TIMER3 CAPT timer/counter3 capture event */
vector atmega_t3compa /* TIMER3 COMPA timer/counter3 compare match a */
vector atmega_t3compb /* TIMER3 COMPB timer/counter3 compare match b */
vector atmega_t3ovf /* TIMER3 OVF timer/counter3 overflow */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA2560)
vector atmega_int0 /* 0x0002 INT0 External Interrupt Request 0 */
vector atmega_int1 /* 0x0004 INT1 External Interrupt Request 1 */
vector atmega_int2 /* 0x0006 INT2 External Interrupt Request 2 */
vector atmega_int3 /* 0x0008 INT3 External Interrupt Request 3 */
vector atmega_int4 /* 0x000A INT4 External Interrupt Request 4 */
vector atmega_int5 /* 0x000C INT5 External Interrupt Request 5 */
vector atmega_int6 /* 0x000E INT6 External Interrupt Request 6 */
vector atmega_int7 /* 0x0010 INT7 External Interrupt Request 7 */
vector atmega_pcint0 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
vector atmega_pcint1 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
vector atmega_pcint2 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
vector atmega_wdt /* 0x0018 WDT Watchdog Time-out Interrupt */
vector atmega_tim2_compa /* 0x001A TIMER2 COMPA Timer/Counter2 Compare Match A */
vector atmega_tim2_compb /* 0x001C TIMER2 COMPB Timer/Counter2 Compare Match B */
vector atmega_tim2_ovf /* 0x001E TIMER2 OVF Timer/Counter2 Overflow */
vector atmega_tim1_capt /* 0x0020 TIMER1 CAPT Timer/Counter1 Capture Event */
vector atmega_tim1_compa /* 0x0022 TIMER1 COMPA Timer/Counter1 Compare Match A */
vector atmega_tim1_compb /* 0x0024 TIMER1 COMPB Timer/Counter1 Compare Match B */
vector atmega_tim1_compc /* 0x0026 TIMER1 COMPC Timer/Counter1 Compare Match C */
vector atmega_tim1_ovf /* 0x0028 TIMER1 OVF Timer/Counter1 Overflow */
vector atmega_tim0_compa /* 0x002A TIMER0 COMPA Timer/Counter0 Compare Match A */
vector atmega_tim0_compb /* 0x002C TIMER0 COMPB Timer/Counter0 Compare match B */
vector atmega_tim0_ovf /* 0x002E TIMER0 OVF Timer/Counter0 Overflow */
vector atmega_spi_stc /* 0x0030 SPI, STC SPI Serial Transfer Complete */
vector atmega_usart0_rxc /* 0x0032 USART0 RX USART0 Rx Complete */
vector atmega_usart0_udre /* 0x0034 USART0 UDRE USART0 Data Register Empty */
vector atmega_usart0_txc /* 0x0036 USART0 TX USART0 Tx Complete */
vector atmega_ana_comp /* 0x0038 ANALOG COMP Analog Comparator */
vector atmega_adc /* 0x003A ADC ADC Conversion Complete */
vector atmega_ee_rdy /* 0x003C EE READY EEPROM Ready */
vector atmega_tim3_capt /* 0x003E TIMER3 CAPT Timer/Counter3 Capture Event */
vector atmega_tim3_compa /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
vector atmega_tim3_compb /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
vector atmega_tim3_compc /* 0x0044 TIMER3 COMPC Timer/Counter3 Compare Match C */
vector atmega_tim3_ovf /* 0x0046 TIMER3 OVF Timer/Counter3 Overflow */
vector atmega_usart1_rxc /* 0x0048 USART1 RX USART1 Rx Complete */
vector atmega_usart1_udre /* 0x004A USART1 UDRE USART1 Data Register Empty */
vector atmega_usart1_txc /* 0x004C USART1 TX USART1 Tx Complete */
vector atmega_twi /* 0x004E TWI 2-wire Serial Interface */
vector atmega_spm_rdy /* 0x0050 SPM READY Store Program Memory Ready */
vector atmega_tim4_capt /* 0x0052 TIMER4 CAPT Timer/Counter4 Capture Event */
vector atmega_tim4_compa /* 0x0054 TIMER4 COMPA Timer/Counter4 Compare Match A */
vector atmega_tim4_compb /* 0x0056 TIMER4 COMPB Timer/Counter4 Compare Match B */
vector atmega_tim4_compc /* 0x0058 TIMER4 COMPC Timer/Counter4 Compare Match C */
vector atmega_tim4_ovf /* 0x005A TIMER4 OVF Timer/Counter4 Overflow */
vector atmega_tim5_capt /* 0x005C TIMER5 CAPT Timer/Counter5 Capture Event */
vector atmega_tim5_compa /* 0x005E TIMER5 COMPA Timer/Counter5 Compare Match A */
vector atmega_tim5_compb /* 0x0060 TIMER5 COMPB Timer/Counter5 Compare Match B */
vector atmega_tim5_compc /* 0x0062 TIMER5 COMPC Timer/Counter5 Compare Match C */
vector atmega_tim5_ovf /* 0x0064 TIMER5 OVF Timer/Counter5 Overflow */
vector atmega_usart2_rxc /* 0x0066 USART2 RX USART2 Rx Complete */
vector atmega_usart2_udre /* 0x0068 USART2 UDRE USART2 Data Register Empty */
vector atmega_usart2_txc /* 0x006A USART2 TX USART2 Tx Complete */
vector atmega_usart3_rxc /* 0x006C USART3 RX USART3 Rx Complete */
vector atmega_usart3_udre /* 0x006E USART3 UDRE USART3 Data Register Empty */
vector atmega_usart3_txc /* 0x0070 USART3 TX USART3 Tx Complete */
vector atmega_int0 /* 0x0002 INT0 External Interrupt Request 0 */
vector atmega_int1 /* 0x0004 INT1 External Interrupt Request 1 */
vector atmega_int2 /* 0x0006 INT2 External Interrupt Request 2 */
vector atmega_int3 /* 0x0008 INT3 External Interrupt Request 3 */
vector atmega_int4 /* 0x000A INT4 External Interrupt Request 4 */
vector atmega_int5 /* 0x000C INT5 External Interrupt Request 5 */
vector atmega_int6 /* 0x000E INT6 External Interrupt Request 6 */
vector atmega_int7 /* 0x0010 INT7 External Interrupt Request 7 */
vector atmega_pcint0 /* 0x0012 PCINT0 Pin Change Interrupt Req 0 */
vector atmega_pcint1 /* 0x0014 PCINT1 Pin Change Interrupt Req 1 */
vector atmega_pcint2 /* 0x0016 PCINT2 Pin Change Interrupt Req 2 */
vector atmega_wdt /* 0x0018 WDT Watchdog Time-out Interrupt */
vector atmega_tim2_compa /* 0x001A TIMER2 COMPA Timer/Counter2 Compare Match A */
vector atmega_tim2_compb /* 0x001C TIMER2 COMPB Timer/Counter2 Compare Match B */
vector atmega_tim2_ovf /* 0x001E TIMER2 OVF Timer/Counter2 Overflow */
vector atmega_tim1_capt /* 0x0020 TIMER1 CAPT Timer/Counter1 Capture Event */
vector atmega_tim1_compa /* 0x0022 TIMER1 COMPA Timer/Counter1 Compare Match A */
vector atmega_tim1_compb /* 0x0024 TIMER1 COMPB Timer/Counter1 Compare Match B */
vector atmega_tim1_compc /* 0x0026 TIMER1 COMPC Timer/Counter1 Compare Match C */
vector atmega_tim1_ovf /* 0x0028 TIMER1 OVF Timer/Counter1 Overflow */
vector atmega_tim0_compa /* 0x002A TIMER0 COMPA Timer/Counter0 Compare Match A */
vector atmega_tim0_compb /* 0x002C TIMER0 COMPB Timer/Counter0 Compare match B */
vector atmega_tim0_ovf /* 0x002E TIMER0 OVF Timer/Counter0 Overflow */
vector atmega_spi_stc /* 0x0030 SPI, STC SPI Serial Transfer Complete */
vector atmega_usart0_rxc /* 0x0032 USART0 RX USART0 Rx Complete */
vector atmega_usart0_udre /* 0x0034 USART0 UDRE USART0 Data Register Empty */
vector atmega_usart0_txc /* 0x0036 USART0 TX USART0 Tx Complete */
vector atmega_ana_comp /* 0x0038 ANALOG COMP Analog Comparator */
vector atmega_adc /* 0x003A ADC ADC Conversion Complete */
vector atmega_ee_rdy /* 0x003C EE READY EEPROM Ready */
vector atmega_tim3_capt /* 0x003E TIMER3 CAPT Timer/Counter3 Capture Event */
vector atmega_tim3_compa /* 0x0040 TIMER3 COMPA Timer/Counter3 Compare Match A */
vector atmega_tim3_compb /* 0x0042 TIMER3 COMPB Timer/Counter3 Compare Match B */
vector atmega_tim3_compc /* 0x0044 TIMER3 COMPC Timer/Counter3 Compare Match C */
vector atmega_tim3_ovf /* 0x0046 TIMER3 OVF Timer/Counter3 Overflow */
vector atmega_usart1_rxc /* 0x0048 USART1 RX USART1 Rx Complete */
vector atmega_usart1_udre /* 0x004A USART1 UDRE USART1 Data Register Empty */
vector atmega_usart1_txc /* 0x004C USART1 TX USART1 Tx Complete */
vector atmega_twi /* 0x004E TWI 2-wire Serial Interface */
vector atmega_spm_rdy /* 0x0050 SPM READY Store Program Memory Ready */
vector atmega_tim4_capt /* 0x0052 TIMER4 CAPT Timer/Counter4 Capture Event */
vector atmega_tim4_compa /* 0x0054 TIMER4 COMPA Timer/Counter4 Compare Match A */
vector atmega_tim4_compb /* 0x0056 TIMER4 COMPB Timer/Counter4 Compare Match B */
vector atmega_tim4_compc /* 0x0058 TIMER4 COMPC Timer/Counter4 Compare Match C */
vector atmega_tim4_ovf /* 0x005A TIMER4 OVF Timer/Counter4 Overflow */
vector atmega_tim5_capt /* 0x005C TIMER5 CAPT Timer/Counter5 Capture Event */
vector atmega_tim5_compa /* 0x005E TIMER5 COMPA Timer/Counter5 Compare Match A */
vector atmega_tim5_compb /* 0x0060 TIMER5 COMPB Timer/Counter5 Compare Match B */
vector atmega_tim5_compc /* 0x0062 TIMER5 COMPC Timer/Counter5 Compare Match C */
vector atmega_tim5_ovf /* 0x0064 TIMER5 OVF Timer/Counter5 Overflow */
vector atmega_usart2_rxc /* 0x0066 USART2 RX USART2 Rx Complete */
vector atmega_usart2_udre /* 0x0068 USART2 UDRE USART2 Data Register Empty */
vector atmega_usart2_txc /* 0x006A USART2 TX USART2 Tx Complete */
vector atmega_usart3_rxc /* 0x006C USART3 RX USART3 Rx Complete */
vector atmega_usart3_udre /* 0x006E USART3 UDRE USART3 Data Register Empty */
vector atmega_usart3_txc /* 0x0070 USART3 TX USART3 Tx Complete */
#else
#error "Unrecognized chip"
#endif
@ -375,9 +375,9 @@ __start:
#if defined(EIND)
/* set EIND to 0, just to be sure we are sane */
out _SFR_IO_ADDR(EIND), 0 // EIND = 0x3c
out _SFR_IO_ADDR(EIND), 0 // EIND = 0x3c
#endif /* EIND */
/* Clear the zero register, clear the status register and initialize the
* IDLE thread stack
*/
@ -391,7 +391,7 @@ __start:
/* Copy initial global data values from FLASH into RAM */
.global __do_copy_data; /* Required to suppress dragging in logic from libgcc */
.global __do_copy_data; /* Required to suppress dragging in logic from libgcc */
__do_copy_data:
#ifdef HAVE_RAMPZ
@ -402,43 +402,43 @@ __do_copy_data:
ldi r31, hi8(_eronly)
ldi r16, hh8(_eronly)
out _SFR_IO_ADDR(RAMPZ), r16
rjmp .Lcopystart
rjmp .Lcopystart
.Lcopyloop:
elpm r0, Z+
elpm r0, Z+
st X+, r0
.Lcopystart:
cpi r26, lo8(_edata)
cpc r27, r17
brne .Lcopyloop
brne .Lcopyloop
#else
ldi r17, hi8(_edata)
ldi r26, lo8(_sdata)
ldi r27, hi8(_sdata)
ldi r30, lo8(_eronly)
ldi r31, hi8(_eronly)
rjmp .Lcopystart
rjmp .Lcopystart
.Lcopyloop:
lpm r0, Z+
st X+, r0
lpm r0, Z+
st X+, r0
.Lcopystart:
cpi r26, lo8(_edata)
cpc r27, r17
brne .Lcopyloop
cpi r26, lo8(_edata)
cpc r27, r17
brne .Lcopyloop
#endif
/* Clear uninitialized data */
.global __do_clear_bss; /* Required to suppress dragging in logic from libgcc */
.global __do_clear_bss; /* Required to suppress dragging in logic from libgcc */
__do_clear_bss:
ldi r17, hi8(_ebss)
ldi r26, lo8(_sbss)
ldi r27, hi8(_sbss)
rjmp .Lclearstart
rjmp .Lclearstart
.Lclearloop:
st X+, r1

4
arch/avr/src/atmega/atmega_lowinit.c
View File

@ -132,7 +132,7 @@ void up_lowinit(void)
CLKPR = 0x80;
CLKPR = 0;
#elif defined(XDIV)
XDIV = 0;
XDIV = 0;
#endif
/* Initialize the watchdog timer */
@ -155,5 +155,3 @@ void up_lowinit(void)
atmega_boardinitialize();
}

2
arch/avr/src/atmega/atmega_timerisr.c
View File

@ -179,7 +179,7 @@ void up_timer_initialize(void)
#else
# error "Unable to find IRQ for timer"
#endif
/* Enable the interrupt on compare match A */
#if defined(TIMSK1)

2
arch/avr/src/avr/Toolchain.defs
View File

@ -124,5 +124,3 @@ ifeq ($(CONFIG_AVR_TOOLCHAIN),WINAVR)
MAXOPTIMIZATION ?= -O2
LDFLAGS += -nostartfiles -nodefaultlibs
endif

83
arch/avr/src/avr/excptmacros.h
View File

@ -1,22 +1,22 @@
/********************************************************************************************
* arch/avr/src/avr/excptmacros.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
@ -223,7 +223,7 @@
in r27, _SFR_IO_ADDR(SPH)
adiw r26, XCPTCONTEXT_REGS-2
push r26 /* SPL then SPH */
push r26 /* SPL then SPH */
push r27
.endm
@ -248,8 +248,8 @@
/* We don't need to restore the stack pointer */
pop r27 /* Discard SPH */
pop r26 /* Discard SPL */
pop r27 /* Discard SPH */
pop r26 /* Discard SPL */
/* Restore r26-r27 */
@ -303,8 +303,8 @@
/* Restore the status register (probably enabling interrupts) */
pop r24 /* Restore the status register */
andi r24, ~(1 << SREG_I) /* but keeping interrupts disabled until the reti */
pop r24 /* Restore the status register */
andi r24, ~(1 << SREG_I) /* but keeping interrupts disabled until the reti */
out _SFR_IO_ADDR(SREG), r24
/* Finally, restore r24-r25 - the temporary and IRQ number registers */
@ -336,10 +336,10 @@
/* Pop the return address from the stack (PC0 then PC1). R18:19 are Call-used */
#if ATMEGA_PC_SIZE > 16
pop r20
pop r20
#endif /* ATMEGA_PC_SIZE */
pop r19
pop r18
pop r19
pop r18
/* Save the current stack pointer as it would be after the return(SPH then SPL). */
@ -350,7 +350,7 @@
/* Skip over r26-r27 and r30-r31 - Call-used, "volatile" registers */
adiw r26, 4 /* Four registers: r26-r27 and r30-r31*/
adiw r26, 4 /* Four registers: r26-r27 and r30-r31*/
/* Save r28-r29 - Call-saved, "static" registers */
@ -361,7 +361,7 @@
* already been skipped, r24 and r25 are saved elsewhere)
*/
adiw r26, 6 /* Seven registers: r18-23 */
adiw r26, 6 /* Seven registers: r18-23 */
/* Save r2-r17 - Call-saved, "static" registers */
@ -398,14 +398,15 @@
/* Skip r24-r25 - These are scratch register and Call-used, "volatile" registers */
adiw r26, 2 /* Two registers: r24-r25 */
adiw r26, 2 /* Two registers: r24-r25 */
/* Save the return address that we have saved in r18:19*/
#if ATMEGA_PC_SIZE > 16
st x+, r20
#endif /* ATMEGA_PC_SIZE */
st x+, r19
st x+, r18
st x+, r19
st x+, r18
.endm
/********************************************************************************************
@ -433,17 +434,17 @@
* Y [r28:29]
*/
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
#if ATMEGA_PC_SIZE <= 16
adiw r28, REG_PC0
#else
adiw r28, REG_PC2
adiw r28, REG_PC2
#endif
/* Fetch and set the new stack pointer */
ld r25, x+ /* Fetch stack pointer (post-incrementing) */
out _SFR_IO_ADDR(SPH), r25 /* (SPH then SPL) */
ld r25, x+ /* Fetch stack pointer (post-incrementing) */
out _SFR_IO_ADDR(SPH), r25 /* (SPH then SPL) */
ld r24, x+
out _SFR_IO_ADDR(SPL), r24
@ -457,20 +458,20 @@
*/
#if ATMEGA_PC_SIZE <= 16
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r24, y+
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */
push r25
#else
ld r25, y /* Load PC2 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC1 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC0 (r25) */
subi r28,1
push r25
#else
ld r25, y /* Load PC2 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC1 (r25) */
subi r28,1
push r25
ld r25, y /* Load PC0 (r25) */
subi r28,1
push r25
#endif
/* Then get value of X [r26:r27]. Save X on the new stack where we can
@ -484,9 +485,9 @@
* --- <- SP
*/
ld r25, x+ /* Fetch r26-r27 and save to the new stack */
ld r25, x+ /* Fetch r26-r27 and save to the new stack */
ld r24, x+
push r24 /* r26 then r27 */
push r24 /* r26 then r27 */
push r25
/* Restore r30-r31 - Call-used, "volatile" registers */
@ -550,7 +551,7 @@
ld r24, x+
bst r24, SREG_I
brts go_reti
brts go_reti
/* Restore the status register, interrupts are disabled */
@ -575,7 +576,7 @@ go_reti:
* and exit with reti (that will set the Interrupt Enable)
*/
andi r24, ~(1 << SREG_I)
andi r24, ~(1 << SREG_I)
out _SFR_IO_ADDR(SREG), r24
ld r25, x+

2
arch/avr/src/avr/up_createstack.c
View File

@ -160,7 +160,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->adj_stack_ptr = (FAR void *)top_of_stack;
tcb->adj_stack_size = stack_size;
#if defined(ARCH_HAVE_LEDS)
#if defined(ARCH_HAVE_LEDS)
board_autoled_on(LED_STACKCREATED);
#endif
return OK;

6
arch/avr/src/avr/up_dumpstate.c
View File

@ -158,9 +158,9 @@ static inline void up_registerdump(void)
current_regs[REG_SREG]);
#else
lldbg("PC: %02x%02x%02x SP: %02x%02x SREG: %02x\n",
current_regs[REG_PC0], current_regs[REG_PC1], current_regs[REG_PC2],
current_regs[REG_SPH], current_regs[REG_SPL],
current_regs[REG_SREG]);
current_regs[REG_PC0], current_regs[REG_PC1],
current_regs[REG_PC2], current_regs[REG_SPH],
current_regs[REG_SPL], current_regs[REG_SREG]);
#endif
}
}

1
arch/avr/src/avr/up_initialstate.c
View File

@ -113,4 +113,3 @@ void up_initial_state(struct tcb_s *tcb)
xcp->regs[REG_SREG] = getsreg() | (1 << SREG_I);
#endif
}

1
arch/avr/src/avr/up_schedulesigaction.c
View File

@ -224,4 +224,3 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
#endif /* !CONFIG_DISABLE_SIGNALS */

1
arch/avr/src/avr/up_sigdeliver.c
View File

@ -155,4 +155,3 @@ void up_sigdeliver(void)
}
#endif /* !CONFIG_DISABLE_SIGNALS */

3
arch/avr/src/common/up_initialize.c
View File

@ -297,8 +297,7 @@ void up_initialize(void)
up_usbinitialize();
#if defined(ARCH_HAVE_LEDS)
#if defined(ARCH_HAVE_LEDS)
board_autoled_on(LED_IRQSENABLED);
#endif
}