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Add support for multiplexed SDIO pins from Uros

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3898 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-19 16:51:04 +00:00
parent de0f788a05
commit a87259ebc6
18 changed files with 698 additions and 218 deletions
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2
ChangeLog
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@ -2009,3 +2009,5 @@
* confgs/twr-k60n512: Add Kinetics TWR-K60N512 NSH configuration.
* drivers/analog and include/nuttx/analog: Add ADC driver infrastructure
and TI ADS1255 driver developed and submitted by Li Zhouy (Lzzy)).
* arch/arm/stm32/stm32_sdio.h and drvers/mmcsd/mmcsd.c: Add logic to
multiplex usage of the GPIO pins.

20
Documentation/NuttX.html
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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: August 18, 2011</p>
<p>Last Updated: August 19, 2011</p>
</td>
</tr>
</table>
@ -678,6 +678,21 @@
</tr>
</table></center>
<tr>
<td valign="top" width="22"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<b>Analog Devices</b>
</td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<li>Support for Analog-to-Digital converters.</li>
</p>
</tr>
</table></center>
<p>
<b>NuttX Add-Ons</b>.
The following packages are available to extend the basic NuttX feature set:
@ -2700,6 +2715,9 @@ nuttx-6.8 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
(reported by Li Zhouy (Lzzy)).
* 8/18/2011: The basic port to the FreeScale Kinetics TWR-K60N512 board is
now functional.
* confgs/twr-k60n512: Add Kinetics TWR-K60N512 NSH configuration.
* drivers/analog and include/nuttx/analog: Add ADC driver infrastructure
and TI ADS1255 driver developed and submitted by Li Zhouy (Lzzy)).
apps-6.8 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

45
Documentation/NuttxPortingGuide.html
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@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec">
<i>NuttX RTOS Porting Guide</i>
</font></big></h1>
<p>Last Updated: July 27, 2011</p>
<p>Last Updated: August 19, 2011</p>
</td>
</tr>
</table>
@ -730,6 +730,8 @@
<code>setenv.sh</code>: This is a script that you can include that will be installed at
the top level of the directory structure and can be sourced to set any
necessary environment variables.
You will most likely have to customize the default <code>setenv.sh</code> script in order
for it to work correctly in your environment.
</p>
</li>
</ul>
@ -863,8 +865,8 @@
</li>
<li><code>configs/olimex-lpc2378</code>:
This port uses the Olimex-lpc2378 board and a GNU arm-elf toolchain under
Linux or Cygwin. STATUS: ostest and NSH configurations available.
This port uses the Olimex-lpc2378 board and a GNU arm-elf toolchain under
Linux or Cygwin. STATUS: ostest and NSH configurations available.
</li>
<li><code>configs/olimex-strp711</code>:
@ -904,12 +906,12 @@
</li>
<li><code>configs/sam3u-ek</code>:
The port of NuttX to the Atmel SAM3U-EK development board.
The port of NuttX to the Atmel SAM3U-EK development board.
</li>
<li><code>configs/skp16c26</code>:
Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port
uses the GNU m32c toolchain. STATUS: The port is complete but untested
Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port
uses the GNU m32c toolchain. STATUS: The port is complete but untested
due to issues with compiler internal errors.
</li>
@ -3847,6 +3849,21 @@ build
</li>
</ul>
<h3>SDIO/SDHC driver</h3>
<ul>
<li>
<code>CONFIG_SDIO_DMA</code>: SDIO driver supports DMA
</li>
<li>
<code>CONFIG_SDIO_MUXBUS</code>: Set this SDIO interface if the SDIO interface
or hardware resources are shared with other drivers.
</li>
<li>
<code>CONFIG_SDIO_WIDTH_D1_ONLY</code>: Select 1-bit transfer mode. Default:
4-bit transfer mode.
</li>
</ul>
<h3>SDIO-based MMC/SD driver</h3>
<ul>
<li>
@ -3977,6 +3994,22 @@ build
</li>
</ul>
<h3>Analog Devices</h3>
<ul>
<li>
<code>CONFIG_DAC</code>:
Enables general support for Digital-to-Analog conversion devices.
</li>
<li>
<code>CONFIG_ADC</code>:
Enables general support for Analog-to-Digital conversion devices.
</li>
<li>
<code>CONFIG_ADC_ADS125X</code>:
Adds support for the TI ADS 125x ADC.
</li>
</ul>
<h3>ENC28J60 Ethernet Driver Configuration Settings</h3>
<ul>
<li>

94
arch/arm/src/stm32/stm32_rcc.c
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@ -59,6 +59,22 @@
#define HSERDY_TIMEOUT 256
/****************************************************************************
* Private Data
****************************************************************************/
/* Activity reference count, showing inactivity after start-up.
* Device drivers increment this count using rcclock() and rccunlock()
*
* If this value goes beyond the range [0, MAX_RCCs] indicates
* reference count leakage (asymetric number of locks vs. unlocks) and
* system enters permanent active state.
*/
#ifdef CONFIG_STM32_RCCLOCK
static int stm32_rcclock_count = 0;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
@ -98,7 +114,6 @@ static inline void rcc_reset(void)
putreg32(0, STM32_RCC_CIR); /* Disable all interrupts */
}
static inline void rcc_enableahb(void)
{
uint32_t regval;
@ -140,7 +155,6 @@ static inline void rcc_enableahb(void)
putreg32(regval, STM32_RCC_AHBENR); /* Enable peripherals */
}
static inline void rcc_enableapb1(void)
{
uint32_t regval;
@ -292,7 +306,6 @@ static inline void rcc_enableapb1(void)
putreg32(regval, STM32_RCC_APB1ENR);
}
static inline void rcc_enableapb2(void)
{
uint32_t regval;
@ -374,14 +387,14 @@ static inline void rcc_enableapb2(void)
putreg32(regval, STM32_RCC_APB2ENR);
}
#if !defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/** Called to change to new clock based on settings in board.h
/* Called to change to new clock based on settings in board.h
*
* NOTE: This logic would need to be extended if you need to select low-
* power clocking modes!
**/
* NOTE: This logic would need to be extended if you need to select low-
* power clocking modes!
*/
static inline void stm32_stdclockconfig(void)
{
uint32_t regval;
@ -469,7 +482,6 @@ static inline void stm32_stdclockconfig(void)
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@ -501,22 +513,66 @@ void stm32_clockconfig(void)
rcc_enableapb1();
}
/**
/*
* \todo Check for LSE good timeout and return with -1,
* possible ISR optimization? or at least ISR should be cough in case of failure
*/
void stm32_rcc_enablelse(void)
{
/* Enable LSE */
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON);
/* Enable LSE */
/* We could wait for ISR here ... */
while( !(getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) ) up_waste();
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON);
/* Select LSE as RTC Clock Source */
modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
/* We could wait for ISR here ... */
/* Enable Clock */
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
while( !(getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) ) up_waste();
/* Select LSE as RTC Clock Source */
modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
/* Enable Clock */
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
}
#ifdef CONFIG_STM32_RCCLOCK
uint32_t stm32_rcclock(uint8_t domain_id)
{
// THINK:
// maybe just shift domain_id into 32-bit or 64-bit register
// and if there value of this var != 0, we are active...
// increment some variable, so it is possible to test leakage
// multiple locks or multiple unlocks
if (stm32_rcclock_count >= 0)
{
stm32_rcclock_count++;
if (stm32_rcclock_count > 64)
{
stm32_rcclock_count = -1; /* capture error */
}
}
return 0;
}
uint32_t stm32_rccunlock(uint8_t domain_id)
{
if (stm32_rcclock_count > -1)
{
stm32_rcclock_count--;
}
return 0;
}
uint32_t stm32_setrccoptions(uint8_t domain_id, uint32_t options)
{
}
int stm32_getrccactivity(void)
{
return stm32_rcclock_count;
}
#endif

15
arch/arm/src/stm32/stm32_rcc.h
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@ -72,22 +72,21 @@ extern "C" {
extern uint32_t stm32_vectors[]; /* See stm32_vectors.S */
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/** Called to change to new clock based on settings in board.h
/* Called to change to new clock based on settings in board.h
*
* NOTE: This logic needs to be extended so that we can selected low-power
* clocking modes as well!
**/
* NOTE: This logic needs to be extended so that we can selected low-power
* clocking modes as well!
*/
EXTERN void stm32_clockconfig(void);
/** Enable LSE Clock
**/
EXTERN void stm32_rcc_enablelse(void);
/* Enable LSE Clock */
EXTERN void stm32_rcc_enablelse(void);
#undef EXTERN
#if defined(__cplusplus)

43
arch/arm/src/stm32/stm32_sdio.c
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@ -317,6 +317,12 @@ static int stm32_interrupt(int irq, void *context);
/* SDIO interface methods ***************************************************/
/* Mutual exclusion */
#ifdef CONFIG_SDIO_MUXBUS
static int stm32_lock(FAR struct sdio_dev_s *dev, bool lock);
#endif
/* Initialization/setup */
static void stm32_reset(FAR struct sdio_dev_s *dev);
@ -380,6 +386,9 @@ struct stm32_dev_s g_sdiodev =
{
.dev =
{
#ifdef CONFIG_SDIO_MUXBUS
.lock = stm32_lock,
#endif
.reset = stm32_reset,
.status = stm32_status,
.widebus = stm32_widebus,
@ -1312,6 +1321,35 @@ static int stm32_interrupt(int irq, void *context)
/****************************************************************************
* SDIO Interface Methods
****************************************************************************/
/****************************************************************************
* Name: stm32_lock
*
* Description:
* Locks the bus. Function calls low-level multiplexed bus routines to
* resolve bus requests and acknowledgment issues.
*
* Input Parameters:
* dev - An instance of the SDIO device interface
* lock - TRUE to lock, FALSE to unlock.
*
* Returned Value:
* OK on success; a negated errno on failure
*
****************************************************************************/
#ifdef CONFIG_SDIO_MUXBUS
static int stm32_lock(FAR struct sdio_dev_s *dev, bool lock)
{
/* Single SDIO instance so there is only one possibility. The multiplex
* bus is part of board support package.
*/
stm32_muxbus_sdio_lock(lock);
return OK;
}
#endif
/****************************************************************************
* Name: stm32_reset
*
@ -2574,8 +2612,12 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
/* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
* 8-bit wide bus operation but D4-D7 are not configured).
*
* If bus is multiplexed then there is a custom bus configuration utility
* in the scope of the board support package.
*/
#ifndef CONFIG_SDIO_MUXBUS
stm32_configgpio(GPIO_SDIO_D0);
#ifndef CONFIG_SDIO_WIDTH_D1_ONLY
stm32_configgpio(GPIO_SDIO_D1);
@ -2584,6 +2626,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
#endif
stm32_configgpio(GPIO_SDIO_CK);
stm32_configgpio(GPIO_SDIO_CMD);
#endif
/* Reset the card and assure that it is in the initial, unconfigured
* state.

43
configs/README.txt
View File

@ -562,6 +562,7 @@ defconfig -- This is a configuration file similar to the Linux
for pipe and FIFO support
Filesystem configuration
CONFIG_FS_FAT - Enable FAT filesystem support
CONFIG_FAT_SECTORSIZE - Max supported sector size
CONFIG_FAT_LCNAMES - Enable use of the NT-style upper/lower case 8.3
@ -604,6 +605,7 @@ defconfig -- This is a configuration file similar to the Linux
implemented by copying whole files into memory.
SPI driver
CONFIG_SPI_OWNBUS - Set if there is only one active device
on the SPI bus. No locking or SPI configuration will be performed.
It is not necessary for clients to lock, re-configure, etc..
@ -611,6 +613,7 @@ defconfig -- This is a configuration file similar to the Linux
(vs a recvblock() and sndblock ()methods)
SPI-based MMC/SD driver
CONFIG_MMCSD_NSLOTS - Number of MMC/SD slots supported by the
driver. Default is one.
CONFIG_MMCSD_READONLY - Provide read-only access. Default is
@ -618,17 +621,24 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
Default is 20MHz.
SDIO-based MMC/SD driver
CONFIG_FS_READAHEAD - Enable read-ahead buffering
CONFIG_FS_WRITEBUFFER - Enable write buffering
SDIO/SDHC driver:
CONFIG_SDIO_DMA - SDIO driver supports DMA
CONFIG_MMCSD_MMCSUPPORT - Enable support for MMC cards
CONFIG_MMCSD_HAVECARDDETECT - SDIO driver card detection is
100% accurate
CONFIG_SDIO_MUXBUS - Set this SDIO interface if the SDIO interface
or hardware resources are shared with other drivers.
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
SDIO-based MMC/SD driver
CONFIG_FS_READAHEAD - Enable read-ahead buffering
CONFIG_FS_WRITEBUFFER - Enable write buffering
CONFIG_MMCSD_MMCSUPPORT - Enable support for MMC cards
CONFIG_MMCSD_HAVECARDDETECT - SDIO driver card detection is
100% accurate
RiT P14201 OLED driver
CONFIG_LCD_P14201 - Enable P14201 support
CONFIG_P14201_SPIMODE - Controls the SPI mode
CONFIG_P14201_FREQUENCY - Define to use a different bus frequency
@ -683,7 +693,17 @@ defconfig -- This is a configuration file similar to the Linux
there are multiple TSC2007 touchscreens, this setting will enable
multiple touchscreens with the same driver.
Analog Devices
CONFIG_DAC
Enables general support for Digital-to-Analog conversion devices.
CONFIG_ADC
Enables general support for Analog-to-Digital conversion devices.
CONFIG_ADC_ADS125X
Adds support for the TI ADS 125x ADC.
ENC28J60 Ethernet Driver Configuration Settings:
CONFIG_NET_ENC28J60 - Enabled ENC28J60 support
CONFIG_ENC28J60_SPIMODE - Controls the SPI mode
CONFIG_ENC28J60_FREQUENCY - Define to use a different bus frequency
@ -693,6 +713,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_ENC28J60_HALFDUPPLEX - Default is full duplex
Networking support via uIP
CONFIG_NET - Enable or disable all network features
CONFIG_NET_NOINTS -- CONFIG_NET_NOINT indicates that uIP not called from
the interrupt level. If CONFIG_NET_NOINTS is defined, critical sections
@ -782,10 +803,12 @@ defconfig -- This is a configuration file similar to the Linux
Default: 128
UIP Network Utilities
CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP
CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries
THTTPD:
THTTPD
CONFIG_THTTPD_PORT - THTTPD Server port number
CONFIG_THTTPD_IPADDR - Server IP address (no host name)
CONFIG_THTTPD_SERVER_ADDRESS - SERVER_ADDRESS: response
@ -842,6 +865,7 @@ defconfig -- This is a configuration file similar to the Linux
and verify referrers.
USB device controller driver
CONFIG_USBDEV - Enables USB device support
CONFIG_USBDEV_ISOCHRONOUS - Build in extra support for isochronous
endpoints
@ -854,6 +878,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_USBDEV_TRACE_NRECORDS - Number of trace entries to remember
USB host controller driver
CONFIG_USBHOST
Enables USB host support
CONFIG_USBHOST_NPREALLOC
@ -1073,7 +1098,9 @@ appconfig -- This is another configuration file that is specific to the
setenv.sh -- This is a script that you can include that will be installed at
the toplevel of the directory structure and can be sourced to set any
necessary environment variables.
necessary environment variables. You will most likely have to customize the
default setenv.sh script in order for it to work correctly in your
environment.
Supported Boards
^^^^^^^^^^^^^^^^

171
configs/vsn/README.txt
View File

@ -3,6 +3,7 @@ README
This README discusses issues unique to NuttX configurations for the
ISOTEL NetClamps VSN V1.2 ready2go sensor network platform.
More information can be found at http://www.netclamps.com
Contents
^^^^^^^^
@ -164,77 +165,6 @@ NuttX buildroot Toolchain
detailed PLUS some special instructions that you will need to follow if you are
building a Cortex-M3 toolchain for Cygwin under Windows.
DFU
^^^
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line:
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
to make space for the DFU loader and 0x08003000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for each
configuration.
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Convert the NuttX Intel Hex file (nuttx.ihx) into a special DFU
file (nuttx.dfu)... see below for details.
2. Connect the VSN board to your computer using a USB
cable.
3. Start the DFU loader on the VSN board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nutt.dfu into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo dirctory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.ihx in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will need to rename it to nuttx.hex
in order to find it with the DFU File Manager. You will end up with
a file called nuttx.dfu that you can use with the STMicro DFU SE program.
LEDs
^^^^
The VSN board has four LEDs labeled LD1, LD2, LD3 and LD4 on the
the board. Usage of these LEDs is defined in include/board.h and src/up_leds.c.
They are encoded as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED3 ON and LED1 faintly glowing. This faint glow
is because of timer interupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
VSN-specific Configuration Options
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@ -259,7 +189,7 @@ VSN-specific Configuration Options
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103ZET6
CONFIG_ARCH_CHIP_STM32F103RET6
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
hence, the board that supports the particular chip or SoC.
@ -292,9 +222,6 @@ VSN-specific Configuration Options
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
@ -311,96 +238,6 @@ VSN-specific Configuration Options
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Alternate pin mappings (should not be used with the VSN board):
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_FULL_REMAP
CONFIG_STM32_CAN1_PARTIAL_REMAP
CONFIG_STM32_CAN2_REMAP
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
and CONFIG_STM32_DMA2.
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
Configurations
^^^^^^^^^^^^^^
@ -418,3 +255,7 @@ Where <subdir> is one of the following:
nsh:
Configures the NuttShell (nsh) located at examples/nsh. The
Configuration enables both the serial and telnetd NSH interfaces.
The default configuration sets up a console on front-panel RS-232
interface, sets up device driver of all supported equipment and
links in VSN default applications.

3
configs/vsn/include/board.h
View File

@ -52,6 +52,9 @@
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "muxbus.h"
/************************************************************************************
* Definitions
************************************************************************************/

84
configs/vsn/include/muxbus.h Normal file
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@ -0,0 +1,84 @@
/************************************************************************************
* configs/vsn/include/muxbus.h
* include/arch/board/muxbus.h
*
* Copyright (C) 2011 Uros Platise. All rights reserved
*
* Authors: Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_BOARD_MUXBUS_H
#define __ARCH_BOARD_MUXBUS_H
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/**
* Initialization of the semaphore and initial bus state.
*/
void vsn_muxbus_init(void);
/**
* Simple Lock / Unlock Mechanism for the SDIO Interface
*
* NOTE: This function is provided for the stm32_sdio driver.
*/
extern void stm32_muxbus_sdio_lock(bool lock);
/**
* Set PGA Gain of the Analog Devices AD8231 on bus shared with the
* SDIO interface
*
* \param gain sets the front-end gain as 2^{gain}, where gain = 0..7.
* Setting gain outside that range shutdowns the front-end.
*
* \return gain set or -1 if front end is put into shutdown.
*/
extern int vsn_muxbus_setpgagain(int gain);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_BOARD_MUXBUS_H */

2
configs/vsn/src/Makefile
View File

@ -53,7 +53,7 @@ ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = sysclock.c boot.c leds.c buttons.c spi.c \
usbdev.c power.c sif.c
usbdev.c power.c muxbus.c sif.c
ifeq ($(CONFIG_USBSTRG),y)
CSRCS += usbstrg.c

1
configs/vsn/src/boot.c
View File

@ -63,6 +63,7 @@ void stm32_boardinitialize(void)
/* Set start-up board voltage */
board_power_init();
vsn_muxbus_init();
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.

198
configs/vsn/src/muxbus.c Normal file
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@ -0,0 +1,198 @@
/****************************************************************************
* config/vsn/src/muxbus.c
* arch/arm/src/board/muxbus.c
*
* Copyright (C) 2011 Uros Platise. All rights reserved.
*
* Authors: Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/** \file
* \author Uros Platise
* \brief VSN Multiplexed Bus, SDIO Interface and the Analog Front-End
*/
#include <nuttx/config.h>
#include <semaphore.h>
#include <errno.h>
#include "vsn.h"
#include "stm32_gpio.h"
/****************************************************************************
* Private data
****************************************************************************/
/** Set true when the bus has been locked by the SDIO interface */
bool vsn_muxbus_ownedbysdio;
/** Semaphore to resolve conflicts between muxbus locks */
sem_t vsn_muxbus_sem;
/****************************************************************************
* Private functions
****************************************************************************/
void vsn_muxbus_takeownership(void)
{
while (sem_wait(&vsn_muxbus_sem) != 0) {
/* The only case that an error should occr here is if the wait was
* awakened by a signal.
*/
ASSERT(errno == EINTR);
}
}
void vsn_muxbus_sdio_release(void)
{
stm32_unconfiggpio(GPIO_SDIO_D0);
stm32_unconfiggpio(GPIO_SDIO_CK);
stm32_unconfiggpio(GPIO_SDIO_CMD);
vsn_muxbus_ownedbysdio = FALSE;
}
void vsn_muxbus_sdio_access(void)
{
stm32_configgpio(GPIO_SDIO_D0);
stm32_configgpio(GPIO_SDIO_CK);
stm32_configgpio(GPIO_SDIO_CMD);
vsn_muxbus_ownedbysdio = TRUE;
}
/****************************************************************************
* Public functions
****************************************************************************/
void vsn_muxbus_init(void)
{
/* Put the PGA in default shut-down state */
stm32_configgpio(GPIO_PGIA_AEN);
/* setup semaphore in non-locked condition */
sem_init(&vsn_muxbus_sem, 0, 1);
/* by default give the bus to the SDIO */
vsn_muxbus_sdio_access();
}
/**
* We could do extra checks: who is the owner to prevent
* unlocking from SDIO side eventhough it was not locked
* by him, but temporarily by the PGA
*/
void stm32_muxbus_sdio_lock(bool lock)
{
if ( lock )
vsn_muxbus_takeownership();
else
sem_post(&vsn_muxbus_sem);
}
/**
* The following rules apply for the SDcard:
*
* - CMD serial line always starts with 0 (start-bit) and ends with 1 (stop-bit)
* The total length is always 48 bits protected by CRCs. When changing the
* gain, CMD must be seen as 1 on CK changes.
*
* - An alternative mechanism would be to use suspend/resume commands
*
* - If SDcard internal shift-register is 8-bit oriented there might be a need
* to shift 7 dummy bits to properly detect invalid start of packet
* (with start bit set as 1) to invalidate bus transitions (in case CK
* is changing).
*
* SDIO returns the bus in HiZ states, where CLK = 0, D = CMD = external pull-up
*/
int vsn_muxbus_setpgagain(int gain)
{
/* Shutdown the Analog Devices AD8231 and exit if gain is invalid */
stm32_gpiowrite(GPIO_PGIA_AEN, FALSE);
if (gain < 0 || gain > 7)
return -1;
vsn_muxbus_takeownership();
vsn_muxbus_sdio_release();
/* If we have to set CLK = 1, made that first as D, CMD are 1 by pull-ups */
if (gain & 2)
stm32_configgpio(GPIO_PGIA_A1_H);
else stm32_configgpio(GPIO_PGIA_A1_L);
/* Set the D and CMD bits */
if (gain & 1)
stm32_configgpio(GPIO_PGIA_A0_H);
else stm32_configgpio(GPIO_PGIA_A0_L);
if (gain & 4)
stm32_configgpio(GPIO_PGIA_A2_H);
else stm32_configgpio(GPIO_PGIA_A2_L);
/* Sample GAIN on rising edge */
stm32_gpiowrite(GPIO_PGIA_AEN, TRUE);
/* Release D and CMD pins to 1; however shorten rising edge actively */
stm32_gpiowrite(GPIO_PGIA_A0_H, TRUE);
stm32_gpiowrite(GPIO_PGIA_A2_H, TRUE);
stm32_unconfiggpio(GPIO_PGIA_A0_H);
stm32_unconfiggpio(GPIO_PGIA_A2_H);
/* Release CLK by going down and return the bus */
stm32_unconfiggpio(GPIO_PGIA_A1_L);
vsn_muxbus_sdio_access();
sem_post(&vsn_muxbus_sem);
return gain;
}

92
configs/vsn/src/sif.c
View File

@ -313,12 +313,12 @@ int sif_anout_init(void)
// Use the TIM3 as PWM modulated analogue output
STM32_TIM_SETPERIOD(vsn_sif.tim3, 4096);
STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, 1024);
STM32_TIM_SETPERIOD(vsn_sif.tim3, 5);
STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, 3);
STM32_TIM_SETCLOCK(vsn_sif.tim3, 36e6);
STM32_TIM_SETMODE(vsn_sif.tim3, STM32_TIM_MODE_UP);
//STM32_TIM_SETCHANNEL(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
STM32_TIM_SETCHANNEL(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
// Use the TIM8 to drive the upper power mosfet
@ -330,7 +330,7 @@ int sif_anout_init(void)
STM32_TIM_SETCLOCK(vsn_sif.tim8, 36e6);
STM32_TIM_SETMODE(vsn_sif.tim8, STM32_TIM_MODE_UP);
STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
//STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
vsn_sif.i2c1 = up_i2cinitialize(1);
vsn_sif.i2c2 = up_i2cinitialize(2);
@ -366,9 +366,77 @@ void sif_anref_init(void)
* Analog Input Sampler Unit
****************************************************************************/
void sif_anin_reset(void)
#if 0
/**
* Gain is set using the shared multiplexed bus with the SDIO card.
* The following rules apply for the SDcard:
*
* - CMD serial line always starts with 0 (start-bit) and ends with 1 (stop-bit)
* The total length is always 48 bits protected by CRCs. When changing the
* gain, CMD must be seen as 1 on CK changes.
*
* - An alternative mechanism would be to use suspend/resume commands
*
* - If SDcard internal shift-register is 8-bit oriented there might be a need
* to shift 7 dummy bits to properly detect invalid start of packet
* (with start bit set as 1) to invalidate bus transitions (in case CK
* is changing).
*
* SDIO returns the bus in HiZ states, where CLK = 0, D = CMD = external pull-up
*/
int sif_anin_setgain(int gain)
{
/* Shutdown the PGA and exit if gain is invalid */
stm32_gpiowrite(GPIO_PGIA_AEN, FALSE);
if (gain < 0 || gain > 7)
return -1;
sdio_gpio_request();
/* If we have to set CLK = 1, made that first as D, CMD are 1 by pull-ups */
if (gain & 2)
stm32_configgpio(GPIO_PGIA_A1_H);
else stm32_configgpio(GPIO_PGIA_A1_L);
/* Set the D and CMD bits */
if (gain & 1)
stm32_configgpio(GPIO_PGIA_A0_H);
else stm32_configgpio(GPIO_PGIA_A0_L);
if (gain & 4)
stm32_configgpio(GPIO_PGIA_A2_H);
else stm32_configgpio(GPIO_PGIA_A2_L);
/* Sample GAIN on rising edge */
stm32_gpiowrite(GPIO_PGIA_AEN, TRUE);
/* Release D and CMD pins to 1; however shorten rising edge actively */
stm32_gpiowrite(GPIO_PGIA_A0_H, TRUE);
stm32_gpiowrite(GPIO_PGIA_A2_H, TRUE);
stm32_unconfiggpio(GPIO_PGIA_A0_H);
stm32_unconfiggpio(GPIO_PGIA_A2_H);
/* Release CLK by going down */
stm32_unconfiggpio(GPIO_PGIA_A1_L);
sdio_gpio_release();
return gain;
}
#endif
int sif_anin_reset(void)
{
return OK;
}
@ -483,6 +551,7 @@ int sif_init(void)
sif_gpios_reset();
if ( sif_anout_init() != OK ) return -1;
if ( sif_anin_reset() != OK ) return -1;
/* If everything is okay, register the driver */
@ -514,7 +583,8 @@ int sif_main(int argc, char *argv[])
}
else if (!strcmp(argv[1], "pwr") && argc == 3) {
int val = atoi(argv[2]);
STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, val);
//STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, val);
STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, val);
return 0;
}
else if (!strcmp(argv[1], "time") && argc == 3) {
@ -592,6 +662,14 @@ int sif_main(int argc, char *argv[])
return 0;
}
else if (!strcmp(argv[1], "pga")) {
int gain = atoi(argv[2]);
gain = vsn_muxbus_setpgagain(gain);
printf("Gain changed: %d\n", gain);
return 0;
}
else if (!strcmp(argv[1], "cc")) {
struct cc1101_dev_s * cc;
uint8_t buf[64];

8
configs/vsn/src/vsn.h
View File

@ -150,6 +150,14 @@
#define GPIO_OUT_PWM (GPIO_ALT |GPIO_CNF_AFPP |GPIO_MODE_10MHz|GPIO_PORTB|GPIO_PIN1 )
#define GPIO_OUT_PWM_TIM3_CH 4 /* TIM3.CH4 */
#define GPIO_PGIA_A0_H (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN8 |GPIO_OUTPUT_SET)
#define GPIO_PGIA_A0_L (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN8 |GPIO_OUTPUT_CLEAR)
#define GPIO_PGIA_A1_L (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN12|GPIO_OUTPUT_CLEAR)
#define GPIO_PGIA_A1_H (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN12|GPIO_OUTPUT_SET)
#define GPIO_PGIA_A2_H (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTD|GPIO_PIN2 |GPIO_OUTPUT_SET)
#define GPIO_PGIA_A2_L (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTD|GPIO_PIN2 |GPIO_OUTPUT_CLEAR)
#define GPIO_PGIA_AEN (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN1 |GPIO_OUTPUT_CLEAR)
/* Radio Connector */

32
drivers/mmcsd/mmcsd_sdio.c
View File

@ -148,7 +148,10 @@ struct mmcsd_state_s
/* Misc Helpers *************************************************************/
static void mmcsd_takesem(FAR struct mmcsd_state_s *priv);
#define mmcsd_givesem(p) sem_post(&priv->sem);
#ifndef CONFIG_SDIO_MUXBUS
# define mmcsd_givesem(p) sem_post(&priv->sem);
#endif
/* Command/response helpers *************************************************/
@ -261,18 +264,41 @@ static const struct block_operations g_bops =
static void mmcsd_takesem(FAR struct mmcsd_state_s *priv)
{
/* Take the semaphore (perhaps waiting) */
/* Take the semaphore, giving exclusive access to the driver (perhaps
* waiting)
*/
while (sem_wait(&priv->sem) != 0)
{
/* The only case that an error should occr here is if the wait was
/* The only case that an error should occur here is if the wait was
* awakened by a signal.
*/
ASSERT(errno == EINTR);
}
/* Lock the bus if mutually exclusive access to the SDIO bus is required
* on this platform.
*/
#ifdef CONFIG_SDIO_MUXBUS
SDIO_LOCK(priv->dev, TRUE);
#endif
}
#ifdef CONFIG_SDIO_MUXBUS
static void mmcsd_givesem(FAR struct mmcsd_state_s *priv)
{
/* Release the SDIO bus lock, then the MMC/SD driver semaphore in the
* opposite order that they were taken to assure that no deadlock
* conditions will arise.
*/
SDIO_LOCK(priv->dev, FALSE);
sem_post(&priv->sem);
}
#endif
/****************************************************************************
* Command/Response Helpers
****************************************************************************/

39
drivers/wireless/cc1101/cc1101.c
View File

@ -55,6 +55,45 @@
* - Power up/down modes
* - Sequencing between states or add protection for correct termination of
* various different state (so that CC1101 does not block in case of improper use)
*
* \par RSSI and LQI value interpretation
*
* The LQI can be read from the LQI status register or it can be appended
* to the received packet in the RX FIFO. LQI is a metric of the current
* quality of the received signal. The LQI gives an estimate of how easily
* a received signal can be demodulated by accumulating the magnitude of
* the error between ideal constellations and the received signal over
* the 64 symbols immediately following the sync word. LQI is best used
* as a relative measurement of the link quality (a high value indicates
* a better link than what a low value does), since the value is dependent
* on the modulation format.
*
* To simplify: If the received modulation is FSK or GFSK, the receiver
* will measure the frequency of each "bit" and compare it with the
* expected frequency based on the channel frequency and the deviation
* and the measured frequency offset. If other modulations are used, the
* error of the modulated parameter (frequency for FSK/GFSK, phase for
* MSK, amplitude for ASK etc) will be measured against the expected
* ideal value
*
* RSSI (Received Signal Strength Indicator) is a signal strength
* indication. It does not care about the "quality" or "correctness" of
* the signal. LQI does not care about the actual signal strength, but
* the signal quality often is linked to signal strength. This is because
* a strong signal is likely to be less affected by noise and thus will
* be seen as "cleaner" or more "correct" by the receiver.
*
* There are four to five "extreme cases" that can be used to illustrate
* how RSSI and LQI work:
* 1. A weak signal in the presence of noise may give low RSSI and low LQI.
* 2. A weak signal in "total" absence of noise may give low RSSI and high LQI.
* 3. Strong noise (usually coming from an interferer) may give high RSSI and low LQI.
* 4. A strong signal without much noise may give high RSSI and high LQI.
* 5. A very strong signal that causes the receiver to saturate may give
* high RSSI and low LQI.
*
* Note that both RSSI and LQI are best used as relative measurements since
* the values are dependent on the modulation format.
**/
#include <nuttx/config.h>

24
include/nuttx/sdio.h
View File

@ -310,6 +310,24 @@
#define SDIO_ACMD52 (SDIO_ACMDIDX52|MMCSD_R5_RESPONSE |MMCSD_NODATAXFR)
#define SDIO_ACMD53 (SDIO_ACMDIDX53|MMCSD_R5_RESPONSE |MMCSD_NODATAXFR)
/****************************************************************************
* Name: SDIO_LOCK
*
* Description:
* Lock/unlock the SDIO bus, preventing it from any other transaction
* while locked.
*
* Input Parameters:
* dev - An instance of the SDIO device interface
* state - TRUE/FALSE
*
* Returned Value:
* OK on success.
*
****************************************************************************/
#define SDIO_LOCK(dev,state) ((dev)->lock(dev,state))
/****************************************************************************
* Name: SDIO_RESET
*
@ -756,6 +774,12 @@ struct sdio_dev_s
* above.
*/
/* Mutual exclusion */
#ifdef CONFIG_SDIO_MUXBUS
int (*lock)(FAR struct sdio_dev_s *dev, bool lock);
#endif
/* Initialization/setup */
void (*reset)(FAR struct sdio_dev_s *dev);