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Resolve linking issues with x86_64 port

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Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
This commit is contained in:
Brennan Ashton 2020-04-29 01:15:57 -07:00 committed by patacongo
parent 32b79b22ec
commit a9871f584a
4 changed files with 26 additions and 14 deletions
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10
arch/x86_64/include/intel64/arch.h
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@ -562,12 +562,12 @@ extern volatile uint8_t gdt64_low_end;
/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
volatile uint64_t *pdpt;
volatile uint64_t *pd;
volatile uint64_t *pt;
extern volatile uint64_t *pdpt;
extern volatile uint64_t *pd;
extern volatile uint64_t *pt;
volatile struct ist_s *ist64;
volatile struct gdt_entry_s *gdt64;
extern volatile struct ist_s *ist64;
extern volatile struct gdt_entry_s *gdt64;
/****************************************************************************
* Public Function Prototypes

1
arch/x86_64/src/intel64/intel64_handlers.c
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@ -139,7 +139,6 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
PANIC(); /* Doesn't return */
return regs; /* To keep the compiler happy */
#else
uint64_t *ret;
DEBUGASSERT(g_current_regs == NULL);
g_current_regs = regs;

25
arch/x86_64/src/intel64/intel64_lowsetup.c
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@ -37,6 +37,19 @@
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
volatile uint64_t *pdpt;
volatile uint64_t *pd;
volatile uint64_t *pt;
volatile struct ist_s *ist64;
volatile struct gdt_entry_s *gdt64;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -64,16 +77,16 @@ void up_lowsetup(void)
/* Setup pointers for accessing Page table and GDT in high address */
pdpt = &pdpt_low + X86_64_LOAD_OFFSET;
pd = &pd_low + X86_64_LOAD_OFFSET;
pt = &pt_low + X86_64_LOAD_OFFSET;
pdpt = (uint64_t *)((uintptr_t)&pdpt_low + X86_64_LOAD_OFFSET);
pd = (uint64_t *)((uintptr_t)&pd_low + X86_64_LOAD_OFFSET);
pt = (uint64_t *)((uintptr_t)&pt_low + X86_64_LOAD_OFFSET);
ist64 = (struct ist_s *)((void *)&ist64_low + X86_64_LOAD_OFFSET);
gdt64 = (struct gdt_entry_s *)((void *)&gdt64_low + X86_64_LOAD_OFFSET);
ist64 = (struct ist_s *)((uintptr_t)&ist64_low + X86_64_LOAD_OFFSET);
gdt64 = (struct gdt_entry_s *)((uintptr_t)&gdt64_low + X86_64_LOAD_OFFSET);
/* reload the GDTR with mapped high memory address */
setgdt(gdt64, (uintptr_t)(&gdt64_low_end - &gdt64_low) - 1);
setgdt((void *)gdt64, (uintptr_t)(&gdt64_low_end - &gdt64_low) - 1);
/* Do some checking on CPU compatibilities */

4
boards/x86_64/intel64/qemu-intel64/README.txt
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@ -42,7 +42,7 @@ set timeout=0
set default=0
menuentry "kernel" {
multiboot2 /boot/nuttx.elf
}
}
```
##### Making the disk
@ -79,7 +79,7 @@ Running QEMU
In the top-level NuttX directory:
qemu -cpu host -enable-kvm -m 2GB -cdrom boot.iso -nographic -serial mon:stdio
qemu-system-x86_64 -cpu host -enable-kvm -m 2G -cdrom boot.iso -nographic -serial mon:stdio
This multiplex the qemu console and COM1 to your console.
Use control-a 1 and 2 to switch between.