Fix typos (s/FRQUENCY/FREQUENCY/)

Fix various typos FRQUENCY -> FREQUENCY
This commit is contained in:
simbit18 2023-05-12 16:08:22 +02:00 committed by Xiang Xiao
parent 0a40287b13
commit aa0cb3f76f
11 changed files with 64 additions and 64 deletions

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@ -40,9 +40,9 @@
#define LOW_XTAL_FREQUENCY 15000000
#define MAX_XTAL_FREQUENCY 25000000
#define MAX_FCLKOUT_FREQUENCY 204000000
#define MAX_FCLKOUT_DIRECT 156000000
#define MAX_FCCO_FRQUENCY 320000000
#define MAX_FCLKOUT_FREQUENCY 204000000
#define MAX_FCLKOUT_DIRECT 156000000
#define MAX_FCCO_FREQUENCY 320000000
/* Configuration ************************************************************/
@ -66,7 +66,7 @@
# error "BOARD_FCLKOUT_FREQUENCY exceed the maximum"
#endif
#if BOARD_FCCO_FREQUENCY > MAX_FCCO_FRQUENCY
#if BOARD_FCCO_FREQUENCY > MAX_FCCO_FREQUENCY
# error "BOARD_FCCO_FREQUENCY exceed the maximum"
#endif
@ -97,13 +97,13 @@
# error "BOARD_XTAL_FREQUENCY value is not supported"
# endif
# if (2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
# if (2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
# error "Impossible value for BOARD_XTAL_FREQUENCY"
# elif (2 * 2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
# elif (2 * 2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV1
# elif (2 * 4 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
# elif (2 * 4 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV2
# elif (2 * 8 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
# elif (2 * 8 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV4
# else
# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV8

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@ -1639,7 +1639,7 @@ static int can_bittiming(struct sam_can_s *priv)
* selected Tq value, the desired BAUD and the CAN peripheral clock
* frequency.
*
* Tq = (BRP + 1) / CAN_FRQUENCY
* Tq = (BRP + 1) / CAN_FREQUENCY
* Tbit = Nquanta * (BRP + 1) / Fcan
* baud = Fcan / (Nquanta * (brp + 1))
* brp = Fcan / (baud * nquanta) - 1

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@ -883,15 +883,15 @@ static inline void sam_config_gclks(void)
* Setup PM main clock dividers to generate CPU, AHB, and APB clocks.
* Depends on:
*
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FRQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FRQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FRQUENCY - In Hz
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FREQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FREQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FREQUENCY - In Hz
*
* Input Parameters:
* None

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@ -1162,13 +1162,13 @@ static inline void sam_fdpll96m_refclk(void)
* Setup PM main clock dividers to generate CPU and AHB.
* Depends on:
*
* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
* BOARD_LOWPOWER_FREQUENCY - In Hz
* BOARD_BACKUP_DIVIDER - See MCLK_BUPDIV_DIV_* definitions
* BOARD_BACKUP_FREQUENCY - In Hz
* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
* BOARD_LOWPOWER_FREQUENCY - In Hz
* BOARD_BACKUP_DIVIDER - See MCLK_BUPDIV_DIV_* definitions
* BOARD_BACKUP_FREQUENCY - In Hz
*
* Input Parameters:
* None

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@ -286,15 +286,15 @@
/* Main clock dividers
*
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FRQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FRQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FRQUENCY - In Hz
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FREQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FREQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FREQUENCY - In Hz
*/
#define BOARD_CPU_FAILDECT 1

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@ -279,15 +279,15 @@
/* Main clock dividers
*
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FRQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FRQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FRQUENCY - In Hz
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FREQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FREQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FREQUENCY - In Hz
*/
#define BOARD_CPU_FAILDECT 1

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@ -286,15 +286,15 @@
/* Main clock dividers
*
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FRQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FRQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FRQUENCY - In Hz
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FREQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FREQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FREQUENCY - In Hz
*/
#define BOARD_CPU_FAILDECT 1

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@ -286,15 +286,15 @@
/* Main clock dividers
*
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FRQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FRQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FRQUENCY - In Hz
* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
* BOARD_APBA_FREQUENCY - In Hz
* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
* BOARD_APBB_FREQUENCY - In Hz
* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
* BOARD_APBC_FREQUENCY - In Hz
*/
#define BOARD_CPU_FAILDECT 1

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@ -429,7 +429,7 @@
/* Main clock dividers
*
* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
* BOARD_CPU_FRQUENCY - In Hz
* BOARD_CPU_FREQUENCY - In Hz
* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
* BOARD_LOWPOWER_FREQUENCY - In Hz

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@ -66,7 +66,7 @@
*/
#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
#undef BOARD_RTC_XTAL_FRQUENCY /* 32.768KHz RTC XTAL not available on the Relax Lite */
#undef BOARD_RTC_XTAL_FREQUENCY /* 32.768KHz RTC XTAL not available on the Relax Lite */
/* TODO: enable the RTC osc, use RTC for time/date
*/

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@ -62,7 +62,7 @@
/* On-board crystals */
#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
#define BOARD_RTC_XTAL_FRQUENCY 32769 /* 32.768KHz RTC XTAL */
#define BOARD_RTC_XTAL_FREQUENCY 32769 /* 32.768KHz RTC XTAL */
/* TODO: enable the RTC osc, use RTC for time/date
*/