Fix typos (s/FRQUENCY/FREQUENCY/)
Fix various typos FRQUENCY -> FREQUENCY
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@ -40,9 +40,9 @@
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#define LOW_XTAL_FREQUENCY 15000000
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#define MAX_XTAL_FREQUENCY 25000000
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#define MAX_FCLKOUT_FREQUENCY 204000000
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#define MAX_FCLKOUT_DIRECT 156000000
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#define MAX_FCCO_FRQUENCY 320000000
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#define MAX_FCLKOUT_FREQUENCY 204000000
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#define MAX_FCLKOUT_DIRECT 156000000
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#define MAX_FCCO_FREQUENCY 320000000
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/* Configuration ************************************************************/
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@ -66,7 +66,7 @@
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# error "BOARD_FCLKOUT_FREQUENCY exceed the maximum"
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#endif
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#if BOARD_FCCO_FREQUENCY > MAX_FCCO_FRQUENCY
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#if BOARD_FCCO_FREQUENCY > MAX_FCCO_FREQUENCY
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# error "BOARD_FCCO_FREQUENCY exceed the maximum"
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#endif
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@ -97,13 +97,13 @@
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# error "BOARD_XTAL_FREQUENCY value is not supported"
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# endif
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# if (2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
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# if (2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
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# error "Impossible value for BOARD_XTAL_FREQUENCY"
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# elif (2 * 2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
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# elif (2 * 2 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
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# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV1
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# elif (2 * 4 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
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# elif (2 * 4 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
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# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV2
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# elif (2 * 8 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FRQUENCY
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# elif (2 * 8 * BOARD_XTAL_FREQUENCY) > MAX_FCCO_FREQUENCY
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# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV4
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# else
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# define INIT_PSEL_VALUE PLL1_CTRL_PSEL_DIV8
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@ -1639,7 +1639,7 @@ static int can_bittiming(struct sam_can_s *priv)
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* selected Tq value, the desired BAUD and the CAN peripheral clock
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* frequency.
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*
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* Tq = (BRP + 1) / CAN_FRQUENCY
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* Tq = (BRP + 1) / CAN_FREQUENCY
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* Tbit = Nquanta * (BRP + 1) / Fcan
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* baud = Fcan / (Nquanta * (brp + 1))
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* brp = Fcan / (baud * nquanta) - 1
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@ -883,15 +883,15 @@ static inline void sam_config_gclks(void)
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* Setup PM main clock dividers to generate CPU, AHB, and APB clocks.
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* Depends on:
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*
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FRQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FRQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FRQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FREQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FREQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FREQUENCY - In Hz
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*
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* Input Parameters:
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* None
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@ -1162,13 +1162,13 @@ static inline void sam_fdpll96m_refclk(void)
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* Setup PM main clock dividers to generate CPU and AHB.
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* Depends on:
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*
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* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
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* BOARD_LOWPOWER_FREQUENCY - In Hz
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* BOARD_BACKUP_DIVIDER - See MCLK_BUPDIV_DIV_* definitions
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* BOARD_BACKUP_FREQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
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* BOARD_LOWPOWER_FREQUENCY - In Hz
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* BOARD_BACKUP_DIVIDER - See MCLK_BUPDIV_DIV_* definitions
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* BOARD_BACKUP_FREQUENCY - In Hz
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*
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* Input Parameters:
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* None
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@ -286,15 +286,15 @@
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/* Main clock dividers
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*
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FRQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FRQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FRQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FREQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FREQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FREQUENCY - In Hz
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*/
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#define BOARD_CPU_FAILDECT 1
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@ -279,15 +279,15 @@
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/* Main clock dividers
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*
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FRQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FRQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FRQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FREQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FREQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FREQUENCY - In Hz
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*/
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#define BOARD_CPU_FAILDECT 1
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@ -286,15 +286,15 @@
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/* Main clock dividers
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*
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FRQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FRQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FRQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FREQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FREQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FREQUENCY - In Hz
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*/
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#define BOARD_CPU_FAILDECT 1
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@ -286,15 +286,15 @@
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/* Main clock dividers
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*
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FRQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FRQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FRQUENCY - In Hz
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* BOARD_CPU_DIVIDER - See PM_CPUSEL_CPUDIV_* definitions
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_APBA_DIVIDER - See M_APBASEL_APBADIV_* definitions
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* BOARD_APBA_FREQUENCY - In Hz
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* BOARD_APBB_DIVIDER - See M_APBBSEL_APBBDIV_* definitions
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* BOARD_APBB_FREQUENCY - In Hz
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* BOARD_APBC_DIVIDER - See M_APBCSEL_APBCDIV_* definitions
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* BOARD_APBC_FREQUENCY - In Hz
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*/
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#define BOARD_CPU_FAILDECT 1
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@ -429,7 +429,7 @@
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/* Main clock dividers
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*
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* BOARD_CPU_DIVIDER - See MCLK_CPUDIV_DIV* definitions
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* BOARD_CPU_FRQUENCY - In Hz
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* BOARD_CPU_FREQUENCY - In Hz
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* BOARD_CPU_FAILDECT - Boolean (defined / not defined)
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* BOARD_LOWPOWER_DIVIDER - See MCLK_LPDIV_DIV_* definitions
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* BOARD_LOWPOWER_FREQUENCY - In Hz
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@ -66,7 +66,7 @@
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*/
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#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
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#undef BOARD_RTC_XTAL_FRQUENCY /* 32.768KHz RTC XTAL not available on the Relax Lite */
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#undef BOARD_RTC_XTAL_FREQUENCY /* 32.768KHz RTC XTAL not available on the Relax Lite */
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/* TODO: enable the RTC osc, use RTC for time/date
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*/
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@ -62,7 +62,7 @@
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/* On-board crystals */
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#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
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#define BOARD_RTC_XTAL_FRQUENCY 32769 /* 32.768KHz RTC XTAL */
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#define BOARD_RTC_XTAL_FREQUENCY 32769 /* 32.768KHz RTC XTAL */
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/* TODO: enable the RTC osc, use RTC for time/date
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*/
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