From aaa697ec8316afe7f2285efe6d14aaa3906d7cbb Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 4 Oct 2015 15:26:51 -0600 Subject: [PATCH] Remove dangling whitespace --- arch/arm/src/sama5/sam_hsmci.c | 38 ++++++++++++------------ arch/arm/src/samv7/sam_clockconfig.c | 2 +- arch/arm/src/stm32/stm32_procfs_ccm.c | 2 +- arch/arm/src/stm32f7/stm32_procfs_dtcm.c | 2 +- arch/sim/src/up_spiflash.c | 8 ++--- 5 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm/src/sama5/sam_hsmci.c b/arch/arm/src/sama5/sam_hsmci.c index 18d77d25a8..c82a9a77cf 100644 --- a/arch/arm/src/sama5/sam_hsmci.c +++ b/arch/arm/src/sama5/sam_hsmci.c @@ -229,9 +229,9 @@ */ #define HSMCI_STATUS_ERRORS \ - ( HSMCI_INT_UNRE | HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | \ - HSMCI_INT_DTOE | HSMCI_INT_DCRCE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | \ - HSMCI_INT_RCRCE | HSMCI_INT_RDIRE | HSMCI_INT_RINDE ) + (HSMCI_INT_UNRE | HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | \ + HSMCI_INT_DTOE | HSMCI_INT_DCRCE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | \ + HSMCI_INT_RCRCE | HSMCI_INT_RDIRE | HSMCI_INT_RINDE) /* Response errors: * @@ -244,13 +244,13 @@ */ #define HSMCI_RESPONSE_ERRORS \ - ( HSMCI_INT_CSTOE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | HSMCI_INT_RCRCE | \ - HSMCI_INT_RDIRE | HSMCI_INT_RINDE ) + (HSMCI_INT_CSTOE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | HSMCI_INT_RCRCE | \ + HSMCI_INT_RDIRE | HSMCI_INT_RINDE) #define HSMCI_RESPONSE_NOCRC_ERRORS \ - ( HSMCI_INT_CSTOE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | HSMCI_INT_RDIRE | \ - HSMCI_INT_RINDE ) + (HSMCI_INT_CSTOE | HSMCI_INT_RTOE | HSMCI_INT_RENDE | HSMCI_INT_RDIRE | \ + HSMCI_INT_RINDE) #define HSMCI_RESPONSE_TIMEOUT_ERRORS \ - ( HSMCI_INT_CSTOE | HSMCI_INT_RTOE ) + (HSMCI_INT_CSTOE | HSMCI_INT_RTOE) /* Data transfer errors: * @@ -263,18 +263,18 @@ */ #define HSMCI_DATA_ERRORS \ - ( HSMCI_INT_UNRE | HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | \ - HSMCI_INT_DTOE | HSMCI_INT_DCRCE ) + (HSMCI_INT_UNRE | HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | \ + HSMCI_INT_DTOE | HSMCI_INT_DCRCE) #define HSMCI_DATA_TIMEOUT_ERRORS \ - ( HSMCI_INT_CSTOE | HSMCI_INT_DTOE ) + (HSMCI_INT_CSTOE | HSMCI_INT_DTOE) #define HSMCI_DATA_RECV_ERRORS \ - ( HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | HSMCI_INT_DTOE | \ - HSMCI_INT_DCRCE ) + (HSMCI_INT_OVRE | HSMCI_INT_BLKOVRE | HSMCI_INT_CSTOE | HSMCI_INT_DTOE | \ + HSMCI_INT_DCRCE) #define HSMCI_DATA_DMASEND_ERRORS \ - ( HSMCI_INT_UNRE | HSMCI_INT_CSTOE | HSMCI_INT_DTOE | HSMCI_INT_DCRCE ) + (HSMCI_INT_UNRE | HSMCI_INT_CSTOE | HSMCI_INT_DTOE | HSMCI_INT_DCRCE) /* Data transfer status and interrupt mask bits. * @@ -291,11 +291,11 @@ */ #define HSMCI_RECV_INTS \ - ( HSMCI_DATA_RECV_ERRORS | HSMCI_INT_RXRDY) + (HSMCI_DATA_RECV_ERRORS | HSMCI_INT_RXRDY) #define HSMCI_DMARECV_INTS \ - ( HSMCI_DATA_RECV_ERRORS | HSMCI_INT_XFRDONE /* | HSMCI_INT_DMADONE */ ) + (HSMCI_DATA_RECV_ERRORS | HSMCI_INT_XFRDONE /* | HSMCI_INT_DMADONE */) #define HSMCI_DMASEND_INTS \ - ( HSMCI_DATA_DMASEND_ERRORS | HSMCI_INT_XFRDONE /* | HSMCI_INT_DMADONE */ ) + (HSMCI_DATA_DMASEND_ERRORS | HSMCI_INT_XFRDONE /* | HSMCI_INT_DMADONE */) /* Event waiting interrupt mask bits. * @@ -307,9 +307,9 @@ */ #define HSMCI_CMDRESP_INTS \ - ( HSMCI_RESPONSE_ERRORS | HSMCI_INT_CMDRDY ) + (HSMCI_RESPONSE_ERRORS | HSMCI_INT_CMDRDY) #define HSMCI_CMDRESP_NOCRC_INTS \ - ( HSMCI_RESPONSE_NOCRC_ERRORS | HSMCI_INT_CMDRDY ) + (HSMCI_RESPONSE_NOCRC_ERRORS | HSMCI_INT_CMDRDY) /* Register logging support */ diff --git a/arch/arm/src/samv7/sam_clockconfig.c b/arch/arm/src/samv7/sam_clockconfig.c index 82b834a53d..35afb26fff 100644 --- a/arch/arm/src/samv7/sam_clockconfig.c +++ b/arch/arm/src/samv7/sam_clockconfig.c @@ -68,7 +68,7 @@ BOARD_CKGR_MOR_MOSCXTST | PMC_CKGR_MOR_KEY) #define BOARD_CKGR_PLLAR (BOARD_CKGR_PLLAR_DIV | BOARD_CKGR_PLLAR_COUNT | \ BOARD_CKGR_PLLAR_MUL | PMC_CKGR_PLLAR_ONE) - + #define BOARD_PMC_MCKR_FAST (PMC_MCKR_CSS_MAIN | BOARD_PMC_MCKR_PRES | \ BOARD_PMC_MCKR_MDIV | BOARD_PMC_MCKR_UPLLDIV2) #define BOARD_PMC_MCKR (BOARD_PMC_MCKR_CSS | BOARD_PMC_MCKR_PRES | \ diff --git a/arch/arm/src/stm32/stm32_procfs_ccm.c b/arch/arm/src/stm32/stm32_procfs_ccm.c index a74c4c7686..927a102716 100644 --- a/arch/arm/src/stm32/stm32_procfs_ccm.c +++ b/arch/arm/src/stm32/stm32_procfs_ccm.c @@ -222,7 +222,7 @@ static ssize_t ccm_read(FAR struct file *filep, FAR char *buffer, mm_mallinfo(&g_ccm_heap, &mem); - + remaining = buflen; totalsize = 0; diff --git a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c index 2ca6687783..12b1e91565 100644 --- a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c +++ b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c @@ -228,7 +228,7 @@ static ssize_t dtcm_read(FAR struct file *filep, FAR char *buffer, mm_mallinfo(&g_dtcm_heap, &mem); - + remaining = buflen; totalsize = 0; diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c index 0118dd7638..69d80b0e72 100644 --- a/arch/sim/src/up_spiflash.c +++ b/arch/sim/src/up_spiflash.c @@ -586,7 +586,7 @@ static void spiflash_sectorerase(FAR struct sim_spiflashdev_s *priv) uint32_t len; /* Ensure the WREN bit is set before any erase operation */ - + if (priv->wren) { address = priv->address; @@ -645,7 +645,7 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data break; /* Sector / Subsector erase */ - + case SPIFLASH_SE: case SPIFLASH_SSE: priv->state = SPIFLASH_STATE_SE1; @@ -657,7 +657,7 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data priv->state = SPIFLASH_STATE_IDLE; if (priv->wren) { - memset(priv->data, 0xff, CONFIG_SPIFLASH_SIZE); + memset(priv->data, 0xff, CONFIG_SPIFLASH_SIZE); } break; @@ -755,7 +755,7 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data * the actual FLASH. */ - if ((priv->address & CONFIG_SIM_SPIFLASH_PAGESIZE_MASK) == + if ((priv->address & CONFIG_SIM_SPIFLASH_PAGESIZE_MASK) == CONFIG_SIM_SPIFLASH_PAGESIZE_MASK) { priv->address &= !CONFIG_SIM_SPIFLASH_PAGESIZE_MASK;