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Merge remote-tracking branch 'origin/master' into netiob

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This commit is contained in:
Gregory Nutt 2014-07-02 16:05:32 -06:00
commit ab3d499be8
12 changed files with 298 additions and 139 deletions
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4
ChangeLog
View File

@ -7620,3 +7620,7 @@
in new bits (2014-7-1).
* drivers/syslog/ramlog.c: syslog_putc needs to set the errno and
return EOF on a failure (2014-7-1).
* SAM3/4 and SAMA5 Ethernet: Fix an error in the function that
determines the number of free TX descriptors. This is an importnat
bugfix on busy networks (2014-7-2).

22
arch/arm/src/sam34/sam_emac.c
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@ -516,7 +516,7 @@ static uint16_t sam_txinuse(struct sam_emac_s *priv)
uint32_t txhead32 = (uint32_t)priv->txhead;
if ((uint32_t)priv->txtail > txhead32)
{
return txhead32 += CONFIG_SAM34_EMAC_NTXBUFFERS;
txhead32 += CONFIG_SAM34_EMAC_NTXBUFFERS;
}
return (uint16_t)(txhead32 - (uint32_t)priv->txtail);
@ -770,8 +770,8 @@ static int sam_transmit(struct sam_emac_s *priv)
/* If we have no more available TX descriptors, then we must disable the
* RCOMP interrupt to stop further RX processing. Why? Because EACH RX
* packet that is dispatch is also an opportunity to replay with the a TX
* packet. So, if we cannot handle an RX packet replay, then we disable
* packet that is dispatched is also an opportunity to reply with a TX
* packet. So, if we cannot handle an RX packet reply, then we disable
* all RX packet processing.
*/
@ -1092,8 +1092,8 @@ static int sam_recvframe(struct sam_emac_s *priv)
* Function: sam_receive
*
* Description:
* An interrupt was received indicating the availability of a new RX packet
* in FIFO memory.
* An interrupt was received indicating the availability of one or more
* new RX packets in FIFO memory.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1180,8 +1180,8 @@ static void sam_receive(struct sam_emac_s *priv)
* Function: sam_txdone
*
* Description:
* An interrupt was received indicating that a frame has completed
* transmission.
* An interrupt was received indicating that one or more frames have
* completed transmission.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1198,9 +1198,9 @@ static void sam_txdone(struct sam_emac_s *priv)
{
struct emac_txdesc_s *txdesc;
/* Are there any outstanding transmssions? Loop until either (1) all of
* the TX have been examined, or (2) until we encounter the first
* descriptor that is still in use by the hardware.
/* Are there any outstanding transmissions? Loop until either (1) all of
* the TX descriptors have been examined, or (2) until we encounter the
* first descriptor that is still in use by the hardware.
*/
while (priv->txhead != priv->txtail)
@ -1251,7 +1251,7 @@ static void sam_txdone(struct sam_emac_s *priv)
/* At least one TX descriptor is available. Re-enable RX interrupts.
* RX interrupts may previously have been disabled when we ran out of
* TX desciptors (see commits in sam_transmit()).
* TX descriptors (see comments in sam_transmit()).
*/
sam_putreg(priv, SAM_EMAC_IER, EMAC_INT_RCOMP);

1
arch/arm/src/sama5/chip/sam_pmc.h
View File

@ -420,6 +420,7 @@
#define PMC_PCR_CMD (1 << 12) /* Bit 12: Command */
#ifdef ATSAMA5D3
# define SAMA5_HAVE_PMC_PCR_DIV 1 /* Supports conditional compilation */
# define PMC_PCR_DIV_SHIFT (16) /* Bits 16-17: Divisor Value */
# define PMC_PCR_DIV_MASK (3 << PMC_PCR_DIV_SHIFT)
# define PMC_PCR_DIV1 (0 << PMC_PCR_DIV_SHIFT) /* Peripheral clock is MCK */

20
arch/arm/src/sama5/sam_emaca.c
View File

@ -521,7 +521,7 @@ static uint16_t sam_txinuse(struct sam_emac_s *priv)
uint32_t txhead32 = (uint32_t)priv->txhead;
if ((uint32_t)priv->txtail > txhead32)
{
return txhead32 += CONFIG_SAMA5_EMAC_NTXBUFFERS;
txhead32 += CONFIG_SAMA5_EMAC_NTXBUFFERS;
}
return (uint16_t)(txhead32 - (uint32_t)priv->txtail);
@ -780,8 +780,8 @@ static int sam_transmit(struct sam_emac_s *priv)
/* If we have no more available TX descriptors, then we must disable the
* RCOMP interrupt to stop further RX processing. Why? Because EACH RX
* packet that is dispatch is also an opportunity to replay with the a TX
* packet. So, if we cannot handle an RX packet replay, then we disable
* packet that is dispatched is also an opportunity to reply with a TX
* packet. So, if we cannot handle an RX packet reply, then we disable
* all RX packet processing.
*/
@ -1132,8 +1132,8 @@ static int sam_recvframe(struct sam_emac_s *priv)
* Function: sam_receive
*
* Description:
* An interrupt was received indicating the availability of a new RX packet
* in FIFO memory.
* An interrupt was received indicating the availability of one or more
* new RX packets in FIFO memory.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1220,8 +1220,8 @@ static void sam_receive(struct sam_emac_s *priv)
* Function: sam_txdone
*
* Description:
* An interrupt was received indicating that a frame has completed
* transmission.
* An interrupt was received indicating that one or more frames have
* completed transmission.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1239,8 +1239,8 @@ static void sam_txdone(struct sam_emac_s *priv)
struct emac_txdesc_s *txdesc;
/* Are there any outstanding transmissions? Loop until either (1) all of
* the TX have been examined, or (2) until we encounter the first
* descriptor that is still in use by the hardware.
* the TX descriptors have been examined, or (2) until we encounter the
* first descriptor that is still in use by the hardware.
*/
while (priv->txhead != priv->txtail)
@ -1293,7 +1293,7 @@ static void sam_txdone(struct sam_emac_s *priv)
/* At least one TX descriptor is available. Re-enable RX interrupts.
* RX interrupts may previously have been disabled when we ran out of
* TX desciptors (see commits in sam_transmit()).
* TX descriptors (see comments in sam_transmit()).
*/
sam_putreg(priv, SAM_EMAC_IER, EMAC_INT_RCOMP);

49
arch/arm/src/sama5/sam_emacb.c
View File

@ -843,7 +843,7 @@ static uint16_t sam_txinuse(struct sam_emac_s *priv)
uint32_t txhead32 = (uint32_t)priv->txhead;
if ((uint32_t)priv->txtail > txhead32)
{
return txhead32 += priv->attr->ntxbuffers;
txhead32 += priv->attr->ntxbuffers;
}
return (uint16_t)(txhead32 - (uint32_t)priv->txtail);
@ -1102,8 +1102,8 @@ static int sam_transmit(struct sam_emac_s *priv)
/* If we have no more available TX descriptors, then we must disable the
* RCOMP interrupt to stop further RX processing. Why? Because EACH RX
* packet that is dispatch is also an opportunity to replay with the a TX
* packet. So, if we cannot handle an RX packet replay, then we disable
* packet that is dispatched is also an opportunity to replay with a TX
* packet. So, if we cannot handle an RX packet reply, then we disable
* all RX packet processing.
*/
@ -1259,7 +1259,6 @@ static int sam_recvframe(struct sam_emac_s *priv)
cp15_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
nllvdbg("rxndx: %d\n", rxndx);
while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
@ -1403,10 +1402,10 @@ static int sam_recvframe(struct sam_emac_s *priv)
*/
nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
nlldbg("ERROR: Buffer size %d; frame size %d\n",
dev->d_len, pktlen);
return -E2BIG;
}
@ -1454,8 +1453,8 @@ static int sam_recvframe(struct sam_emac_s *priv)
* Function: sam_receive
*
* Description:
* An interrupt was received indicating the availability of a new RX packet
* in FIFO memory.
* An interrupt was received indicating the availability of one or more
* new RX packets in FIFO memory.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1542,8 +1541,8 @@ static void sam_receive(struct sam_emac_s *priv)
* Function: sam_txdone
*
* Description:
* An interrupt was received indicating that a frame has completed
* transmission.
* An interrupt was received indicating that one or more frames have
* completed transmission.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1559,10 +1558,13 @@ static void sam_receive(struct sam_emac_s *priv)
static void sam_txdone(struct sam_emac_s *priv)
{
struct emac_txdesc_s *txdesc;
#ifndef __NO_KLUDGES__
int ntxdone = 0;
#endif
/* Are there any outstanding transmissions? Loop until either (1) all of
* the TX have been examined, or (2) until we encounter the first
* descriptor that is still in use by the hardware.
* the TX descriptors have been examined, or (2) until we encounter the
* first descriptor that is still in use by the hardware.
*/
while (priv->txhead != priv->txtail)
@ -1575,7 +1577,20 @@ static void sam_txdone(struct sam_emac_s *priv)
/* Is this TX descriptor still in use? */
#ifndef __NO_KLUDGES__
# warning REVISIT
/* I have seen cases where we receive interrupts, but the USED
* bit is never set in the TX descriptor. This logic assumes
* that if we got the interrupt, then there most be at least
* one packet that completed. This is not necessarily a safe
* assumption.
*/
ntxdone++;
if ((txdesc->status & EMACTXD_STA_USED) == 0 && ntxdone > 1)
#else
if ((txdesc->status & EMACTXD_STA_USED) == 0)
#endif
{
/* Yes.. the descriptor is still in use. However, I have seen a
* case (only repeatable on start-up) where the USED bit is never
@ -1604,6 +1619,14 @@ static void sam_txdone(struct sam_emac_s *priv)
}
}
#ifndef __NO_KLUDGES__
/* Make sure that the USED bit is set */
txdesc->status = (uint32_t)EMACTXD_STA_USED;
cp15_clean_dcache((uintptr_t)txdesc,
(uintptr_t)txdesc + sizeof(struct emac_txdesc_s));
#endif
/* Increment the tail index */
if (++priv->txtail >= priv->attr->ntxbuffers)
@ -1615,7 +1638,7 @@ static void sam_txdone(struct sam_emac_s *priv)
/* At least one TX descriptor is available. Re-enable RX interrupts.
* RX interrupts may previously have been disabled when we ran out of
* TX descriptors (see commits in sam_transmit()).
* TX descriptors (see comments in sam_transmit()).
*/
sam_putreg(priv, SAM_EMAC_IER_OFFSET, EMAC_INT_RCOMP);

22
arch/arm/src/sama5/sam_gmac.c
View File

@ -452,7 +452,7 @@ static uint16_t sam_txinuse(struct sam_gmac_s *priv)
uint32_t txhead32 = (uint32_t)priv->txhead;
if ((uint32_t)priv->txtail > txhead32)
{
return txhead32 += CONFIG_SAMA5_GMAC_NTXBUFFERS;
txhead32 += CONFIG_SAMA5_GMAC_NTXBUFFERS;
}
return (uint16_t)(txhead32 - (uint32_t)priv->txtail);
@ -712,8 +712,8 @@ static int sam_transmit(struct sam_gmac_s *priv)
/* If we have no more available TX descriptors, then we must disable the
* RCOMP interrupt to stop further RX processing. Why? Because EACH RX
* packet that is dispatch is also an opportunity to replay with the a TX
* packet. So, if we cannot handle an RX packet replay, then we disable
* packet that is dispatched is also an opportunity to reply with a TX
* packet. So, if we cannot handle an RX packet reply, then we disable
* all RX packet processing.
*/
@ -1062,8 +1062,8 @@ static int sam_recvframe(struct sam_gmac_s *priv)
* Function: sam_receive
*
* Description:
* An interrupt was received indicating the availability of a new RX packet
* in FIFO memory.
* An interrupt was received indicating the availability of onr or more
* new RX packets in FIFO memory.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1150,8 +1150,8 @@ static void sam_receive(struct sam_gmac_s *priv)
* Function: sam_txdone
*
* Description:
* An interrupt was received indicating that a frame has completed
* transmission.
* An interrupt was received indicating that one or more frames have
* completed transmission.
*
* Parameters:
* priv - Reference to the driver state structure
@ -1168,9 +1168,9 @@ static void sam_txdone(struct sam_gmac_s *priv)
{
struct gmac_txdesc_s *txdesc;
/* Are there any outstanding transmssions? Loop until either (1) all of
* the TX have been examined, or (2) until we encounter the first
* descriptor that is still in use by the hardware.
/* Are there any outstanding transmissions? Loop until either (1) all of
* the TX descriptors have been examined, or (2) until we encounter the
* first descriptor that is still in use by the hardware.
*/
while (priv->txhead != priv->txtail)
@ -1221,7 +1221,7 @@ static void sam_txdone(struct sam_gmac_s *priv)
/* At least one TX descriptor is available. Re-enable RX interrupts.
* RX interrupts may previously have been disabled when we ran out of
* TX desciptors (see commits in sam_transmit()).
* TX descriptors (see comments in sam_transmit()).
*/
sam_putreg(priv, SAM_GMAC_IER, GMAC_INT_RCOMP);

13
arch/arm/src/sama5/sam_twi.c
View File

@ -1167,8 +1167,11 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
/* Determine the maximum valid frequency setting */
mck = BOARD_MCK_FREQUENCY;
DEBUGASSERT((mck >> 3) <= TWI_MAX_FREQUENCY);
#ifdef SAMA5_HAVE_PMC_PCR_DIV
/* Select the optimal value for the PCR DIV field */
DEBUGASSERT((mck >> 3) <= TWI_MAX_FREQUENCY);
if (mck <= TWI_MAX_FREQUENCY)
{
priv->frequency = mck;
@ -1190,6 +1193,14 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
regval = PMC_PCR_DIV8;
}
#else
/* No DIV field in the PCR register */
priv->frequency = mck;
regval = 0;
#endif /* SAMA5_HAVE_PMC_PCR_DIV */
/* Set the TWI peripheral input clock to the maximum, valid frequency */
regval |= PMC_PCR_PID(pid) | PMC_PCR_CMD | PMC_PCR_EN;

192
configs/sama5d4-ek/README.txt
View File

@ -1124,6 +1124,9 @@ Networking
configuration options. The SAMA5D44 supports two different 10/100Base-T
Ethernet MAC peripherals.
NOTE: See the "kludge" for EMAC that is documented in the To-Do
list at the end of this README file.
------------------------------ ------------------- -------------------------
SAMA5D4 PIO SAMA5D4-MB KSZ8081RNB
------------------------------ ------------------- -------------------------
@ -1757,11 +1760,6 @@ USB High-Speed Host
Application Configuration -> NSH Library
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
NOTE: When OHCI is selected, the SAMA5 will operate at 384MHz instead of
396MHz. This is so that the PLL generates a frequency which is a multiple
of the 48MHz needed for OHCI. The delay loop calibration values that are
used will be off slightly because of this.
EHCI
----
@ -2315,9 +2313,9 @@ I2C Tool
CONFIG_SAMA5_TWI2=y : Enable TWI2
System Type -> TWI device driver options
SAMA5_TWI0_FREQUENCY=100000 : Select a TWI0 frequency
SAMA5_TWI1_FREQUENCY=100000 : Select a TWI1 frequency
SAMA5_TWI2_FREQUENCY=100000 : Select a TWI2 frequency
SAMA5_TWI0_FREQUENCY=100000 : Select a TWI0 frequency (default)
SAMA5_TWI1_FREQUENCY=100000 : Select a TWI1 frequency (default)
SAMA5_TWI2_FREQUENCY=100000 : Select a TWI2 frequency (default)
Device Drivers -> I2C Driver Support
CONFIG_I2C=y : Enable I2C support
@ -3020,29 +3018,12 @@ Configurations
create a very corrupt configuration that may not be easy to recover
from.
4. The SAMA5Dx is running at 396MHz by default in these configurations.
This is because the original timing for the PLLs, NOR FLASH, and SDRAM
came from the Atmel NoOS sample code which runs at that rate.
The SAMA5Dx is capable of running at 528MHz, however, and is easily
re-configured:
4. The SAMA5Dx is running at 528MHz by default in these configurations.
Board Selection -> CPU Frequency
CONFIG_SAMA5D4EK_396MHZ=n # Disable 396MHz operation
CONFIG_SAMA5D4EK_528MHZ=y # Enable 528MHz operation
If you switch to 528MHz, you should also check the loop calibration
value in your .config file. Of course, it would be best to re-calibrate
the timing loop, but these values should get you in the ballpark:
CONFIG_BOARD_LOOPSPERMSEC=49341 # Calibrated on SAMA5D3-EK at 396MHz
# running from ISRAM
CONFIG_BOARD_LOOPSPERMSEC=65775 # Calibrated on SAMA5D3-Xplained at
# 528MHz running from SDRAM
Operation at 528MHz has been verified but is not the default in these
configurations because most testing was done at 396MHz. NAND has not
been verified at these rates.
CONFIG_SAMA5D4EK_528MHZ=y : Enable 528MHz operation
CONFIG_BOARD_LOOPSPERMSEC=65775 : Calibrated on SAMA5D3-Xplained at
: 528MHz running from SDRAM
Configuration Sub-directories
-----------------------------
@ -3283,9 +3264,12 @@ Configurations
CONFIG_DEV_RANDOM=y : Enables /dev/random
6. This configuration has support for NSH built-in applications enabled.
Only one built-in application is included by default, however: The
I2C Tool. See the section above entitle "I2C Tool" and the note with
regar to I2C below.
7. This configuration has support for the FAT and ROMFS file systems
built in.
7. This configuration has support for the FAT, ROMFS, and PROCFS file
systems built in.
The FAT file system includes long file name support. Please be aware
that Microsoft claims patents against the long file name support (see
@ -3301,16 +3285,21 @@ Configurations
CONFIG_FS_ROMFS=y : Enable ROMFS file system
8. An NSH star-up script is provided by the ROMFS file system. The ROMFS
The ROMFS file system is enabled simply with:
CONFIG_FS_PROCFS=y : Enable PROCFS file system
8. An NSH start-up script is provided by the ROMFS file system. The ROMFS
file system is mounted at /etc and provides:
|- dev/
| `- ram0
| |- ...
| `- ram0 : ROMFS block driver
`- etc/
`- init.d/
`- rcS
`- rcS : Start-up script
(There will, of course, be other devices uner /dev include /dev/console,
(There will, of course, be other devices under /dev including /dev/console,
/dev/null, /dev/zero, /dev/random, etc.).
Relevant configuration options include:
@ -3323,24 +3312,86 @@ Configurations
The content of /etc/init.d/rcS can be see in the file rcS.template that
can be found at: configs/sama5d4-ek/include/rcS.template:
mkrd -m 2 -s 512 1024
# Mount the procfs file system at /proc
mount -f procfs /proc
echo "rcS: Mounted /proc"
# Create a RAMDISK at /dev/ram1, size 0.5MiB, format it with a FAT
# file system and mount it at /tmp
mkrd -m 1 -s 512 1024
mkfatfs /dev/ram1
mount -t vfat /dev/ram1 /tmp
echo "rcS: Mounted /tmp"
The above commands will create a RAM disk block device at /dev/ram1.
The RAM disk will take 0.4MiB of memory (512 x 1024). Then it will
create a FAT file system on the ram disk and mount it at /tmp. So
after NSH starts and runs the rcS script, we will have:
The above commands will mount the procfs file system at /proc and a
RAM disk at /tmp.
The second group of commands will: (1) Create a RAM disk block device
at /dev/ram1 (mkrd). The RAM disk will take 0.4MiB of memory (512 x
1024). Then it will then: (2) create a FAT file system on the ram
disk (mkfatfs) and (3) mount it at /tmp (mount).
So after NSH starts and runs the rcS script, we will have:
|- dev/
| |- ram0
| `- ram2
| |- ...
| `- ram0 : ROMFS block driver
| `- ram1 : RAM disk block driver
|- etc/
| `- init.d/
| `- rcS
`- tmp/
| `- rcS : Start-up script
|- proc/
| |- 0/ : Information about Task ID 0
| | |- cmdline : Command line used to start the task
| | |- stack : Stack allocation
| | |- status : Current task status
| | `- group/ : Information about the task group
| | |- fd : File descriptors open in the group
| | `- status : Status of the group
| |- 1/ : Information about Task ID 1
| | `- ... : Same psuedo-directories as for Task ID 0
| |- ... : ...
| |- n/ : Information about Task ID n
| | `- ... : Same psuedo-directories as for Task ID 0
| |- uptime : Processor uptime
`- tmp/
The /tmp directory can them be used for and scratch purpose.
The /tmp directory can them be used for and scratch purpose. The
pseudo-files in the proc/ directory can be used to query properties
of NuttX. As examples:
nsh> cat /proc/1/stack
StackBase: 0x2003b1e8
StackSize: 2044
nsh> cat /proc/uptime
31.89
nsh> cat /proc/1/status
Name: work
Type: Kernel thread
State: Signal wait
Priority: 192
Scheduler: SCHED_FIFO
SigMask: 00000000
nsh> cat /proc/1/cmdline
work
nsh> cat /proc/1/group/status
Flags: 0x00
Members: 1
nsh> cat /proc/1/group/fd
FD POS OFLAGS
0 0 0003
1 0 0003
2 0 0003
SD RF TYP FLAGS
9. The Real Time Clock/Calendar (RTC) is enabled in this configuration.
See the section entitled "RTC" above for detailed configuration
@ -3392,23 +3443,28 @@ Configurations
large if no network is attached (A production design would bring up
the network asynchronously to avoid these start up delays).
12. The SAMA5D4-EK includes for an AT25 serial DataFlash. That support is
See the "kludge" for EMAC that is documented in the To-Do list at
the end of this README file.
12. I2C Tool. This configuration enables TWI0 (only) as an I2C master
device. This configuration also supports the I2C tool at
apps/system/i2c that can be used to peek and poke I2C devices on the
TIW0 bus. See the discussion above under "I2C Tool" for detailed
configuration settings.
13. The SAMA5D4-EK includes for an AT25 serial DataFlash. That support is
NOT enabled in this configuration. Support for that serial FLASH can
be enabled by modifying the NuttX configuration as described above in
the paragraph entitled "AT25 Serial FLASH".
13. Support the USB low-, high- and full-speed OHCI host driver can be
14. Support the USB low-, high- and full-speed OHCI host driver can be
enabled by changing the NuttX configuration file as described in the
section entitled "USB High-Speed Host" above.
14. Support the USB high-speed USB device driver (UDPHS) can be enabled
15. Support the USB high-speed USB device driver (UDPHS) can be enabled
by changing the NuttX configuration file as described above in the
section entitled "USB High-Speed Device."
15. I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be
used to peek and poke I2C devices. See the discussion above under
"I2C Tool" for detailed configuration settings.
16. This example can be configured to exercise the watchdog timer test
(apps/examples/watchdog). See the detailed configuration settings in
the section entitled "Watchdog Timer" above.
@ -3492,7 +3548,37 @@ To-Do List
Also, we should be receiving interrupts when an SD card is inserted or
removed; we are not.
4) Some drivers may require some adjustments if you intend to run from SDRAM.
4) There is a kludge in place in the Ethernet code to work around a problem
that I see. The problem that I see is as follows:
a. To send packets, the software keeps a queue of TX descriptors in
memory.
b. When a packet is ready to be sent, the software clears bit 31 of a
status word in the descriptor meaning that the descriptor now
"belongs" to the hardware.
c. The hardware sets bit 31 in memory when the transfer completes.
The problem that I see is that:
d. Occasionally bit 31 of the status word is not cleared even though
the Ethernet packet was successfully sent.
Since the software does not see bit 31 set, it seems like the transfer
did not complete and the Ethernet locks up.
The workaround/kludge that is in place makes this assumption: If an
Ethernet transfer complete interrupt is received, then at least one
packet must have completed. In this case, the software ignores
checking the USED bit for one packet.
With this kludge in place, the driver appears to work fine. However,
there is a danger to what I have done: If a spurious interrupt
occurs, than the USED bit would not be set and the transfer would be
lost.
5) Some drivers may require some adjustments if you intend to run from SDRAM.
That is because in this case macros like BOARD_MCK_FREQUENCY are not constants
but are instead function calls: The MCK clock frequency is not known in
advance but instead has to be calculated from the bootloader PLL configuration.

62
configs/sama5d4-ek/include/nsh_romfsimg.h
View File

@ -1,6 +1,6 @@
unsigned char romfs_img[] = {
0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x01, 0x50,
0x9f, 0x13, 0x82, 0x87, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56,
0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x02, 0x00,
0xe7, 0x04, 0x63, 0xbd, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56,
0x6f, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49,
0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97,
0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@ -12,36 +12,36 @@ unsigned char romfs_img[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0,
0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x00,
0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3a, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x6e, 0x8d, 0x9c, 0xab, 0x58, 0x72, 0x63, 0x53, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

8
configs/sama5d4-ek/include/rcS.template
View File

@ -1,6 +1,12 @@
# Mount the procfs file system at /proc
mount -t procfs /proc
echo "rcS: Mounted /proc"
# Create a RAMDISK at /dev/ram1, size 0.5MiB, format it with a FAT
# file system and mount it at /tmp
mkrd -m 2 -s 512 1024
mkrd -m 1 -s 512 1024
mkfatfs /dev/ram1
mount -t vfat /dev/ram1 /tmp
echo "rcS: Mounted /tmp"

42
configs/sama5d4-ek/nsh/defconfig
View File

@ -186,7 +186,7 @@ CONFIG_SAMA5_HSMC=y
# CONFIG_SAMA5_USART2 is not set
CONFIG_SAMA5_USART3=y
CONFIG_SAMA5_USART4=y
# CONFIG_SAMA5_TWI0 is not set
CONFIG_SAMA5_TWI0=y
# CONFIG_SAMA5_TWI1 is not set
# CONFIG_SAMA5_TWI2 is not set
# CONFIG_SAMA5_TWI3 is not set
@ -249,6 +249,11 @@ CONFIG_SAMA5_EMAC0_PHYSR_100FD=0x6
# CONFIG_SAMA5_EMACB_NBC is not set
CONFIG_SAMA5_EMAC0_ISETH0=y
#
# TWI device driver options
#
CONFIG_SAMA5_TWI0_FREQUENCY=100000
#
# HSMCI device driver options
#
@ -346,8 +351,8 @@ CONFIG_NSH_MMCSDSLOTNO=0
# Board-Specific Options
#
# CONFIG_SAMA5D4EK_384MHZ is not set
CONFIG_SAMA5D4EK_396MHZ=y
# CONFIG_SAMA5D4EK_528MHZ is not set
# CONFIG_SAMA5D4EK_396MHZ is not set
CONFIG_SAMA5D4EK_528MHZ=y
CONFIG_SAMA5D4EK_DRAM_BOOT=y
#
@ -401,7 +406,7 @@ CONFIG_NPTHREAD_KEYS=4
CONFIG_DEV_CONSOLE=y
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
# CONFIG_SDCLONE_DISABLE is not set
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NAME_MAX=32
@ -441,7 +446,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
#
# Device Drivers
#
CONFIG_DISABLE_POLL=y
# CONFIG_DISABLE_POLL is not set
CONFIG_DEV_NULL=y
CONFIG_DEV_ZERO=y
CONFIG_ARCH_HAVE_RNG=y
@ -452,7 +457,12 @@ CONFIG_DEV_RANDOM=y
# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
# CONFIG_PWM is not set
# CONFIG_ARCH_HAVE_I2CRESET is not set
# CONFIG_I2C is not set
CONFIG_I2C=y
# CONFIG_I2C_SLAVE is not set
CONFIG_I2C_TRANSFER=y
CONFIG_I2C_WRITEREAD=y
# CONFIG_I2C_POLLED is not set
# CONFIG_I2C_TRACE is not set
# CONFIG_SPI is not set
# CONFIG_I2S is not set
CONFIG_RTC=y
@ -544,6 +554,7 @@ CONFIG_USART3_ISUART=y
CONFIG_USART4_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_SERIAL_NPOLLWAITERS=2
CONFIG_USART3_SERIAL_CONSOLE=y
# CONFIG_USART4_SERIAL_CONSOLE is not set
# CONFIG_NO_SERIAL_CONSOLE is not set
@ -590,6 +601,7 @@ CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAMLOG_BUFSIZE=16384
# CONFIG_RAMLOG_CRLF is not set
CONFIG_RAMLOG_NONBLOCKING=y
CONFIG_RAMLOG_NPOLLWAITERS=4
#
# Networking Support
@ -705,7 +717,14 @@ CONFIG_FAT_MAXFNAME=32
CONFIG_FS_ROMFS=y
# CONFIG_FS_SMARTFS is not set
# CONFIG_FS_BINFS is not set
# CONFIG_FS_PROCFS is not set
CONFIG_FS_PROCFS=y
#
# Exclude individual procfs entries
#
# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
#
# System Logging
@ -866,6 +885,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_XMLRPC is not set
#
# Graphics Support
@ -971,6 +991,7 @@ CONFIG_NSH_BUILTIN_APPS=y
# CONFIG_NSH_CMDOPT_DF_H is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_PROC_MOUNTPOUNT="/proc"
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=80
# CONFIG_NSH_DISABLE_SEMICOLON is not set
@ -1054,6 +1075,13 @@ CONFIG_NSH_MAX_ROUNDTRIP=20
#
# I2C tool
#
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_I2CTOOL_MINBUS=0
CONFIG_I2CTOOL_MAXBUS=0
CONFIG_I2CTOOL_MINADDR=0x03
CONFIG_I2CTOOL_MAXADDR=0x77
CONFIG_I2CTOOL_MAXREGADDR=0xff
CONFIG_I2CTOOL_DEFFREQ=100000
#
# INI File Parser

2
fs/procfs/fs_procfsuptime.c
View File

@ -65,7 +65,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Determines the size of an intermeidate buffer that must be large enough
/* Determines the size of an intermediate buffer that must be large enough
* to handle the longest line generated by this logic.
*/