Fixed formatting and comments in board.h and kinetis_k28memorymap.h
Fixed clock calculation in board.h
This commit is contained in:
Johanne Schock
patacongo
parent
c9d570d77a
commit
ac1f5d673a
@ -51,6 +51,7 @@
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************************************************************************************/
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/* Memory Map ***********************************************************************/
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/* K28 Family
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*
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* The memory map for the following parts is defined in NXP document
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@ -213,17 +214,5 @@
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# error "No memory map for this K28 part"
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* KINETIS_K28 */
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#endif /* __ARCH_ARM_SRC_KINETIS_HARDWARE_KINETIS_K28MEMORYMAP_H */
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@ -1,4 +1,4 @@
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/****************************************************************************
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/********************************************************************************
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* boards/arm/kinetis/freedom-k28f/include/board.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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@ -31,14 +31,14 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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********************************************************************************/
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#ifndef __BOARDS_ARM_KINETIS_FREEDOM_K28F_INCLUDE_BOARD_H
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#define __BOARDS_ARM_KINETIS_FREEDOM_K28F_INCLUDE_BOARD_H
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/****************************************************************************
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/********************************************************************************
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* Included Files
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****************************************************************************/
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********************************************************************************/
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#include <nuttx/config.h>
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@ -49,11 +49,11 @@
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# include <arch/chip/kinetis_mcg.h>
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#endif
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/****************************************************************************
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/********************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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********************************************************************************/
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/* Clocking *****************************************************************/
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/* Clocking *********************************************************************/
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/* The Freedom K28F uses a 12MHz external Oscillator.
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* The Kinetis MCU startup from an internal digitally-controlled oscillator
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@ -76,8 +76,8 @@
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* reference clock to the PLL.
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*
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* PLL Input frequency: PLLIN = REFCLK / PRDIV = 12 MHz / 1 = 12 MHz
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* PLL Output frequency: PLLOUT = PLLIN * VDIV = 12 MHz * 25 = 300 MHz
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* MCG Frequency: PLLOUT = 150 MHz = 300 MHz /
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* PLL Output frequency: PLLOUT = PLLIN * VDIV = 12 MHz * 24 = 288 MHz
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* MCG Frequency: PLLOUT = 144 MHz = 288 MHz /
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* KINETIS_MCG_PLL_INTERNAL_DIVBY
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* PRDIV register value is the divider minus KINETIS_MCG_C5_PRDIV_BASE.
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* VDIV register value is offset by KINETIS_MCG_C6_VDIV_BASE.
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@ -115,9 +115,10 @@
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#define BOARD_SOPT2_FREQ BOARD_MCG_FREQ
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/* N.B. The above BOARD_SOPT2_FREQ precludes use of USB with a 12 MHz Xtal
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* Divider output clock = Divider input clock × [ (USBFRAC+1) / (USBDIV+1) ]
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* SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ × [ (USBFRAC+1) / (USBDIV+1) ]
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* 48MHz = 144MHz / (2 + 1) * (1 + 0)
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* Divider output clock = Divider input clock * ((USBFRAC+1) / (USBDIV+1))
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* SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ * ((USBFRAC+1) / (USBDIV+1))
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* SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ / (USBDIV+1)* (USBFRAC+1)
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* 48MHz = 144MHz / (2 + 1) * (1 + 0)
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*/
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#if (BOARD_SOPT2_FREQ == 144000000L)
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@ -129,9 +130,9 @@
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#endif
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/* Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
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* SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
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* 90 MHz = 180 MHz X [(0 + 1) / (1 + 1)]
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* 90 MHz = 180 MHz / (1 + 1) * (0 + 1)
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* SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ * ((PLLFLLFRAC+1) / (PLLFLLDIV+1))
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* SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ / (PLLFLLDIV+1) * (PLLFLLFRAC+1)
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* 72MHz = 144MHz / (1 + 1) * (1 + 0)
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*/
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#define BOARD_SIM_CLKDIV3_PLLFLLFRAC 1
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@ -146,7 +147,7 @@
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#define BOARD_TPM_CLKSRC SIM_SOPT2_TPMSRC_MCGCLK
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#define BOARD_TPM_FREQ BOARD_SIM_CLKDIV3_FREQ
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/* SDHC clocking ************************************************************/
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/* SDHC clocking ****************************************************************/
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/* SDCLK configurations corresponding to various modes of operation.
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* Formula is:
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@ -162,38 +163,38 @@
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*/
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/* Identification mode:
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* Optimal 400KHz, Actual 180MHz / (32 * 15) = 375 Khz
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* Optimal 400KHz, Actual 144MHz / (32 * 12) = 375 Khz
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*/
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#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV32
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#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
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#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(12)
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/* MMC normal mode:
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* Optimal 20MHz, Actual 180MHz / (2 * 5) = 18 MHz
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* Optimal 20MHz, Actual 144MHz / (2 * 4) = 18 MHz
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*/
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#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(5)
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#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(4)
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/* SD normal mode (1-bit):
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* Optimal 20MHz, Actual 180MHz / (2 * 5) = 18 MHz
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* Optimal 20MHz, Actual 144MHz / (2 * 4) = 18 MHz
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*/
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#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(5)
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#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(4)
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/* SD normal mode (4-bit):
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* Optimal 25MHz, Actual 180MHz / (2 * 4) = 22.5 MHz (with DMA)
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* Optimal 25MHz, Actual 144MHz / (2 * 3) = 24 MHz (with DMA)
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* SD normal mode (4-bit):
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* Optimal 20MHz, Actual 180MHz / (2 * 4) = 22.5 MHz (no DMA)
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* Optimal 25MHz, Actual 144MHz / (2 * 3) = 24 MHz (no DMA)
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*/
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#ifdef CONFIG_SDIO_DMA
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(4)
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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#else
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(4)
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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#endif
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/* Use the output of SIM_SOPT2[PLLFLLSEL] as the USB clock source */
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@ -228,7 +229,7 @@
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#define GPIO_FTM2_CH0OUT PIN_FTM2_CH0 /* Pin 25: PTB18 */
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#define GPIO_FTM2_CH1OUT PIN_FTM2_CH1 /* Pin 32: PTB19 */
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/* LED definitions **********************************************************/
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/* LED definitions **************************************************************/
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/* A single LED is available driven by PTC5. The LED is grounded so bringing
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* PTC5 high will illuminate the LED.
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@ -260,11 +261,11 @@
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#define LED_ASSERTION 3 /* STATUS LED=no change */
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#define LED_PANIC 3 /* STATUS LED=flashing */
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/* Button definitions *******************************************************/
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/* Button definitions ***********************************************************/
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/* The freedom-k28f board has no standard GPIO contact buttons */
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/* Alternative pin resolution ***********************************************/
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/* Alternative pin resolution ***************************************************/
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/* The Freedom K28F has five LPUARTs with pin availability as follows:
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*
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@ -425,7 +426,7 @@
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# define PIN_SDHC0_DCLK PIN_SDHC0_DCLK_1
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#endif
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/* LED definitions **********************************************************/
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/* LED definitions **************************************************************/
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/* The Freedom K28F has a single RGB LED driven by the K28F as follows:
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*
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@ -471,7 +472,7 @@
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#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
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#undef LED_IDLE /* K28 is in sleep mode (Not used) */
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/* Button definitions *******************************************************/
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/* Button definitions ***********************************************************/
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/* Two push buttons, SW2 and SW3, are available on FRDM-K28F board,
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* where SW2 is connected to PTA4 and SW3 is connected to PTD0.
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