esp32: Fix GPIO Pull-Up/Pull-Down using RTC GPIO
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting pull-up/pull-down resistors. These pins are RTC GPIO pins and need to have pull-up/pull-down configured in the RTC registers. Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
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@ -27,6 +27,7 @@
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#include <sys/types.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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@ -36,6 +37,7 @@
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#include "hardware/esp32_iomux.h"
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#include "hardware/esp32_gpio.h"
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#include "esp32_cpuint.h"
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#include "esp32_rtc_gpio.h"
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#include "esp32_gpio.h"
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/****************************************************************************
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@ -67,6 +69,19 @@ static const uint8_t g_pin2func[40] =
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rtc_gpio_is_valid_gpio
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*
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* Description:
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* Determine if the specified GPIO is a valid RTC GPIO.
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*
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****************************************************************************/
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static inline bool rtc_gpio_is_valid_gpio(uint32_t gpio_num)
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{
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return (gpio_num < GPIO_PIN_COUNT && g_rtc_io_num_map[gpio_num] >= 0);
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}
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/****************************************************************************
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* Name: gpio_dispatch
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*
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@ -178,7 +193,71 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
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func |= FUN_IE;
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if ((attr & PULLUP) != 0)
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/* Some pins only support Pull-Up and Pull-Down resistor on RTC GPIO */
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if (rtc_gpio_is_valid_gpio(pin))
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{
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uint32_t rtc_gpio_idx = g_rtc_io_num_map[pin];
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if (rtc_gpio_idx >= RTCIO_GPIO34_IDX)
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{
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gpioerr("Pins 34-39 don't support PullUp/PullDown\n");
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}
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else
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{
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uint32_t regval;
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uint32_t rtc_gpio_pin;
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bool en_pu = false;
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bool en_pd = false;
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if ((attr & PULLUP) != 0)
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{
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en_pu = true;
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}
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else if ((attr & PULLDOWN) != 0)
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{
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en_pd = true;
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}
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/* Get the pin register */
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rtc_gpio_pin = g_rtc_io_desc[rtc_gpio_idx];
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/* Read the current value from RTC GPIO pin */
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regval = getreg32(rtc_gpio_pin);
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/* RTC_IO_X32P (GPIO32) uses different PU/PD bits */
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if (rtc_gpio_idx == RTCIO_GPIO32_IDX)
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{
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/* First, disable PU/PD */
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regval &= ~SPECIAL_RTC_PU_BIT;
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regval &= ~SPECIAL_RTC_PD_BIT;
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/* Enable PU/PD, if needed */
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regval |= en_pu ? SPECIAL_RTC_PU_BIT : 0;
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regval |= en_pd ? SPECIAL_RTC_PD_BIT : 0;
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}
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else
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{
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/* First, disable PU/PD */
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regval &= ~DEFAULT_RTC_PU_BIT;
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regval &= ~DEFAULT_RTC_PD_BIT;
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/* Enable PU/PD, if needed */
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regval |= en_pu ? DEFAULT_RTC_PU_BIT : 0;
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regval |= en_pd ? DEFAULT_RTC_PD_BIT : 0;
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}
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putreg32(regval, rtc_gpio_pin);
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}
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}
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else if ((attr & PULLUP) != 0)
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{
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func |= FUN_PU;
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}
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@ -503,4 +582,3 @@ void esp32_gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
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putreg32(regval, regaddr);
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}
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arch/xtensa/src/esp32/esp32_rtc_gpio.h
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149
arch/xtensa/src/esp32/esp32_rtc_gpio.h
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@ -0,0 +1,149 @@
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/****************************************************************************
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* arch/xtensa/src/esp32/esp32_rtc_gpio.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_RTC_GPIO_H
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#define __ARCH_XTENSA_SRC_ESP32_ESP32_RTC_GPIO_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "hardware/esp32_rtc_io.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define DEFAULT_RTC_PU_BIT (1 << 27)
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#define DEFAULT_RTC_PD_BIT (1 << 28)
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#define SPECIAL_RTC_PU_BIT (1 << 22)
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#define SPECIAL_RTC_PD_BIT (1 << 23)
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/* RTC GPIO Index */
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#define RTCIO_GPIO0_IDX 0 /* RTCIO_IDX_0 */
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#define RTCIO_GPIO2_IDX 1 /* RTCIO_IDX_2 */
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#define RTCIO_GPIO4_IDX 2 /* RTCIO_IDX_4 */
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#define RTCIO_GPIO12_IDX 3 /* RTCIO_IDX_12 */
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#define RTCIO_GPIO13_IDX 4 /* RTCIO_IDX_13 */
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#define RTCIO_GPIO14_IDX 5 /* RTCIO_IDX_14 */
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#define RTCIO_GPIO15_IDX 6 /* RTCIO_IDX_15 */
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#define RTCIO_GPIO25_IDX 7 /* RTCIO_IDX_25 */
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#define RTCIO_GPIO26_IDX 8 /* RTCIO_IDX_26 */
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#define RTCIO_GPIO27_IDX 9 /* RTCIO_IDX_27 */
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#define RTCIO_GPIO32_IDX 10 /* RTCIO_IDX_32 */
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#define RTCIO_GPIO33_IDX 11 /* RTCIO_IDX_33 */
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#define RTCIO_GPIO34_IDX 12 /* RTCIO_IDX_34 */
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#define RTCIO_GPIO35_IDX 13 /* RTCIO_IDX_35 */
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#define RTCIO_GPIO36_IDX 14 /* RTCIO_IDX_36 */
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#define RTCIO_GPIO37_IDX 15 /* RTCIO_IDX_37 */
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#define RTCIO_GPIO38_IDX 16 /* RTCIO_IDX_38 */
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#define RTCIO_GPIO39_IDX 17 /* RTCIO_IDX_39 */
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#define RTC_GPIO_NUMBER 18
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/****************************************************************************
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* Public Data
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****************************************************************************/
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const int g_rtc_io_num_map[GPIO_PIN_COUNT + 1] =
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{
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RTCIO_GPIO0_IDX, /* GPIO0 */
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-1, /* GPIO1 not supported */
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RTCIO_GPIO2_IDX, /* GPIO2 */
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-1, /* GPIO3 not supported */
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RTCIO_GPIO4_IDX, /* GPIO4 */
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-1, /* GPIO5 not supported */
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-1, /* GPIO6 not supported */
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-1, /* GPIO7 not supported */
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-1, /* GPIO8 not supported */
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-1, /* GPIO9 not supported */
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-1, /* GPIO10 not supported */
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-1, /* GPIO11 not supported */
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RTCIO_GPIO12_IDX, /* GPIO12 */
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RTCIO_GPIO13_IDX, /* GPIO13 */
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RTCIO_GPIO14_IDX, /* GPIO14 */
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RTCIO_GPIO15_IDX, /* GPIO15 */
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-1, /* GPIO16 not supported */
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-1, /* GPIO17 not supported */
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-1, /* GPIO18 not supported */
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-1, /* GPIO19 not supported */
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-1, /* GPIO20 not supported */
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-1, /* GPIO21 not supported */
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-1, /* GPIO22 not supported */
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-1, /* GPIO23 not supported */
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-1, /* GPIO24 not supported */
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RTCIO_GPIO25_IDX, /* GPIO25 */
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RTCIO_GPIO26_IDX, /* GPIO26 */
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RTCIO_GPIO27_IDX, /* GPIO27 */
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-1, /* GPIO28 not supported */
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-1, /* GPIO29 not supported */
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-1, /* GPIO30 not supported */
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-1, /* GPIO31 not supported */
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RTCIO_GPIO32_IDX, /* GPIO32 */
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RTCIO_GPIO33_IDX, /* GPIO33 */
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RTCIO_GPIO34_IDX, /* GPIO34 */
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RTCIO_GPIO35_IDX, /* GPIO35 */
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RTCIO_GPIO36_IDX, /* GPIO36 */
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RTCIO_GPIO37_IDX, /* GPIO37 */
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RTCIO_GPIO38_IDX, /* GPIO38 */
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RTCIO_GPIO39_IDX /* GPIO39 */
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};
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const int g_rtc_io_desc[RTC_GPIO_NUMBER] =
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{
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RTC_IO_TOUCH_PAD1_REG,
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RTC_IO_TOUCH_PAD2_REG,
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RTC_IO_TOUCH_PAD0_REG,
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RTC_IO_TOUCH_PAD5_REG,
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RTC_IO_TOUCH_PAD4_REG,
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RTC_IO_TOUCH_PAD6_REG,
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RTC_IO_TOUCH_PAD3_REG,
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RTC_IO_PAD_DAC1_REG,
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RTC_IO_PAD_DAC2_REG,
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RTC_IO_TOUCH_PAD7_REG,
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RTC_IO_XTAL_32K_PAD_REG,
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RTC_IO_XTAL_32K_PAD_REG,
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RTC_IO_ADC_PAD_REG,
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RTC_IO_ADC_PAD_REG,
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RTC_IO_SENSOR_PADS_REG,
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RTC_IO_SENSOR_PADS_REG,
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RTC_IO_SENSOR_PADS_REG,
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RTC_IO_SENSOR_PADS_REG
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};
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#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_RTC_GPIO_H */
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arch/xtensa/src/esp32/hardware/esp32_rtc_io.h
Normal file
3200
arch/xtensa/src/esp32/hardware/esp32_rtc_io.h
Normal file
File diff suppressed because it is too large
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