ESP32 core: Add linker script

arch/xtensa/src/esp32/Kconfig

@@ -5,5 +5,16 @@
 
 if ARCH_CHIP_ESP32
 
-endif # ARCH_CHIP_ESP32
+config ESP32_BT_RESERVE_DRAM
+	int "Reserved BT DRAM"
+	default 0
 
+config ESP32_TRACEMEM_RESERVE_DRAM
+	int "Reserved trace memory DRAM"
+	default 0
+
+config ESP32_ULP_COPROC_RESERVE_MEM
+	int "Reserved ULP co-processor DRAM"
+	default 0
+
+endif # ARCH_CHIP_ESP32

configs/esp32-core/nsh/Make.defs

@@ -37,7 +37,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/xtensa/src/lx6/Toolchain.defs
 
-LDSCRIPT = ld.script
+LDSCRIPT += -T esp32_out.ld -T esp32_common.ld -T esp32_rom.ld -T esp32_peripherals.ld
 
 ifeq ($(WINTOOL),y)
   # Windows-native toolchains

configs/esp32-core/scripts/esp32.ld

@@ -0,0 +1,62 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32.ld
+ * ESP32 Linker Script Memory Layout
+ *
+ * This file describes the memory layout (memory blocks) as virtual
+ * memory addresses.
+ *
+ * esp32.common.ld contains output sections to link compiler output
+ * into these memory blocks.
+ *
+ * NOTE: That this is not the actual linker script but rather a "template"
+ * for the elf32_out.ld script.  This template script is passed through
+ * the C preprocessor to include selected configuration options.
+ *
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+MEMORY
+{
+  /* All these values assume the flash cache is on, and have the blocks this
+   * uses subtracted from the length of the various regions. The 'data access
+   * port' dram/drom regions map to the same iram/irom regions but are
+   * connected to the data port of the CPU and eg allow bytewise access.
+   */
+
+  /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
+
+  iram0_0_seg (RX) :     org = 0x40080000, len = 0x20000
+
+  /* Even though the segment name is iram, it is actually mapped to flash */
+
+  iram0_2_seg (RX) :     org = 0x400D0018, len = 0x330000
+
+  /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
+   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease
+   * the amount of RAM available.
+   */
+
+  dram0_0_seg (RW) :     org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM,
+                         len = 0x50000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM
+
+  /* Flash mapped constant data */
+
+  drom0_0_seg (R) :      org = 0x3f400010, len = 0x800000
+
+  /* RTC fast memory (executable). Persists over deep sleep. */
+
+  rtc_iram_seg(RWX) :    org = 0x400c0000, len = 0x2000
+
+  /* RTC slow memory (data accessible). Persists over deep sleep.
+   * Start of RTC slow memory is reserved for ULP co-processor code + data,
+   * if enabled.
+   */
+
+  rtc_slow_seg(RW)  :    org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM,
+                         len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
+}
+
+/* Heap ends at top of dram0_0_seg */
+
+_heap_end = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;

configs/esp32-core/scripts/esp32_common.ld

@@ -0,0 +1,179 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_common.ld
+ ****************************************************************************/
+
+/*  Default entry point:  */
+
+ENTRY(__start);
+
+SECTIONS
+{
+  /* Send .iram0 code to iram */
+
+  .iram0.vectors :
+  {
+    /* Vectors go to IRAM */
+
+    _init_start = ABSOLUTE(.);
+
+    /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
+
+    . = 0x0;
+    KEEP(*(.WindowVectors.text));
+    . = 0x180;
+    KEEP(*(.Level2InterruptVector.text));
+    . = 0x1c0;
+    KEEP(*(.Level3InterruptVector.text));
+    . = 0x200;
+    KEEP(*(.Level4InterruptVector.text));
+    . = 0x240;
+    KEEP(*(.Level5InterruptVector.text));
+    . = 0x280;
+    KEEP(*(.DebugExceptionVector.text));
+    . = 0x2c0;
+    KEEP(*(.NMIExceptionVector.text));
+    . = 0x300;
+    KEEP(*(.KernelExceptionVector.text));
+    . = 0x340;
+    KEEP(*(.UserExceptionVector.text));
+    . = 0x3C0;
+    KEEP(*(.DoubleExceptionVector.text));
+    . = 0x400;
+    *(.*Vector.literal)
+
+    *(.UserEnter.literal);
+    *(.UserEnter.text);
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    _init_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  .iram0.text :
+  {
+    /* Code marked as runnning out of IRAM */
+
+    _iram_text_start = ABSOLUTE(.);
+    *(.iram1 .iram1.*)
+    *libfreertos.a:(.literal .text .literal.* .text.*)
+    *libphy.a:(.literal .text .literal.* .text.*)
+    *librtc.a:(.literal .text .literal.* .text.*)
+    *libpp.a:(.literal .text .literal.* .text.*)
+    *libhal.a:(.literal .text .literal.* .text.*)
+    _iram_text_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  /* Shared RAM */
+
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _sbss = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    KEEP(*(.bss))
+    *(.bss.*)
+    *(.share.mem)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    _ebss = ABSOLUTE(.);
+  } >dram0_0_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    KEEP(*(.data))
+    KEEP(*(.data.*))
+    KEEP(*(.gnu.linkonce.d.*))
+    KEEP(*(.data1))
+    KEEP(*(.sdata))
+    KEEP(*(.sdata.*))
+    KEEP(*(.gnu.linkonce.s.*))
+    KEEP(*(.sdata2))
+    KEEP(*(.sdata2.*))
+    KEEP(*(.gnu.linkonce.s2.*))
+    KEEP(*(.jcr))
+    *(.dram1 .dram1.*)
+    _data_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _heap_start = ABSOLUTE(.);
+  } >dram0_0_seg
+
+  .flash.rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    *(.eh_frame)
+    . = (. + 3) & ~ 3;
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _rodata_end = ABSOLUTE(.);
+    /* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+  } >drom0_0_seg
+
+  .flash.text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram0_2_seg
+
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    *(.rtc.literal .rtc.text)
+  } >rtc_iram_seg
+
+  .rtc.data :
+  {
+    *(.rtc.data)
+    *(.rtc.rodata)
+  } > rtc_slow_seg
+}

configs/esp32-core/scripts/esp32_peripherals.ld

@@ -0,0 +1,24 @@
+/****************************************************************************
+ * configs/elf32-core/scripts/esp32_peripherals.ld
+ ****************************************************************************/
+
+PROVIDE ( UART0 = 0x3ff40000 );
+PROVIDE ( SPI1 = 0x3ff42000 );
+PROVIDE ( SPI0 = 0x3ff43000 );
+PROVIDE ( GPIO = 0x3ff44000 );
+PROVIDE ( SIGMADELTA = 0x3ff44f00 );
+PROVIDE ( UHCI1 = 0x3ff4C000 );
+PROVIDE ( I2S0 = 0x3ff4F000 );
+PROVIDE ( UART1 = 0x3ff50000 );
+PROVIDE ( I2C0 = 0x3ff53000 );
+PROVIDE ( UHCI0 = 0x3ff54000 );
+PROVIDE ( RMT = 0x3ff56000 );
+PROVIDE ( PCNT = 0x3ff57000 );
+PROVIDE ( LEDC = 0x3ff59000 );
+PROVIDE ( TIMERG0 = 0x3ff5F000 );
+PROVIDE ( TIMERG1 = 0x3ff60000 );
+PROVIDE ( SPI2 = 0x3ff64000 );
+PROVIDE ( SPI3 = 0x3ff65000 );
+PROVIDE ( I2C1 = 0x3ff67000 );
+PROVIDE ( I2S1 = 0x3ff6D000 );
+PROVIDE ( UART2 = 0x3ff6E000 );

configs/esp32-core/src/Makefile

@@ -35,7 +35,15 @@
 
 -include $(TOPDIR)/Make.defs
 
+SCRIPTDIR = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts
+CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h
+SCRIPTIN = esp32.ld
+SCRIPTOUT = esp32_out.ld
+
 ASRCS =
 CSRCS =
 
 include $(TOPDIR)/configs/Board.mk
+
+$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE)
+	$(call PREPROCESS, $<, $(SCRIPTIN))