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Fixes to get SDRAM working on the Open1788. Works but is not reliable

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5794 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-27 16:24:45 +00:00
parent c28bc0f195
commit acc7f811fb
8 changed files with 25 additions and 19 deletions
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1
configs/open1788/README.txt
View File

@ -427,3 +427,4 @@ CONFIGURATION
not excessible to the applications. So the RAM test can be
freely executed against the SRAM memory beginning at address
0xa000:0000 (CS0).

4
configs/open1788/include/board.h
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@ -197,7 +197,8 @@
* Needed for NAND and SDRAM: {17,1,2,1}
*/
#if defined(CONFIG_LPC17_EMC_NAND) || defined(CONFIG_LPC17_EMC_SDRAM)
#ifdef CONFIG_LPC17_EMC
#if defined(CONFIG_ARCH_EXTNAND) || defined(CONFIG_ARCH_EXTDRAM)
# define BOARD_CMDDLY 17
# define BOARD_FBCLKDLY 17
# define BOARD_CLKOUT0DLY 1
@ -208,6 +209,7 @@
# define BOARD_CLKOUT0DLY 1
# define BOARD_CLKOUT1DLY 1
#endif
#endif
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in

6
configs/open1788/src/Makefile
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@ -40,15 +40,15 @@ CFLAGS += -I$(TOPDIR)/sched
ASRCS =
CSRCS = lpc17_boardinitialize.c
ifeq ($(CONFIG_LPC17_EMC_NOR),y)
ifeq ($(CONFIG_ARCH_EXTNOR),y)
CSRCS += lpc17_norinitialize.c
endif
ifeq ($(CONFIG_LPC17_EMC_NAND),y)
ifeq ($(CONFIG_ARCH_EXTNAND),y)
CSRCS += lpc17_nandinitialize.c
endif
ifeq ($(CONFIG_LPC17_EMC_SDRM),y)
ifeq ($(CONFIG_ARCH_EXTDRAM),y)
CSRCS += lpc17_sdraminitialize.c
endif

6
configs/open1788/src/lpc17_boardinitialize.c
View File

@ -80,13 +80,13 @@ void lpc17_boardinitialize(void)
#ifdef CONFIG_LPC17_EMC
lpc17_emcinitialize();
#ifdef CONFIG_LPC17_EMC_SDRAM
#ifdef CONFIG_ARCH_EXTDRAM
lpc17_sdram_initialize();
#endif
#ifdef CONFIG_LPC17_EMC_NOR
#ifdef CONFIG_ARCH_EXTNOR
lpc17_nor_initialize();
#endif
#ifdef CONFIG_LPC17_EMC_NAND
#ifdef CONFIG_ARCH_EXTNAND
lpc17_nand_initialize();
#endif
#endif

4
configs/open1788/src/lpc17_nandinitialize.c
View File

@ -49,7 +49,7 @@
#include "open1788.h"
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_NAND)
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_ARCH_EXTNAND)
/************************************************************************************
* Definitions
@ -98,4 +98,4 @@ void lpc17_nand_initialize(void)
lpc17_gpioconfig(GPIO_NAND_RB);
}
#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_NAND */
#endif /* CONFIG_LPC17_EMC && CONFIG_ARCH_EXTNAND */

4
configs/open1788/src/lpc17_norinitialize.c
View File

@ -49,7 +49,7 @@
#include "open1788.h"
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_NOR)
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_ARCH_EXTNOR)
/************************************************************************************
* Definitions
@ -94,4 +94,4 @@ void lpc17_nor_initialize(void)
up_mdelay(10);
}
#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_NOR */
#endif /* CONFIG_LPC17_EMC && CONFIG_ARCH_EXTNOR */

13
configs/open1788/src/lpc17_sdraminitialize.c
View File

@ -42,14 +42,17 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "chip/lpc17_syscon.h"
#include "lpc17_emc.h"
#include "open1788.h"
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_LPC17_EMC_SDRAM)
#if defined(CONFIG_LPC17_EMC) && defined(CONFIG_ARCH_EXTDRAM)
/************************************************************************************
* Definitions
@ -139,8 +142,8 @@ void lpc17_sdram_initialize(void)
putreg32( 1, LPC17_EMC_DYNAMICAPR); /* TAPR = 2 clocks? */
putreg32(EMC_NS2CLK(20) + 2, LPC17_EMC_DYNAMICDAL); /* TDAL = TRP + TDPL = 20ns + 2clk */
putreg32( 1, LPC17_EMC_DYNAMICWR); /* TWR = 2 clocks */
putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRC); /* H57V2562GTR-75C TRC = 63ns(min)*/
putreg32( EMC_NS2CLK(63, LPC17_EMC_DYNAMICRFC); /* H57V2562GTR-75C TRFC = TRC */
putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRC); /* H57V2562GTR-75C TRC = 63ns(min)*/
putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRFC); /* H57V2562GTR-75C TRFC = TRC */
putreg32( 15, LPC17_EMC_DYNAMICXSR); /* Exit self-refresh to active */
putreg32( EMC_NS2CLK(63), LPC17_EMC_DYNAMICRRD); /* 3 clock, TRRD = 15ns (min) */
putreg32( 1, LPC17_EMC_DYNAMICMRD); /* 2 clock, TMRD = 2 clocks (min) */
@ -207,7 +210,7 @@ void lpc17_sdram_initialize(void)
#ifdef CONFIG_ARCH_SDRAM_16BIT
dummy = getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
#elif defined CONFIG_ARCH_SDRAM_32BIT
dummy = getreg32(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */
dummy = getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */
#endif
/* Issue NORMAL command */
@ -227,4 +230,4 @@ void lpc17_sdram_initialize(void)
putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
}
#endif /* CONFIG_LPC17_EMC && CONFIG_LPC17_EMC_SDRAM */
#endif /* CONFIG_LPC17_EMC && CONFIG_ARCH_EXTDRAM */

6
configs/open1788/src/open1788.h
View File

@ -149,7 +149,7 @@ void weak_function lpc17_sspinitialize(void);
************************************************************************************/
#ifdef CONFIG_LPC17_EMC
#ifdef CONFIG_LPC17_EMC_SDRAM
#ifdef CONFIG_ARCH_EXTDRAM
void lpc17_sdram_initialize(void);
#endif
@ -161,7 +161,7 @@ void lpc17_sdram_initialize(void);
*
************************************************************************************/
#ifdef CONFIG_LPC17_EMC_NOR
#ifdef CONFIG_ARCH_EXTNOR
void lpc17_nor_initialize(void);
#endif
@ -173,7 +173,7 @@ void lpc17_nor_initialize(void);
*
************************************************************************************/
#ifdef CONFIG_LPC17_EMC_NAND
#ifdef CONFIG_ARCH_EXTNAND
void lpc17_nand_initialize(void);
#endif
#endif /* CONFIG_LPC17_EMC */