More context switching logic for m9s12
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3300 42af7a65-404d-4744-a932-0658087f49c3
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@ -147,8 +147,9 @@
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# define REG_PCH (REG_FIRST_HARDREG+17)
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# define REG_PCL (REG_FIRST_HARDREG+18)
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#define TOTALFRAME_SIZE (REG_FIRST_HARDREG+17)
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#define INTFRAME_SIZE 9
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#define XCPTCONTEXT_REGS (REG_FIRST_HARDREG+17)
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#define XCPTCONTEXT_REGS TOTALFRAME_SIZE
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/************************************************************************************
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* Public Types
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@ -41,5 +41,5 @@ CMN_CSRCS = up_allocateheap.c up_createstack.c up_doirq.c up_idle.c up_initializ
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up_modifyreg32.c up_modifyreg8.c up_puts.c up_releasestack.c \
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up_udelay.c up_usestack.c
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CHIP_ASRCS = m9s12_start.S m9s12_lowputc.S
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CHIP_ASRCS = m9s12_start.S m9s12_lowputc.S m9s12_saveusercontext.S
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CHIP_CSRCS = m9s12_assert.c m9s12_serial.c m9s12_irq.c
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181
arch/hc/src/m9s12/m9s12_saveusercontext.S
Executable file
181
arch/hc/src/m9s12/m9s12_saveusercontext.S
Executable file
@ -0,0 +1,181 @@
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/**************************************************************************
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* arch/arm/src/m9s12/m9s12_saveusercontext.S
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************/
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include "up_internal.h"
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#include "m9s12_internal.h"
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/**************************************************************************
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* Private Definitions
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**************************************************************************/
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/**************************************************************************
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* Private Types
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**************************************************************************/
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/**************************************************************************
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* Private Function Prototypes
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**************************************************************************/
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/**************************************************************************
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* Global Variables
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**************************************************************************/
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/**************************************************************************
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* Private Variables
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**************************************************************************/
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/**************************************************************************
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* Private Functions
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**************************************************************************/
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/**************************************************************************
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* Public Functions
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**************************************************************************/
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/**************************************************************************
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* Name: up_saveusercontext
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*
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* Description:
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* Create this state save strucure:
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* Low Address [PPAGE]
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* [soft regisers]
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* XYH
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* XYL
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* ZH
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* ZL
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* TMPH
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* TMPL
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* FRAMEH
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* FRAMEL
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* SP <-- SP after interrupt
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* CCR
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* B
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* A
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* XH
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* XL
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* YH
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* YL
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* PCH
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* High Address PCL
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*
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* On entry:
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* D=Pointer to save save structure
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* TOS=return address
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*
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**************************************************************************/
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.text
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.globl up_saveusercontext
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.type up_saveusercontext, function
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up_saveusercontext:
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/* Exchange D with X. Now X points to the save structure. */
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xgdx
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/* Save he PPAGE register */
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#ifndef CONFIG_HCS12_NONBANKED
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movb HCS12_MMC_PPAGE, 1, x+
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#endif
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/* Save the soft registers */
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#if CONFIG_HCS12_MSOFTREGS > 2
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# error "Need to save more registers"
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#endif
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#if CONFIG_HCS12_MSOFTREGS > 1
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movw _.d2, 2, x+
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#endif
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#if CONFIG_HCS12_MSOFTREGS > 0
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movw _.d1, 2, x+
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#endif
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/* It is not necessary to save the value of _.tmp, _.z, or _.xy */
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ldd #0
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std 2, x+ /* Save _.xy = 0 */
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std 2, x+ /* Save _.z = 0 */
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std 2, x+ /* Save _.tmp = 0 */
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/* Save _.frame */
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movw _.frame, 2, x+
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/* Save the value of the stack "before" this function was called */
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tfr sp, d /* D = current SP */
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addd #(TOTALFRAME_SIZE-INTFRAME_SIZE)
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std 2, x+ /* Save the value of SP on entry */
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/* Save the CCR */
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tpa /* A = CCR */
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staa 1, x+ /* Save CCR in the structure */
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/* D (A:B) is the return value. Save 1 as the new return value as it
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* will appear after a context switch back to the current thread.
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*/
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ldd #1
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std 2, x+ /* Save D = 1 */
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/* X, Y do not need to be preserved. Write zeros to these locations */
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ldd #0
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std 2, x+ /* Save X = 0 */
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std 2, x+ /* Save Y = 0 */
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/* Fetch the 2-byte return address from the stack and save it at the
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* end of the state save area
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*/
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movw 0, sp, 2, x+ /* Save PCH and PCL */
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#if __INT__ == 32 /* 32-bit ABI */
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ldx #0
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#endif
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clra
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clrb
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rts
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.size up_saveusercontext, . - up_saveusercontext
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.end
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@ -51,6 +51,7 @@
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.globl __start
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.globl up_doirq
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.globl up_fullcontextrestore
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.file "m9s12_vectors.S"
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/************************************************************************************
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@ -204,9 +205,11 @@ handlers:
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HANDLER villegal, HCS12_IRQ_VILLEGAL /* Any reserved vector */
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/************************************************************************************
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* Common IRQ handling logic
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* Name: vcommon
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*
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* Description:
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* Common IRQ handling logic
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*
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* On entry in to vcommon: (1) The interrupt stack fram is in place, and (2) the
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* IRQ number is in B.
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*
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@ -214,6 +217,7 @@ handlers:
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* instruction interrupt, the stack frame created by hardware looks like:
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*
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* Low Address <-- SP after interrupt
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* CCR
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* B
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* A
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* XH
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@ -237,6 +241,7 @@ handlers:
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* FRAMEH
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* FRAMEL
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* SP <-- SP after interrupt
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* CCR
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* B
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* A
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* XH
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@ -302,10 +307,8 @@ vcommon:
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/* Check if the return value in d is the same as regs parameter passed in the TOS */
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cpd .Lspsave
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beq .Lnoswitch
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#warning "Missing Logic"
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bne up_fullcontextrestore
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.Lnoswitch:
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/* Restore registers and return */
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/* Restore the PPAGE register */
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@ -335,6 +338,82 @@ vcommon:
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rti
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.size handlers, .-handlers
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/************************************************************************************
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* Name: up_fullcontextrestore
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*
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* Description:
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* Given a pointer to a register save block that was previously created by either
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* interrupt handler or by up_saveusercontext(), restore the context of the saved
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* thread, thereby completing a context switch.
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*
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* Low Address [PPAGE]
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* [soft regisers]
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* XYH
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* XYL
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* ZH
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* ZL
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* TMPH
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* TMPL
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* FRAMEH
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* FRAMEL
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* SP
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* CCR
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* B
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* A
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* XH
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* XL
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* YH
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* YL
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* PCH
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* High Address PCL
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*
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* On entry:
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* D = Address of the context switch save block
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*
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************************************************************************************/
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up_fullcontextrestore:
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/* Make sure that interrupts are dissabled */
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orcc #0x50
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/* Exchange D with X. Now X points to the save structure. */
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xgdx
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/* Recover PPAGE */
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#ifndef CONFIG_HCS12_NONBANKED
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movb 1, x+, HCS12_MMC_PPAGE
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#endif
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/* Recover _.xy, _.z, _.tmp, _.frame */
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movw 2, x+, _.xy
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movw 2, x+, _.z
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movw 2, x+, _.tmp
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movw 2, x+, _.frame
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/* Recover SP "before" the interrupt occurred */
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ldd 2, x+
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tfr d, sp
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/* Now, create a new interrupt return frame */
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ldab #(INTFRAME_SIZE-1) /* Offset to PCL */
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abx /* X now points to last byte */
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/* Copy the interrupt frame onto the stack */
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movw 2, -sp, 2, -x /* Copy the PC */
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movw 2, -sp, 2, -x /* Copy Y */
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movw 2, -sp, 2, -x /* Copy X */
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movw 2, -sp, 2, -x /* Copy A:B */
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movw 1, -sp, 1, -x /* Copy CCR */
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rti /* And return from interrupt */
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.size up_fullcontextrestore, .-up_fullcontextrestore
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/************************************************************************************
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* .bss
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************************************************************************************/
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