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arch:xtensa: remove struct xtensa_cpstate_s as no need used

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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This commit is contained in:
zhuyanlin 2022-05-12 22:24:24 +08:00 committed by Abdelatif Guettouche
parent f423f94d08
commit ad57791fe0
4 changed files with 11 additions and 41 deletions
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7
arch/xtensa/include/xtensa/xtensa_coproc.h
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@ -140,6 +140,12 @@
#ifndef __ASSEMBLY__
#if 0
/* This struct is not used as CP context switch was implement in interrupt
* handler. Will be reused when lazy context switch is implemented.
*/
struct xtensa_cpstate_s
{
uint16_t cpenable; /* (2 bytes) Co-processors active for this thread */
@ -149,6 +155,7 @@ struct xtensa_cpstate_s
static_assert(offsetof(struct xtensa_cpstate_s, cpasa) == XTENSA_CPASA,
"CP save area address alignment violation.");
#endif
/****************************************************************************
* Inline Functions

5
arch/xtensa/src/common/xtensa.h
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@ -254,9 +254,8 @@ void xtensa_dumpstate(void);
/* Initialization */
#if XCHAL_CP_NUM > 0
struct xtensa_cpstate_s;
void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset);
void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset);
void xtensa_coproc_enable(int cpset);
void xtensa_coproc_disable(int cpset);
#endif
/* Window Spill */

32
arch/xtensa/src/common/xtensa_cpenable.c
View File

@ -45,7 +45,6 @@
* Enable a set of co-processors.
*
* Input Parameters:
* cpstate - A pointer to the Co-processor state save structure.
* cpset - A bit set of co-processors to be enabled. Matches bit layout
* of the CPENABLE register. Bit 0-XCHAL_CP_NUM: 0 = no change
* 1 = enable
@ -55,7 +54,7 @@
*
****************************************************************************/
void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
void xtensa_coproc_enable(int cpset)
{
irqstate_t flags;
uint32_t cpenable;
@ -64,16 +63,6 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
flags = enter_critical_section();
/* Don't enable co-processors that may already be enabled
*
* cpenable
* 0 1
* --- ---
* cpset 0 | 0 0
* 1 | 1 0
*/
cpset ^= (cpset & cpstate->cpenable);
if (cpset != 0)
{
/* Enable the co-processors */
@ -81,9 +70,6 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
cpenable = xtensa_get_cpenable();
cpenable |= cpset;
xtensa_set_cpenable(cpenable);
cpstate->cpenable = cpenable;
cpstate->cpstored &= ~cpset;
}
leave_critical_section(flags);
@ -96,7 +82,6 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
* Enable a set of co-processors.
*
* Input Parameters:
* cpstate - A pointer to the Co-processor state save structure.
* cpset - A bit set of co-processors to be enabled. Matches bit layout
* of the CPENABLE register. Bit 0-XCHAL_CP_NUM: 0 = no change
* 1 = disable
@ -106,7 +91,7 @@ void xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset)
*
****************************************************************************/
void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset)
void xtensa_coproc_disable(int cpset)
{
irqstate_t flags;
uint32_t cpenable;
@ -115,16 +100,6 @@ void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset)
flags = enter_critical_section();
/* Don't disable co-processors that are already be disabled.
*
* cpenable
* 0 1
* --- ---
* cpset 0 | 0 0
* 1 | 0 1
*/
cpset &= cpstate->cpenable;
if (cpset != 0)
{
/* Disable the co-processors */
@ -132,9 +107,6 @@ void xtensa_coproc_disable(struct xtensa_cpstate_s *cpstate, int cpset)
cpenable = xtensa_get_cpenable();
cpenable &= ~cpset;
xtensa_set_cpenable(cpenable);
cpstate->cpenable = cpenable;
cpstate->cpstored &= ~cpset;
}
leave_critical_section(flags);

8
arch/xtensa/src/esp32/esp32_cpustart.c
View File

@ -180,14 +180,6 @@ void IRAM_ATTR xtensa_appcpu_start(void)
up_enable_irq(XTENSA_IRQ_SWINT);
#if 0 /* Does it make since to have co-processors enabled on the IDLE thread? */
#if XTENSA_CP_ALLSET != 0
/* Set initial co-processor state */
xtensa_coproc_enable(struct xtensa_cpstate_s *cpstate, int cpset);
#endif
#endif
/* Dump registers so that we can see what is going to happen on return */
xtensa_registerdump(tcb);