Updates to PIC32 SPI driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4461 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
a2e5414181
commit
ad6b6d9fb5
@ -47,6 +47,8 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include <nuttx/spi.h>
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#include "up_internal.h"
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#include "chip.h"
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#include "pic32mx-config.h"
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@ -396,42 +398,48 @@ EXTERN void pic32mx_dumpgpio(uint32_t pinset, const char *msg);
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*
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************************************************************************************/
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struct spi_dev_s;
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enum spi_dev_e;
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#ifdef CONFIG_PIC32MX_SPI1
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EXTERN void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN void pic32mx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool selected);
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EXTERN uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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EXTERN int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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EXTERN int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool cmd);
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#endif
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#endif
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#ifdef CONFIG_PIC32MX_SPI2
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EXTERN void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool selected);
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EXTERN uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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EXTERN int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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EXTERN int pic32mx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool cmd);
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#endif
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#endif
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#ifdef CONFIG_PIC32MX_SPI3
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EXTERN void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool selected);
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EXTERN uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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EXTERN int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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EXTERN int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool cmd);
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#endif
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#endif
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#ifdef CONFIG_PIC32MX_SPI3
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EXTERN void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN void pic32mx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool selected);
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EXTERN uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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EXTERN int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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EXTERN int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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bool cmd);
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#endif
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmainitialize
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*
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* Description:
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@ -440,54 +448,60 @@ EXTERN int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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* Returned Value:
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* None
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN void pic32mx_dmainitilaize(void);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmachannel
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*
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* Description:
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* Allocate a DMA channel. This function sets aside a DMA channel and
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* gives the caller exclusive access to the DMA channel.
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* Allocate a DMA channel. This function sets aside a DMA channel and gives the
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* caller exclusive access to the DMA channel.
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*
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* Returned Value:
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* One success, this function returns a non-NULL, void* DMA channel
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* handle. NULL is returned on any failure. This function can fail only
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* if no DMA channel is available.
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* One success, this function returns a non-NULL, void* DMA channel handle. NULL
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* is returned on any failure. This function can fail only if no DMA channel is
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* available.
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN DMA_HANDLE pic32mx_dmachannel(void);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmafree
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*
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* Description:
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* Release a DMA channel. NOTE: The 'handle' used in this argument must
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* NEVER be used again until pic32mx_dmachannel() is called again to re-gain
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* a valid handle.
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* Release a DMA channel. NOTE: The 'handle' used in this argument must NEVER be
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* used again until pic32mx_dmachannel() is called again to re-gain a valid handle.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN void pic32mx_dmafree(DMA_HANDLE handle);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmasetup
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*
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* Description:
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* Configure DMA for one transfer.
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN int pic32mx_dmarxsetup(DMA_HANDLE handle,
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@ -496,39 +510,45 @@ EXTERN int pic32mx_dmarxsetup(DMA_HANDLE handle,
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size_t nbytes);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmastart
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*
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* Description:
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* Start the DMA transfer
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN int pic32mx_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmastop
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*
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* Description:
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* Cancel the DMA. After pic32mx_dmastop() is called, the DMA channel is
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* reset and pic32mx_dmasetup() must be called before pic32mx_dmastart() can be
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* called again
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* Cancel the DMA. After pic32mx_dmastop() is called, the DMA channel is reset
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* and pic32mx_dmasetup() must be called before pic32mx_dmastart() can be called
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* again
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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EXTERN void pic32mx_dmastop(DMA_HANDLE handle);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmasample
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*
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* Description:
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* Sample DMA register contents
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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#ifdef CONFIG_DEBUG_DMA
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@ -538,13 +558,15 @@ EXTERN void pic32mx_dmasample(DMA_HANDLE handle, struct pic32mx_dmaregs_s *regs)
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#endif
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_dmadump
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*
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* Description:
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* Dump previously sampled DMA register contents
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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#ifdef CONFIG_DEBUG_DMA
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@ -555,46 +577,52 @@ EXTERN void pic32mx_dmadump(DMA_HANDLE handle, const struct pic32mx_dmaregs_s *r
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#endif
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_usbpullup
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*
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* Description:
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* If USB is supported and the board supports a pullup via GPIO (for USB
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* software connect and disconnect), then the board software must provide
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* stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
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* of this method. Alternatively, if no pull-up GPIO the following EXTERN
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* can be redefined to be NULL.
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* If USB is supported and the board supports a pullup via GPIO (for USB software
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* connect and disconnect), then the board software must provide pic32mx_pullup.
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* See include/nuttx/usb/usbdev.h for additional description of this method.
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* Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
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* NULL.
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_USBDEV
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struct usbdev_s;
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EXTERN int pic32mx_usbpullup(FAR struct usbdev_s *dev, bool enable);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_usbsuspend
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*
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* Description:
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* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
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* is used. This function is called whenever the USB enters or leaves
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* suspend mode. This is an opportunity for the board logic to shutdown
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* clocks, power, etc. while the USB is suspended.
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* Board logic must provide the pic32mx_usbsuspend logic if the USBDEV driver is
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* used. This function is called whenever the USB enters or leaves suspend mode.
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* This is an opportunity for the board logic to shutdown clocks, power, etc. while
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* the USB is suspended.
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_USBDEV
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EXTERN void pic32mx_usbsuspend(FAR struct usbdev_s *dev, bool resume);
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#endif
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/****************************************************************************
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/************************************************************************************
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* Name: pic32mx_usbattach and pic32mx_usbdetach
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*
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* Description:
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* The USB stack must be notified when the device is attached or detached
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* by calling one of these functions.
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* The USB stack must be notified when the device is attached or detached by
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* calling one of these functions.
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*
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****************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_USBDEV
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EXTERN void pic32mx_usbattach(void);
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@ -63,10 +63,15 @@
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Enables non-standard debug output from this file */
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/* Enables non-standard debug output from this file.
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*
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* CONFIG_SPI_DEBUG && CONFIG_DEBUG - Define to enable basic SPI debug
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* CONFIG_DEBUG_VERBOSE - Define to enable verbose SPI debug
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*/
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_SPI
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# undef CONFIG_DEBUG_VERBOSE
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#endif
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#ifdef CONFIG_DEBUG_SPI
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@ -77,7 +82,6 @@
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# define spivdbg(x...)
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# endif
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#else
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# undef CONFIG_DEBUG_VERBOSE
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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@ -401,6 +405,13 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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uint32_t actual;
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uint32_t regval;
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#ifndef CONFIG_SPI_OWNBUS
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spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
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priv->frequency, priv->actual, frequency);
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#else
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spivdbg("New frequency: %d\n", regval);
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#endif
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/* Check if the requested frequency is the same as the frequency selection */
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#ifndef CONFIG_SPI_OWNBUS
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@ -435,8 +446,10 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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/* Save the new BRG value */
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spi_putreg(priv, PIC32MX_SPI_BRG_OFFSET, regval);
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spivdbg("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
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BOARD_PBCLOCK, frequency, divisor, regval);
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/* Calculate the new actual frequency"
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/* Calculate the new actual frequency.
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*
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* frequency = BOARD_PBCLOCK / (2 * divisor)
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*/
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@ -450,7 +463,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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priv->actual = actual;
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#endif
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spidbg("Frequency %d->%d\n", frequency, actual);
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spidbg("New frequency: %d Actual: %d\n", frequency, actual);
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return actual;
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}
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@ -474,16 +487,50 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
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uint32_t regval;
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#ifndef CONFIG_SPI_OWNBUS
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spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
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#else
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spivdbg("New mode: %d\n", mode);
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#endif
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/* Has the mode changed? */
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#ifndef CONFIG_SPI_OWNBUS
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if (mode != priv->mode)
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{
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#endif
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/* Yes... Set CR appropriately */
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/* Yes... Set CON register appropriately.
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*
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* Standard terminology is as follows:
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*
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* Mode CPOL CPHA
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* 0 0 0
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* 1 0 1
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* 2 1 0
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* 3 1 1
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*
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* CPOL=0: The inactive value of the clock is zero
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* CPOL=1: The inactive value of the clock is one
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* CPHA=0: Data is captured on the clock's inactive-to-active edge and
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* data is propagated on a active-to-inactive edge.
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* CPHA=1: Data is captured on the clock's active-to-inactive edge and
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* data is propagated on a active-to-inactive edge.
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*
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* CON Register mapping:
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* CPOL=0 corresponds to CON:CKP=0; CPOL=1 corresponds to CON:CKP=1
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* CPHA=0 corresponds to CON:CKE=1; CPHA=1 corresponds to CON:CKE=1
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*
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* In addition, the CON register supports SMP: SPI Data Input Sample
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* Phase bit:
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*
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* 1 = Input data sampled at end of data output time
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* 0 = Input data sampled at middle of data output time
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*
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* Which is hardcoded to 1.
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*/
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regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
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regval &= ~(SPI_CON_CKP|SPI_CON_SMP);
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regval &= ~(SPI_CON_CKP|SPI_CON_CKE);
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switch (mode)
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{
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@ -491,7 +538,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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break;
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case SPIDEV_MODE1: /* CPOL=0; CPHA=1 */
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regval |= SPI_CON_SMP;
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regval |= SPI_CON_CKE;
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break;
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case SPIDEV_MODE2: /* CPOL=1; CPHA=0 */
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@ -499,7 +546,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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break;
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case SPIDEV_MODE3: /* CPOL=1; CPHA=1 */
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regval |= (SPI_CON_CKP|SPI_CON_SMP);
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regval |= (SPI_CON_CKP|SPI_CON_CKE);
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break;
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default:
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@ -508,6 +555,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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}
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spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
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spivdbg("CON: %08x\n", regval);
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/* Save the mode so that subsequent re-configuratins will be faster */
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@ -535,9 +583,15 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
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{
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FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
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uint32_t mode;
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uint32_t setting;
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uint32_t regval;
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#ifndef CONFIG_SPI_OWNBUS
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spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
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#else
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spivdbg("New nbits: %d\n", nbits);
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#endif
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/* Has the number of bits changed? */
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DEBUGASSERT(priv && nbits > 7 && nbits < 17);
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@ -549,15 +603,15 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
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if (nbits == 8)
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{
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mode = SPI_CON_MODE_8BIT;
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setting = SPI_CON_MODE_8BIT;
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}
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else if (nbits == 16)
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{
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mode = SPI_CON_MODE_8BIT;
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setting = SPI_CON_MODE_8BIT;
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}
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else if (nbits == 32)
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{
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mode = SPI_CON_MODE_8BIT;
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setting = SPI_CON_MODE_8BIT;
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}
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else
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{
|
||||
@ -567,8 +621,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
|
||||
|
||||
regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
|
||||
regval &= ~SPI_CON_MODE_MASK;
|
||||
regval |= mode;
|
||||
regval |= setting;
|
||||
regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
|
||||
spivdbg("CON: %08x\n", regval);
|
||||
|
||||
/* Save the selection so the subsequence re-configurations will be faster */
|
||||
|
||||
@ -598,15 +653,26 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
|
||||
{
|
||||
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
|
||||
|
||||
spivdbg("wd: %04x\n", wd);
|
||||
|
||||
/* Write the data to transmitted to the SPI Data Register */
|
||||
|
||||
spi_putreg(priv, PIC32MX_SPI_BUF_OFFSET, (uint32_t)wd);
|
||||
|
||||
/* Wait for the SPITBE bit in the SPI Status Register to be set to 1. The
|
||||
* SPITBE bit will be set when the receive buffer is not empty.
|
||||
#ifdef CONFIG_PIC32MX_SPI_ENHBUF
|
||||
/* Wait for the SPIRBE bit in the SPI Status Register to be set to 0. In
|
||||
* enhanced buffer mode, the SPIRBE bit will be cleared in when the
|
||||
* receive buffer is not empty.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPITBE) == 0);
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBE) != 0);
|
||||
#else
|
||||
/* Wait for the SPIRBF bit in the SPI Status Register to be set to 1. In
|
||||
* normal mode, the SPIRBF bit will be set when receive data is available.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBF) == 0);
|
||||
#endif
|
||||
|
||||
/* Return the SPI data */
|
||||
|
||||
@ -639,7 +705,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
|
||||
uint32_t regval;
|
||||
uint8_t data;
|
||||
|
||||
spidbg("nwords: %d\n", nwords);
|
||||
spivdbg("nwords: %d\n", nwords);
|
||||
while (nwords)
|
||||
{
|
||||
/* Write the data to transmitted to the SPI Data Register */
|
||||
@ -647,11 +713,20 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
|
||||
data = *ptr++;
|
||||
spi_putreg(priv, PIC32MX_SPI_BUF_OFFSET, (uint32_t)data);
|
||||
|
||||
/* Wait for the SPITBE bit in the SPI Status Register to be set to 1.
|
||||
* The SPITBE bit will be set when the receive buffer is not empty.
|
||||
#ifdef CONFIG_PIC32MX_SPI_ENHBUF
|
||||
/* Wait for the SPIRBE bit in the SPI Status Register to be set to 0. In
|
||||
* enhanced buffer mode, the SPIRBE bit will be cleared in when the
|
||||
* receive buffer is not empty.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPITBE) == 0);
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBE) != 0);
|
||||
#else
|
||||
/* Wait for the SPIRBF bit in the SPI Status Register to be set to 1. In
|
||||
* normal mode, the SPIRBF bit will be set when receive data is available.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBF) == 0);
|
||||
#endif
|
||||
|
||||
/* Read from the buffer register to clear the status bit */
|
||||
|
||||
@ -684,7 +759,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
|
||||
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
|
||||
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
|
||||
|
||||
spidbg("nwords: %d\n", nwords);
|
||||
spivdbg("nwords: %d\n", nwords);
|
||||
while (nwords)
|
||||
{
|
||||
/* Write some dummy data to the SPI Data Register in order to clock the
|
||||
@ -693,11 +768,20 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
|
||||
|
||||
spi_putreg(priv, PIC32MX_SPI_BUF_OFFSET, 0xff);
|
||||
|
||||
/* Wait for the SPITBE bit in the SPI Status Register to be set to 1.
|
||||
* The SPITBE bit will be set when the receive buffer is not empty.
|
||||
#ifdef CONFIG_PIC32MX_SPI_ENHBUF
|
||||
/* Wait for the SPIRBE bit in the SPI Status Register to be set to 0. In
|
||||
* enhanced buffer mode, the SPIRBE bit will be cleared in when the
|
||||
* receive buffer is not empty.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPITBE) == 0);
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBE) != 0);
|
||||
#else
|
||||
/* Wait for the SPIRBF bit in the SPI Status Register to be set to 1. In
|
||||
* normal mode, the SPIRBF bit will be set when receive data is available.
|
||||
*/
|
||||
|
||||
while ((spi_getreg(priv, PIC32MX_SPI_STAT_OFFSET) & SPI_STAT_SPIRBF) == 0);
|
||||
#endif
|
||||
|
||||
/* Read the received data from the SPI Data Register */
|
||||
|
||||
@ -730,6 +814,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
spivdbg("port: %d\n", port);
|
||||
|
||||
/* Select the SPI state structure for this port */
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI1
|
||||
@ -782,10 +868,10 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
|
||||
regval = spi_getreg(priv, PIC32MX_SPI_BUF_OFFSET);
|
||||
|
||||
/* Set the ENHBUF bit if using Enhanced Buffer mode. */
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI_INTERRUPTS
|
||||
/* Attach the interrupt vector */
|
||||
/* Attach the interrupt vector. We do this early to make sure that the
|
||||
* resource is available.
|
||||
*/
|
||||
|
||||
ret = irq_attach(priv->vector, spi_interrupt);
|
||||
if (ret < 0)
|
||||
@ -793,21 +879,6 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
spidbg("Failed to attach vector: %d port: %d\n", priv->vector, port);
|
||||
goto errout;
|
||||
}
|
||||
|
||||
/* Enable SPI interrupts */
|
||||
|
||||
up_enable_irq(priv->eirq);
|
||||
up_enable_irq(priv->txirq);
|
||||
up_enable_irq(priv->rxirq);
|
||||
|
||||
/* Set the interrupt priority */
|
||||
|
||||
ret = up_prioritize_irq(priv->vector, CONFIG_PIC32MX_SPI_PRIORITY)
|
||||
if (ret < 0)
|
||||
{
|
||||
spidbg("up_prioritize_irq failed: %d\n", ret);
|
||||
goto errout;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Select a default frequency of approx. 400KHz */
|
||||
@ -818,13 +889,20 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
|
||||
spi_putreg(priv, PIC32MX_SPI_STATCLR_OFFSET, SPI_STAT_SPIROV);
|
||||
|
||||
/* Initial settings 8 bit + master mode + mode 0*/
|
||||
/* Initial settings 8 bit + master mode + mode 0. NOTE that MSSEN
|
||||
* not set: The slave select pin must be driven manually via the
|
||||
* board-specific pic32mx_spiNselect() interface.
|
||||
*/
|
||||
|
||||
regval = (SPI_CON_MSTEN | SPI_CON_MODE_8BIT | SPI_CON_ON);
|
||||
#ifdef CONFIG_PIC32MX_SPI_INTERRUPTS
|
||||
regval |= (SPI_CON_RTXISEL_HALF | SPI_CON_STXISEL_HALF);
|
||||
regval = (SPI_CON_MSTEN | SPI_CON_SMP | SPI_CON_MODE_8BIT | SPI_CON_ON);
|
||||
|
||||
/* Set the ENHBUF bit if using Enhanced Buffer mode. */
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI_ENHBUF
|
||||
regval |= (SPI_CON_ENHBUF | SPI_CON_RTXISEL_HALF | SPI_CON_STXISEL_HALF);
|
||||
#endif
|
||||
spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
|
||||
spivdbg("CON: %08x\n", regval);
|
||||
|
||||
/* Set the initial SPI configuration */
|
||||
|
||||
@ -838,6 +916,26 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
#ifndef CONFIG_SPI_OWNBUS
|
||||
sem_init(&priv->exclsem, 0, 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI_INTERRUPTS
|
||||
/* Enable interrupts at the SPI controller */
|
||||
|
||||
up_enable_irq(priv->eirq);
|
||||
up_enable_irq(priv->txirq);
|
||||
up_enable_irq(priv->rxirq);
|
||||
|
||||
/* Set the SPI interrupt priority */
|
||||
|
||||
ret = up_prioritize_irq(priv->vector, CONFIG_PIC32MX_SPI_PRIORITY)
|
||||
if (ret < 0)
|
||||
{
|
||||
spidbg("up_prioritize_irq failed: %d\n", ret);
|
||||
goto errout;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable interrupts at the interrupt controller */
|
||||
|
||||
irqrestore(flags);
|
||||
return &priv->spidev;
|
||||
|
||||
|
||||
@ -77,7 +77,7 @@ PIC32MX440F512H Pin Out
|
||||
21 AN8/U2CTS/C1OUT/RB8 N/C Not connected
|
||||
22 AN9/C2OUT/PMA7/RB9 N/C Not connected
|
||||
23 TMS/AN10/CVREFOUT/PMA13/RB10 UTIL_WP FLASH (U1) WP*
|
||||
24 TDO/AN11/PMA12//RB11 SD_CS SD connector CS
|
||||
24 TDO/AN11/PMA12/RB11 SD_CS SD connector CS
|
||||
25 Vss Grounded
|
||||
26 Vdd +3.3V ---
|
||||
27 TCK/AN12/PMA11/RB12 SD_CD SD connector CD
|
||||
@ -452,15 +452,21 @@ selected as follow:
|
||||
Where <subdir> is one of the following:
|
||||
|
||||
ostest:
|
||||
-------
|
||||
=======
|
||||
Description.
|
||||
------------
|
||||
This configuration directory, performs a simple OS test using
|
||||
apps/examples/ostest.
|
||||
|
||||
nsh:
|
||||
----
|
||||
====
|
||||
Description.
|
||||
------------
|
||||
Configures the NuttShell (nsh) located at apps/examples/nsh. The
|
||||
Configuration enables only the serial NSH interface.
|
||||
|
||||
USB Configuations.
|
||||
-----------------
|
||||
Several USB device configurations can be enabled and included
|
||||
as NSH built-in built in functions. All require the following
|
||||
basic setup in your .config to enable USB device support:
|
||||
@ -491,8 +497,27 @@ Where <subdir> is one of the following:
|
||||
to enable the USB mass storage device. However, this device cannot
|
||||
work until support for the SD card is also incorporated.
|
||||
|
||||
SD Card Support.
|
||||
----------------
|
||||
Support for the on-board, SPI-based SD card is available but is
|
||||
not yet functional (at least at the time of this writing). SD
|
||||
card support can be enabled for testing by simply enabling SPI2
|
||||
support in the configuration file:
|
||||
|
||||
-CONFIG_PIC32MX_SPI2=n
|
||||
+CONFIG_PIC32MX_SPI2=y
|
||||
|
||||
Debug output for testing the SD card can be enabled using:
|
||||
|
||||
-CONFIG_DEBUG_FS=n
|
||||
-CONFIG_DEBUG_SPI=n
|
||||
+CONFIG_DEBUG_FS=y
|
||||
+CONFIG_DEBUG_SPI=y
|
||||
|
||||
usbnsh:
|
||||
-------
|
||||
=======
|
||||
Description.
|
||||
------------
|
||||
This is another NSH example. If differs from the 'nsh' configuration
|
||||
above in that this configurations uses a USB serial device for console
|
||||
I/O. This configuration was created to support the "DB-DP11212 PIC32
|
||||
@ -501,6 +526,8 @@ Where <subdir> is one of the following:
|
||||
"DB_DP11215 PIC32 Storage Demo Board" and has only be testing on that
|
||||
board.
|
||||
|
||||
Comparison to nsh
|
||||
-----------------
|
||||
Below summarizes the key configuration differences between the 'nsh'
|
||||
and the 'upnsh' configurations:
|
||||
|
||||
@ -511,6 +538,8 @@ Where <subdir> is one of the following:
|
||||
CONFIG_CDCACM=y : The CDC/ACM serial device class is enabled
|
||||
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is the console
|
||||
|
||||
Using the Prolifics PL2303 Emulation
|
||||
------------------------------------
|
||||
You could also use the non-standard PL2303 serial device instead of
|
||||
the standard CDC/ACM serial device by changing:
|
||||
|
||||
|
||||
@ -355,6 +355,8 @@ CONFIG_DEBUG_VERBOSE=n
|
||||
CONFIG_DEBUG_SYMBOLS=n
|
||||
CONFIG_DEBUG_SCHED=n
|
||||
CONFIG_DEBUG_USB=n
|
||||
CONFIG_DEBUG_FS=n
|
||||
CONFIG_DEBUG_SPI=n
|
||||
|
||||
CONFIG_HAVE_CXX=n
|
||||
CONFIG_HAVE_CXXINITIALIZE=n
|
||||
@ -910,7 +912,7 @@ CONFIG_NSH_DISABLEBG=n
|
||||
CONFIG_NSH_ROMFSETC=n
|
||||
CONFIG_NSH_CONSOLE=y
|
||||
CONFIG_NSH_TELNET=n
|
||||
CONFIG_NSH_ARCHINIT=n
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_IOBUFFER_SIZE=512
|
||||
CONFIG_NSH_DHCPC=n
|
||||
CONFIG_NSH_NOMAC=n
|
||||
@ -929,7 +931,7 @@ CONFIG_NSH_FATMOUNTPT=/tmp
|
||||
#
|
||||
# Architecture-specific NSH options
|
||||
#
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=1
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=2
|
||||
CONFIG_NSH_MMCSDSLOTNO=0
|
||||
CONFIG_NSH_MMCSDMINOR=0
|
||||
|
||||
|
||||
@ -766,7 +766,7 @@ CONFIG_NSH_DISABLEBG=n
|
||||
CONFIG_NSH_ROMFSETC=n
|
||||
CONFIG_NSH_CONSOLE=y
|
||||
CONFIG_NSH_TELNET=n
|
||||
CONFIG_NSH_ARCHINIT=n
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_IOBUFFER_SIZE=512
|
||||
CONFIG_NSH_DHCPC=n
|
||||
CONFIG_NSH_NOMAC=n
|
||||
@ -785,7 +785,7 @@ CONFIG_NSH_FATMOUNTPT=/tmp
|
||||
#
|
||||
# Architecture-specific NSH options
|
||||
#
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=1
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=2
|
||||
CONFIG_NSH_MMCSDSLOTNO=0
|
||||
CONFIG_NSH_MMCSDMINOR=0
|
||||
|
||||
|
||||
@ -69,9 +69,9 @@
|
||||
* notification will be enabled when pic32mx_gpioattach() is called.
|
||||
*/
|
||||
|
||||
#define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_3)
|
||||
#define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_2)
|
||||
#define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_4)
|
||||
#define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN3)
|
||||
#define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN2)
|
||||
#define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN4)
|
||||
|
||||
/* Change notification numbers:
|
||||
* RB3 -> CN5
|
||||
@ -91,7 +91,7 @@
|
||||
|
||||
static const uint16_t g_buttonset[NUM_BUTTONS] =
|
||||
{
|
||||
BUTTON_SW1 BUTTON_SW2, BUTTON_SW3
|
||||
GPIO_SW1 GPIO_SW2, GPIO_SW3
|
||||
}
|
||||
|
||||
/* Change notification number for each button */
|
||||
|
||||
@ -63,7 +63,7 @@
|
||||
#ifdef CONFIG_ARCH_BOARD_SUREPIC32MX
|
||||
# define CONFIG_NSH_HAVEMMCSD 1
|
||||
# define CONFIG_NSH_HAVEUSBHOST 1
|
||||
# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1
|
||||
# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 2
|
||||
# error "The Sure PIC32MX MMC/SD is on SPI2"
|
||||
# undef CONFIG_NSH_MMCSDSPIPORTNO
|
||||
# define CONFIG_NSH_MMCSDSPIPORTNO 2
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* configs/sure-pic32mx/src/up_spi.c
|
||||
* arch/arm/src/board/up_spi.c
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -57,22 +57,47 @@
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* The following enable debug output from this file (needs CONFIG_DEBUG too).
|
||||
*
|
||||
* CONFIG_SPI_DEBUG - Define to enable basic SPI debug
|
||||
* CONFIG_SPI_VERBOSE - Define to enable verbose SPI debug
|
||||
/* The Sure PIC32MX has an SD slot connected on SPI2:
|
||||
*
|
||||
* SPI
|
||||
* SCK2/PMA5/CN8/RG6 SCK SD connector SCK, FLASH (U1) SCK*
|
||||
* SDI2/PMA4/CN9/RG7 SDI SD connector DO, FLASH (U1) SO*
|
||||
* SDO2/PMA3/CN10/RG8 SDO SD connector DI, FLASH (U1) SI*
|
||||
*
|
||||
* Chip Select. Pulled up on-board
|
||||
* TDO/AN11/PMA12/RB11 SD_CS SD connector CS
|
||||
*
|
||||
* Status inputs. All pulled up on-board
|
||||
*
|
||||
* TCK/AN12/PMA11/RB12 SD_CD SD connector CD
|
||||
* TDI/AN13/PMA10/RB13 SD_WD SD connector WD
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_SPI_DEBUG
|
||||
#define GPIO_SD_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN11)
|
||||
#define GPIO_SD_CD (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN12)
|
||||
#define GPIO_SD_WD (GPIO_INPUT|GPIO_PORTB|GPIO_PIN13)
|
||||
|
||||
/* Change notification numbers -- Not available for SD_CD. */
|
||||
|
||||
/* The following enable debug output from this file.
|
||||
*
|
||||
* CONFIG_DEBUG_SPI && CONFIG_DEBUG - Define to enable basic SPI debug
|
||||
* CONFIG_DEBUG_VERBOSE - Define to enable verbose SPI debug
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_DEBUG
|
||||
# undef CONFIG_DEBUG_SPI
|
||||
# undef CONFIG_DEBUG_VERBOSE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_SPI
|
||||
# define spidbg lldbg
|
||||
# ifdef CONFIG_SPI_VERBOSE
|
||||
# ifdef CONFIG_DEBUG_VERBOSE
|
||||
# define spivdbg lldbg
|
||||
# else
|
||||
# define spivdbg(x...)
|
||||
# endif
|
||||
#else
|
||||
# undef CONFIG_SPI_VERBOSE
|
||||
# define spidbg(x...)
|
||||
# define spivdbg(x...)
|
||||
#endif
|
||||
@ -95,11 +120,13 @@
|
||||
|
||||
void weak_function pic32mx_spiinitialize(void)
|
||||
{
|
||||
/* Configure the SPI2 chip select GPIOs */
|
||||
/* Configure the SPI2 chip select (CS) GPIO output, and the card detect (CD) and
|
||||
* write protect (WP) inputs.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI2
|
||||
# warning "Missing logic"
|
||||
#endif
|
||||
pic32mx_configgpio(GPIO_SD_CS);
|
||||
pic32mx_configgpio(GPIO_SD_CD);
|
||||
pic32mx_configgpio(GPIO_SD_WD);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
@ -128,17 +155,40 @@ void weak_function pic32mx_spiinitialize(void)
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PIC32MX_SPI2
|
||||
void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
#warning "Missing logic"
|
||||
spivdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
|
||||
/* The SD card chip select is pulled high and active low */
|
||||
|
||||
if (devid == SPIDEV_MMCSD)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_SD_CS, !selected);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
{
|
||||
spidbg("Returning nothing\n");
|
||||
#warning "Missing logic"
|
||||
return 0;
|
||||
uint8_t ret = 0;
|
||||
|
||||
/* Card detect is pull up on-board. If a low value is sensed then the card must
|
||||
* be present.
|
||||
*/
|
||||
|
||||
if (!pic32mx_gpioread(GPIO_SD_CD))
|
||||
{
|
||||
ret = SPI_STATUS_PRESENT;
|
||||
|
||||
/* It seems that a high value indicatest the the card is write protected. */
|
||||
|
||||
if (pic32mx_gpioread(GPIO_SD_WD))
|
||||
{
|
||||
ret |= SPI_STATUS_WRPROTECTED;
|
||||
}
|
||||
}
|
||||
|
||||
spivdbg("Returning %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PIC32MX_SPI2 */
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* configs/sure-pic32mx/src/up_usbdev.c
|
||||
* arch/arm/src/board/up_usbdev.c
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* References:
|
||||
|
||||
@ -929,7 +929,7 @@ CONFIG_NSH_FATMOUNTPT=/tmp
|
||||
#
|
||||
# Architecture-specific NSH options
|
||||
#
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=1
|
||||
CONFIG_NSH_MMCSDSPIPORTNO=2
|
||||
CONFIG_NSH_MMCSDSLOTNO=0
|
||||
CONFIG_NSH_MMCSDMINOR=0
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user