diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 407a53ee15..f6a965ad17 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -381,6 +381,7 @@ config ARCH_CHIP_TIVA select ARM_HAVE_MPU_UNIFIED select ARCH_HAVE_FPU select ARCH_HAVE_FETCHADD + select ARMV7M_CMNVECTOR ---help--- TI Tiva TM4C architectures (ARM Cortex-M4) diff --git a/arch/arm/include/tiva/irq.h b/arch/arm/include/tiva/irq.h index 9eb549883f..b30c3e1123 100644 --- a/arch/arm/include/tiva/irq.h +++ b/arch/arm/include/tiva/irq.h @@ -185,7 +185,7 @@ # error "Unsupported Stellaris IRQ file" #endif -#define NR_VECTORS (NR_IRQS - 16) +#define TIVA_IRQ_NEXTINT (NR_IRQS - 16) /* GPIO IRQs -- Note that support for individual GPIO ports can * be disabled in order to reduce the size of the implementation. diff --git a/arch/arm/include/tiva/lm4f_irq.h b/arch/arm/include/tiva/lm4f_irq.h index c6d5d60107..47b3e237bd 100644 --- a/arch/arm/include/tiva/lm4f_irq.h +++ b/arch/arm/include/tiva/lm4f_irq.h @@ -214,7 +214,7 @@ # define NR_IRQS (155) /* (Really fewer because of reserved vectors) */ #else -# error "IRQ Numbers not known for this Stellaris chip" +# error "IRQ Numbers not known for this Tiva chip" #endif /************************************************************************************ diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs index 5a13f6eee8..2e27e1d761 100644 --- a/arch/arm/src/efm32/Make.defs +++ b/arch/arm/src/efm32/Make.defs @@ -76,7 +76,8 @@ CMN_CSRCS += up_checkstack.c endif ifeq ($(CONFIG_ARCH_FPU),y) -CMN_ASRCS += up_fpu.S up_copyarmstate.c +CMN_ASRCS += up_fpu.S +CMN_CSRCS += up_copyarmstate.c endif ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y) diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 1e990a6b82..92f6d3de5e 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -90,7 +90,8 @@ endif endif ifeq ($(CONFIG_ARCH_FPU),y) -CMN_ASRCS += up_fpu.S up_copyarmstate.c +CMN_ASRCS += up_fpu.S +CMN_CSRCS += up_copyarmstate.c endif ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y) diff --git a/arch/arm/src/lpc17xx/Make.defs b/arch/arm/src/lpc17xx/Make.defs index 7b033efbfd..e06d2760cf 100644 --- a/arch/arm/src/lpc17xx/Make.defs +++ b/arch/arm/src/lpc17xx/Make.defs @@ -89,7 +89,8 @@ endif endif ifeq ($(CONFIG_ARCH_FPU),y) -CMN_ASRCS += up_fpu.S up_copyarmstate.c +CMN_ASRCS += up_fpu.S +CMN_CSRCS += up_copyarmstate.c endif # Required LPC17xx files diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs index 59bfadd3c2..5c83a6f116 100644 --- a/arch/arm/src/sam34/Make.defs +++ b/arch/arm/src/sam34/Make.defs @@ -84,7 +84,8 @@ endif endif ifeq ($(CONFIG_ARCH_FPU),y) -CMN_ASRCS += up_fpu.S up_copyarmstate.c +CMN_ASRCS += up_fpu.S +CMN_CSRCS += up_copyarmstate.c endif ifeq ($(CONFIG_STACK_COLORATION),y) diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs index 7db83306bb..6c4d44a18b 100644 --- a/arch/arm/src/tiva/Make.defs +++ b/arch/arm/src/tiva/Make.defs @@ -34,7 +34,7 @@ # ############################################################################ -HEAD_ASRC = tiva_vectors.S +HEAD_ASRC = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S @@ -52,6 +52,20 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += up_idle.c endif +ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y) +ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) +CMN_ASRCS += up_lazyexception.S +else +CMN_ASRCS += up_exception.S +endif +CMN_CSRCS += up_vectors.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CMN_ASRCS += up_fpu.S +CMN_CSRCS += up_copyarmstate.c +endif + ifeq ($(CONFIG_ARCH_RAMVECTORS),y) CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c endif diff --git a/arch/arm/src/tiva/chip.h b/arch/arm/src/tiva/chip.h index 2ab83b016a..f8ecf0f285 100644 --- a/arch/arm/src/tiva/chip.h +++ b/arch/arm/src/tiva/chip.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/tiva/chip.h * - * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2010, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,7 @@ #include #include +#include /* Then get all of the register definitions */ @@ -57,4 +58,15 @@ #include "chip/tiva_timer.h" /* Timer */ #include "chip/tiva_adc.h" /* ADC */ +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Provide the required number of peripheral interrupt vector definitions as well. + * The definition TIVA_IRQ_NEXTINT simply comes from the chip-specific IRQ header + * file included by arch/tiva/irq.h. + */ + +#define ARMV7M_PERIPHERAL_INTERRUPTS TIVA_IRQ_NEXTINT + #endif /* __ARCH_ARM_SRC_TIVA_CHIP_H */ diff --git a/arch/arm/src/tiva/chip/lm3s_vectors.h b/arch/arm/src/tiva/chip/lm3s_vectors.h deleted file mode 100644 index 8b8c26cc36..0000000000 --- a/arch/arm/src/tiva/chip/lm3s_vectors.h +++ /dev/null @@ -1,439 +0,0 @@ -/************************************************************************************ - * arch/arm/src/tiva/chip/lm3s_vectors.h - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Vectors - ************************************************************************************/ - -/* This file is included by tiva_vectors.S. It provides the macro VECTOR that - * supplies ach Stellaris vector in terms of a (lower-case) ISR label and an - * (upper-case) IRQ number as defined in arch/arm/include/tiva/lm3s_irq.h. - * tiva_vectors.S will define the VECTOR in different ways in order to generate - * the interrupt vectors and handlers in their final form. - */ - -#if defined(CONFIG_ARCH_CHIP_LM3S6918) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 71 interrupt table entries for I/O interrupts. */ - -# define ARMV7M_PERIPHERAL_INTERRUPTS 71 - -#else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -UNUSED(TIVA_RESERVED_25) /* Vector 25: Reserved */ -UNUSED(TIVA_RESERVED_26) /* Vector 26: Reserved */ -UNUSED(TIVA_RESERVED_27) /* Vector 27: Reserved */ -UNUSED(TIVA_RESERVED_28) /* Vector 28: Reserved */ -UNUSED(TIVA_RESERVED_29) /* Vector 29: Reserved */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timer */ -VECTOR(tiva_tmr0a, TIVA_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ -VECTOR(tiva_tmr0b, TIVA_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ -VECTOR(tiva_tmr1a, TIVA_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ -VECTOR(tiva_tmr1b, TIVA_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ -VECTOR(tiva_tmr2a, TIVA_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ - -VECTOR(tiva_tmr2b, TIVA_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ -VECTOR(tiva_cmp0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_cmp1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -UNUSED(TIVA_RESERVED_43) /* Vector 43: Reserved */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -VECTOR(tiva_gpioh, TIVA_IRQ_GPIOH) /* Vector 48: GPIO Port H */ -UNUSED(TIVA_RESERVED_49) /* Vector 49: Reserved */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_tmr3a, TIVA_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ -VECTOR(tiva_tmr3b, TIVA_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -UNUSED(TIVA_RESERVED_54) /* Vector 54: Reserved */ -UNUSED(TIVA_RESERVED_55) /* Vector 55: Reserved */ -UNUSED(TIVA_RESERVED_56) /* Vector 56: Reserved */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -VECTOR(tiva_eth, TIVA_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ -VECTOR(tiva_hib, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -UNUSED(TIVA_RESERVED_60) /* Vector 60: Reserved */ -UNUSED(TIVA_RESERVED_61) /* Vector 61: Reserved */ -UNUSED(TIVA_RESERVED_62) /* Vector 62: Reserved */ -UNUSED(TIVA_RESERVED_63) /* Vector 63: Reserved */ -UNUSED(TIVA_RESERVED_64) /* Vector 64: Reserved */ -UNUSED(TIVA_RESERVED_65) /* Vector 65: Reserved */ -UNUSED(TIVA_RESERVED_66) /* Vector 66: Reserved */ -UNUSED(TIVA_RESERVED_67) /* Vector 67: Reserved */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: Reserved */ -#endif - -#elif defined(CONFIG_ARCH_CHIP_LM3S6432) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 71 interrupt table entries for I/O interrupts. */ - -# define ARMV7M_PERIPHERAL_INTERRUPTS 71 - -#else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -UNUSED(TIVA_RESERVED_25) /* Vector 25: Reserved */ -VECTOR(tiva_pwm0, TIVA_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ -UNUSED(TIVA_RESERVED_27) /* Vector 27: Reserved */ -UNUSED(TIVA_RESERVED_28) /* Vector 28: Reserved */ -UNUSED(TIVA_RESERVED_29) /* Vector 29: Reserved */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timer */ -VECTOR(tiva_tmr0a, TIVA_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ -VECTOR(tiva_tmr0b, TIVA_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ -VECTOR(tiva_tmr1a, TIVA_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ -VECTOR(tiva_tmr1b, TIVA_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ -VECTOR(tiva_tmr2a, TIVA_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ - -VECTOR(tiva_tmr2b, TIVA_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ -VECTOR(tiva_cmp0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_cmp1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -UNUSED(TIVA_RESERVED_43) /* Vector 43: Reserved */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -UNUSED(TIVA_RESERVED_48) /* Vector 48: Reserved */ -UNUSED(TIVA_RESERVED_49) /* Vector 49: Reserved */ - -UNUSED(TIVA_RESERVED_50) /* Vector 50: Reserved */ -UNUSED(TIVA_RESERVED_51) /* Vector 51: Reserved */ -UNUSED(TIVA_RESERVED_52) /* Vector 52: Reserved */ -UNUSED(TIVA_RESERVED_53) /* Vector 53: Reserved */ -UNUSED(TIVA_RESERVED_54) /* Vector 54: Reserved */ -UNUSED(TIVA_RESERVED_55) /* Vector 55: Reserved */ -UNUSED(TIVA_RESERVED_56) /* Vector 56: Reserved */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -VECTOR(tiva_eth, TIVA_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ -UNUSED(TIVA_RESERVED_59) /* Vector 59: Reserved */ - -UNUSED(TIVA_RESERVED_60) /* Vector 60: Reserved */ -UNUSED(TIVA_RESERVED_61) /* Vector 61: Reserved */ -UNUSED(TIVA_RESERVED_62) /* Vector 62: Reserved */ -UNUSED(TIVA_RESERVED_63) /* Vector 63: Reserved */ -UNUSED(TIVA_RESERVED_64) /* Vector 64: Reserved */ -UNUSED(TIVA_RESERVED_65) /* Vector 65: Reserved */ -UNUSED(TIVA_RESERVED_66) /* Vector 66: Reserved */ -UNUSED(TIVA_RESERVED_67) /* Vector 67: Reserved */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: Reserved */ -#endif - -#elif defined(CONFIG_ARCH_CHIP_LM3S6965) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 71 interrupt table entries for I/O interrupts. */ - -# define ARMV7M_PERIPHERAL_INTERRUPTS 71 - -#else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwmfault, TIVA_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ -VECTOR(tiva_pwm0, TIVA_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ -VECTOR(tiva_pwm1, TIVA_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ -VECTOR(tiva_pwm2, TIVA_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI 0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timer */ -VECTOR(tiva_tmr0a, TIVA_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ -VECTOR(tiva_tmr0b, TIVA_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ -VECTOR(tiva_tmr1a, TIVA_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ -VECTOR(tiva_tmr1b, TIVA_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ -VECTOR(tiva_tmr2a, TIVA_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ - -VECTOR(tiva_tmr2b, TIVA_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ -VECTOR(tiva_cmp0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_cmp1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -UNUSED(TIVA_RESERVED_43) /* Vector 43: Reserved */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -UNUSED(TIVA_RESERVED_48) /* Vector 48: Reserved */ -VECTOR(tiva_uart2, TIVA_IRQ_UART1) /* Vector 49: UART 1 */ - -UNUSED(TIVA_RESERVED_50) /* Vector 50: Reserved */ -VECTOR(tiva_tmr3a, TIVA_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ -VECTOR(tiva_tmr3b, TIVA_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_qei1, TIVA_IRQ_QEI1) /* Vector 54: QEI 1 */ -UNUSED(TIVA_RESERVED_55) /* Vector 55: Reserved */ -UNUSED(TIVA_RESERVED_56) /* Vector 56: Reserved */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -VECTOR(tiva_eth, TIVA_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ -VECTOR(tiva_hib, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -UNUSED(TIVA_RESERVED_60) /* Vector 60: Reserved */ -UNUSED(TIVA_RESERVED_61) /* Vector 61: Reserved */ -UNUSED(TIVA_RESERVED_62) /* Vector 62: Reserved */ -UNUSED(TIVA_RESERVED_63) /* Vector 63: Reserved */ -UNUSED(TIVA_RESERVED_64) /* Vector 64: Reserved */ -UNUSED(TIVA_RESERVED_65) /* Vector 65: Reserved */ -UNUSED(TIVA_RESERVED_66) /* Vector 66: Reserved */ -UNUSED(TIVA_RESERVED_67) /* Vector 67: Reserved */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: Reserved */ -#endif - -#elif defined(CONFIG_ARCH_CHIP_LM3S8962) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 71 interrupt table entries for I/O interrupts. */ - -# define ARMV7M_PERIPHERAL_INTERRUPTS 71 - -#else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwmfault, TIVA_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ -VECTOR(tiva_pwm0, TIVA_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ -VECTOR(tiva_pwm1, TIVA_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ -VECTOR(tiva_pwm2, TIVA_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI 0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timer */ -VECTOR(tiva_tmr0a, TIVA_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ -VECTOR(tiva_tmr0b, TIVA_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ -VECTOR(tiva_tmr1a, TIVA_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ -VECTOR(tiva_tmr1b, TIVA_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ -VECTOR(tiva_tmr2a, TIVA_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ - -VECTOR(tiva_tmr2b, TIVA_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ -VECTOR(tiva_cmp0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -UNUSED(TIVA_RESERVED_42) /* Vector 42: Reserved */ -UNUSED(TIVA_RESERVED_43) /* Vector 43: Reserved */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -UNUSED(TIVA_RESERVED_48) /* Vector 48: Reserved */ -UNUSED(TIVA_RESERVED_49) /* Vector 49: Reserved */ - -UNUSED(TIVA_RESERVED_50) /* Vector 50: Reserved */ -VECTOR(tiva_tmr3a, TIVA_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ -VECTOR(tiva_tmr3b, TIVA_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_qei1, TIVA_IRQ_QEI1) /* Vector 54: QEI 1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 55: CAN 0 */ -UNUSED(TIVA_RESERVED_56) /* Vector 56: Reserved */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -VECTOR(tiva_eth, TIVA_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ -VECTOR(tiva_hib, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -UNUSED(TIVA_RESERVED_60) /* Vector 60: Reserved */ -UNUSED(TIVA_RESERVED_61) /* Vector 61: Reserved */ -UNUSED(TIVA_RESERVED_62) /* Vector 62: Reserved */ -UNUSED(TIVA_RESERVED_63) /* Vector 63: Reserved */ -UNUSED(TIVA_RESERVED_64) /* Vector 64: Reserved */ -UNUSED(TIVA_RESERVED_65) /* Vector 65: Reserved */ -UNUSED(TIVA_RESERVED_66) /* Vector 66: Reserved */ -UNUSED(TIVA_RESERVED_67) /* Vector 67: Reserved */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: Reserved */ -#endif - -#elif defined(CONFIG_ARCH_CHIP_LM3S9B96) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -#ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 72 interrupt table entries for I/O interrupts. */ - -# define ARMV7M_PERIPHERAL_INTERRUPTS 72 - -#else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ - -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwmfault, TIVA_IRQ_PWMFAULT) /* Vector 25: PWM Fault */ -VECTOR(tiva_pwm0, TIVA_IRQ_PWM0) /* Vector 26: PWM Generator 0 */ -VECTOR(tiva_pwm1, TIVA_IRQ_PWM1) /* Vector 27: PWM Generator 1 */ -VECTOR(tiva_pwm2, TIVA_IRQ_PWM2) /* Vector 28: PWM Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI 0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timer */ -VECTOR(tiva_tmr0a, TIVA_IRQ_TIMER0A) /* Vector 35: Timer 0 A */ -VECTOR(tiva_tmr0b, TIVA_IRQ_TIMER0B) /* Vector 36: Timer 0 B */ -VECTOR(tiva_tmr1a, TIVA_IRQ_TIMER1A) /* Vector 37: Timer 1 A */ -VECTOR(tiva_tmr1b, TIVA_IRQ_TIMER1B) /* Vector 38: Timer 1 B */ -VECTOR(tiva_tmr2a, TIVA_IRQ_TIMER2A) /* Vector 39: Timer 2 A */ - -VECTOR(tiva_tmr2b, TIVA_IRQ_TIMER2B) /* Vector 40: Timer 3 B */ -VECTOR(tiva_cmp0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_cmp1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -VECTOR(tiva_cmp2, TIVA_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -VECTOR(tiva_gpioh, TIVA_IRQ_GPIOH) /* Vector 48: GPIO Port H */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 49: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: GPIO Port H */ -VECTOR(tiva_tmr3a, TIVA_IRQ_TIMER3A) /* Vector 51: Timer 3 A */ -VECTOR(tiva_tmr3b, TIVA_IRQ_TIMER3B) /* Vector 52: Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_qei1, TIVA_IRQ_QEI1) /* Vector 54: QEI 1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 55: CAN 0 */ -VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 56: CAN 1 */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -VECTOR(tiva_eth, TIVA_IRQ_ETHCON) /* Vector 58: Ethernet Controller */ -UNUSED(TIVA_RESERVED_59) /* Vector 59: Reserved */ - -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 60: USB */ -VECTOR(tiva_pwm3, TIVA_IRQ_PWM3) /* Vector 61: PWM 3 */ -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 62: uDMA Software */ -VECTOR(tiva_udmaerror, TIVA_IRQ_UDMAERROR) /* Vector 63: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 64: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 65: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 66: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 67: ADC1 Sequence 3 */ -VECTOR(tiva_i2s0, TIVA_IRQ_I2S0) /* Vector 68: I2S 0 */ -VECTOR(tiva_epi, TIVA_IRQ_EPI) /* Vector 69: EPI */ - -VECTOR(tiva_gpioj, TIVA_IRQ_GPIOJ) /* Vector 70: GPIO Port J */ -UNUSED(TIVA_RESERVED_71) /* Vector 71: Reserved */ -#endif - -#else -# error "Vectors not specified for this Stellaris chip" -#endif diff --git a/arch/arm/src/tiva/chip/lm4f_vectors.h b/arch/arm/src/tiva/chip/lm4f_vectors.h deleted file mode 100644 index 7d8928fd65..0000000000 --- a/arch/arm/src/tiva/chip/lm4f_vectors.h +++ /dev/null @@ -1,223 +0,0 @@ -/************************************************************************************ - * arch/arm/src/tiva/chip/lm4f_vectors.f - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Vectors - ************************************************************************************/ - -/* This file is included by tiva_vectors.S. It provides the macro VECTOR that - * supplies ach Stellaris vector in terms of a (lower-case) ISR label and an - * (upper-case) IRQ number as defined in arch/arm/include/tiva/lm4f_irq.h. - * tiva_vectors.S will define the VECTOR in different ways in order to generate - * the interrupt vectors and handlers in their final form. - */ - -#if defined(CONFIG_ARCH_CHIP_LM4F120) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -# ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 155 interrupt table entries for I/O interrupts. */ - -ARMV7M_PERIPHERAL_INTERRUPTS 155 - -# else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -UNUSED(TIVA_RESERVED_25) /* Vector 25: Reserved */ -UNUSED(TIVA_RESERVED_26) /* Vector 26: Reserved */ -UNUSED(TIVA_RESERVED_27) /* Vector 27: Reserved */ -UNUSED(TIVA_RESERVED_28) /* Vector 28: Reserved */ -UNUSED(TIVA_RESERVED_29) /* Vector 29: Reserved */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timers 0 and 1 */ -VECTOR(tiva_timer0a, TIVA_IRQ_TIMER0A) /* Vector 35: 16/32-Bit Timer 0 A */ -VECTOR(tiva_timer0b, TIVA_IRQ_TIMER0B) /* Vector 36: 16/32-Bit Timer 0 B */ -VECTOR(tiva_timer1a, TIVA_IRQ_TIMER1A) /* Vector 37: 16/32-Bit Timer 1 A */ -VECTOR(tiva_timer1b, TIVA_IRQ_TIMER1B) /* Vector 38: 16/32-Bit Timer 1 B */ -VECTOR(tiva_timer2a, TIVA_IRQ_TIMER2A) /* Vector 39: 16/32-Bit Timer 2 A */ - -VECTOR(tiva_timer2b, TIVA_IRQ_TIMER2B) /* Vector 40: 16/32-Bit Timer 2 B */ -VECTOR(tiva_compare0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_compare1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -UNUSED(TIVA_RESERVED_43) /* Vector 43: Reserved */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH and EEPROM Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -UNUSED(TIVA_RESERVED_47) /* Vector 47: Reserved */ -UNUSED(TIVA_RESERVED_48) /* Vector 48: Reserved */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 22: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_timer3a, TIVA_IRQ_TIMER3A) /* Vector 51: 16/32-Bit Timer 3 A */ -VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -UNUSED(TIVA_RESERVED_54) /* Vector 54: Reserved */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 55: CAN 0 */ -UNUSED(TIVA_RESERVED_56) /* Vector 56: Reserved */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -UNUSED(TIVA_RESERVED_58) /* Vector 58: Reserved */ -VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 60: USB */ -UNUSED(TIVA_RESERVED_61) /* Vector 61: Reserved */ -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 62: uDMA Software */ -VECTOR(tiva_udmaerro, TIVA_IRQ_UDMAERROR) /* Vector 63: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 64: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 65: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 66: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 67: ADC1 Sequence 3 */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: Reserved */ -UNUSED(TIVA_RESERVED_71) /* Vector 71: Reserved */ -UNUSED(TIVA_RESERVED_72) /* Vector 72: Reserved */ -VECTOR(tiva_ssi2, TIVA_IRQ_SSI2) /* Vector 73: SSI 2 */ -VECTOR(tiva_ssi3, TIVA_IRQ_SSI3) /* Vector 74: SSI 3 */ -VECTOR(tiva_uart3, TIVA_IRQ_UART3) /* Vector 75: UART 3 */ -VECTOR(tiva_uart4, TIVA_IRQ_UART4) /* Vector 76: UART 4 */ -VECTOR(tiva_uart5, TIVA_IRQ_UART5) /* Vector 77: UART 5 */ -VECTOR(tiva_uart6, TIVA_IRQ_UART6) /* Vector 78: UART 6 */ -VECTOR(tiva_uart7, TIVA_IRQ_UART7) /* Vector 79: UART 7 */ - -UNUSED(TIVA_RESERVED_80) /* Vector 80: Reserved */ -UNUSED(TIVA_RESERVED_81) /* Vector 81: Reserved */ -UNUSED(TIVA_RESERVED_82) /* Vector 82: Reserved */ -UNUSED(TIVA_RESERVED_83) /* Vector 83: Reserved */ -VECTOR(tiva_i2c2, TIVA_IRQ_I2C2) /* Vector 84: I2C 2 */ -VECTOR(tiva_i2c3, TIVA_IRQ_I2C3) /* Vector 85: I2C 3 */ -VECTOR(tiva_timer4a, TIVA_IRQ_TIMER4A) /* Vector 86: 16/32-Bit Timer 4 A */ -VECTOR(tiva_timer4b, TIVA_IRQ_TIMER4B) /* Vector 87: 16/32-Bit Timer 4 B */ -UNUSED(TIVA_RESERVED_88) /* Vector 88: Reserved */ -UNUSED(TIVA_RESERVED_89) /* Vector 89: Reserved */ - -UNUSED(TIVA_RESERVED_90) /* Vector 90: Reserved */ -UNUSED(TIVA_RESERVED_91) /* Vector 91: Reserved */ -UNUSED(TIVA_RESERVED_92) /* Vector 92: Reserved */ -UNUSED(TIVA_RESERVED_93) /* Vector 93: Reserved */ -UNUSED(TIVA_RESERVED_94) /* Vector 94: Reserved */ -UNUSED(TIVA_RESERVED_95) /* Vector 95: Reserved */ -UNUSED(TIVA_RESERVED_96) /* Vector 96: Reserved */ -UNUSED(TIVA_RESERVED_97) /* Vector 97: Reserved */ -UNUSED(TIVA_RESERVED_98) /* Vector 98: Reserved */ -UNUSED(TIVA_RESERVED_99) /* Vector 99: Reserved */ - -UNUSED(TIVA_RESERVED_100) /* Vector 100: Reserved */ -UNUSED(TIVA_RESERVED_101) /* Vector 101: Reserved */ -UNUSED(TIVA_RESERVED_102) /* Vector 102: Reserved */ -UNUSED(TIVA_RESERVED_103) /* Vector 103: Reserved */ -UNUSED(TIVA_RESERVED_104) /* Vector 104: Reserved */ -UNUSED(TIVA_RESERVED_105) /* Vector 105: Reserved */ -UNUSED(TIVA_RESERVED_106) /* Vector 106: Reserved */ -UNUSED(TIVA_RESERVED_107) /* Vector 107: Reserved */ -VECTOR(tiva_timer5a, TIVA_IRQ_TIMER5A) /* Vector 108: 16/32-Bit Timer 5 A */ -VECTOR(tiva_timer5b, TIVA_IRQ_TIMER5B) /* Vector 109: 16/32-Bit Timer 5 B */ - -VECTOR(tiva_wtimer0a, TIVA_IRQ_WTIMER0A) /* Vector 110: 32/64-Bit Timer 0 A */ -VECTOR(tiva_wtimer0b, TIVA_IRQ_WTIMER0B) /* Vector 111: 32/64-Bit Timer 0 B */ -VECTOR(tiva_wtimer1a, TIVA_IRQ_WTIMER1A) /* Vector 112: 32/64-Bit Timer 1 A */ -VECTOR(tiva_wtimer1b, TIVA_IRQ_WTIMER1B) /* Vector 113: 32/64-Bit Timer 1 B */ -VECTOR(tiva_wtimer2a, TIVA_IRQ_WTIMER2A) /* Vector 114: 32/64-Bit Timer 2 A */ -VECTOR(tiva_wtimer2b, TIVA_IRQ_WTIMER2B) /* Vector 115: 32/64-Bit Timer 2 B */ -VECTOR(tiva_wtimer3a, TIVA_IRQ_WTIMER3A) /* Vector 116: 32/64-Bit Timer 3 A */ -VECTOR(tiva_wtimer3b, TIVA_IRQ_WTIMER3B) /* Vector 117: 32/64-Bit Timer 3 B */ -VECTOR(tiva_wtimer4a, TIVA_IRQ_WTIMER4A) /* Vector 118: 32/64-Bit Timer 4 A */ -VECTOR(tiva_WTIMER4B, TIVA_IRQ_WTIMER4B) /* Vector 119: 32/64-Bit Timer 4 B */ - -VECTOR(tiva_wtimer5a, TIVA_IRQ_WTIMER5A) /* Vector 120: 32/64-Bit Timer 5 A */ -VECTOR(tiva_wtimer5b, TIVA_IRQ_WTIMER5B) /* Vector 121: 32/64-Bit Timer 5 B */ -VECTOR(tiva_system, TIVA_IRQ_SYSTEM) /* Vector 122: System Exception (imprecise) */ -UNUSED(TIVA_RESERVED_123) /* Vector 123: Reserved */ -UNUSED(TIVA_RESERVED_124) /* Vector 124: Reserved */ -UNUSED(TIVA_RESERVED_125) /* Vector 125: Reserved */ -UNUSED(TIVA_RESERVED_126) /* Vector 126: Reserved */ -UNUSED(TIVA_RESERVED_127) /* Vector 127: Reserved */ -UNUSED(TIVA_RESERVED_128) /* Vector 128: Reserved */ -UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */ - -UNUSED(TIVA_RESERVED_130) /* Vector 130: Reserved */ -UNUSED(TIVA_RESERVED_131) /* Vector 131: Reserved */ -UNUSED(TIVA_RESERVED_132) /* Vector 132: Reserved */ -UNUSED(TIVA_RESERVED_133) /* Vector 133: Reserved */ -UNUSED(TIVA_RESERVED_134) /* Vector 134: Reserved */ -UNUSED(TIVA_RESERVED_135) /* Vector 135: Reserved */ -UNUSED(TIVA_RESERVED_136) /* Vector 136: Reserved */ -UNUSED(TIVA_RESERVED_137) /* Vector 137: Reserved */ -UNUSED(TIVA_RESERVED_138) /* Vector 138: Reserved */ -UNUSED(TIVA_RESERVED_139) /* Vector 139: Reserved */ - -UNUSED(TIVA_RESERVED_140) /* Vector 140: Reserved */ -UNUSED(TIVA_RESERVED_141) /* Vector 141: Reserved */ -UNUSED(TIVA_RESERVED_142) /* Vector 142: Reserved */ -UNUSED(TIVA_RESERVED_143) /* Vector 143: Reserved */ -UNUSED(TIVA_RESERVED_144) /* Vector 144: Reserved */ -UNUSED(TIVA_RESERVED_145) /* Vector 145: Reserved */ -UNUSED(TIVA_RESERVED_146) /* Vector 146: Reserved */ -UNUSED(TIVA_RESERVED_147) /* Vector 147: Reserved */ -UNUSED(TIVA_RESERVED_148) /* Vector 148: Reserved */ -UNUSED(TIVA_RESERVED_149) /* Vector 149: Reserved */ - -UNUSED(TIVA_RESERVED_150) /* Vector 150: Reserved */ -UNUSED(TIVA_RESERVED_151) /* Vector 151: Reserved */ -UNUSED(TIVA_RESERVED_152) /* Vector 152: Reserved */ -UNUSED(TIVA_RESERVED_153) /* Vector 153: Reserved */ -UNUSED(TIVA_RESERVED_154) /* Vector 154: Reserved */ - -# endif /* CONFIG_ARMV7M_CMNVECTOR */ - -#else -# error "Vectors not known for this Stellaris chip" -#endif diff --git a/arch/arm/src/tiva/chip/tiva_vectors.h b/arch/arm/src/tiva/chip/tiva_vectors.h deleted file mode 100644 index bb7f6858ed..0000000000 --- a/arch/arm/src/tiva/chip/tiva_vectors.h +++ /dev/null @@ -1,66 +0,0 @@ -/************************************************************************************ - * arch/arm/src/tiva/chip/tiva_vectors.h - * - * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -/* Include the vector file for the specific Tiva/Stellaris chip */ - -#if defined(CONFIG_ARCH_CHIP_LM3S) -# include "chip/lm3s_vectors.h" -#elif defined(CONFIG_ARCH_CHIP_LM4F) -# include "chip/lm4f_vectors.h" -#elif defined(CONFIG_ARCH_CHIP_TM4C) -# include "chip/tm4c_vectors.h" -#else -# error "Unsupported Tiva/Stellaris vector file" -#endif - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Function Prototypes - ************************************************************************************/ diff --git a/arch/arm/src/tiva/chip/tm4c_vectors.h b/arch/arm/src/tiva/chip/tm4c_vectors.h deleted file mode 100644 index 1eccdd2e3f..0000000000 --- a/arch/arm/src/tiva/chip/tm4c_vectors.h +++ /dev/null @@ -1,676 +0,0 @@ -/************************************************************************************ - * arch/arm/src/tiva/chip/tm4c_vectors.h - * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Vectors - ************************************************************************************/ - -/* This file is included by tiva_vectors.S. It provides the macro VECTOR that - * supplies each Tiva vector in terms of a (lower-case) ISR label and an - * (upper-case) IRQ number as defined in arch/arm/include/tiva/tm4c_irq.h. - * tiva_vectors.S will define the VECTOR in different ways in order to generate - * the interrupt vectors and handlers in their final form. - */ - -#if defined(CONFIG_ARCH_CHIP_TM4C123GH6ZRB) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -# ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 155 interrupt table entries for I/O interrupts. */ - -ARMV7M_PERIPHERAL_INTERRUPTS 155 - -# else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwm0_fault, TIVA_IRQ_PWM0_FAULT) /* Vector 25: PWM0 Fault */ -VECTOR(tiva_pwm0_gen0, TIVA_IRQ_PWM0_GEN0) /* Vector 26: PWM0 Generator 0 */ -VECTOR(tiva_pwm0_gen1, TIVA_IRQ_PWM0_GEN1) /* Vector 27: PWM0 Generator 1 */ -VECTOR(tiva_pwm0_gen2, TIVA_IRQ_PWM0_GEN2) /* Vector 28: PWM0 Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timers 0 and 1 */ -VECTOR(tiva_timer0a, TIVA_IRQ_TIMER0A) /* Vector 35: 16/32-Bit Timer 0 A */ -VECTOR(tiva_timer0b, TIVA_IRQ_TIMER0B) /* Vector 36: 16/32-Bit Timer 0 B */ -VECTOR(tiva_timer1a, TIVA_IRQ_TIMER1A) /* Vector 37: 16/32-Bit Timer 1 A */ -VECTOR(tiva_timer1b, TIVA_IRQ_TIMER1B) /* Vector 38: 16/32-Bit Timer 1 B */ -VECTOR(tiva_timer2a, TIVA_IRQ_TIMER2A) /* Vector 39: 16/32-Bit Timer 2 A */ - -VECTOR(tiva_timer2b, TIVA_IRQ_TIMER2B) /* Vector 40: 16/32-Bit Timer 2 B */ -VECTOR(tiva_compare0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_compare1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -VECTOR(tiva_compare2, TIVA_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH and EEPROM Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -VECTOR(tiva_gpioh, TIVA_IRQ_GPIOH) /* Vector 48: GPIO Port H */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 49: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_timer3a, TIVA_IRQ_TIMER3A) /* Vector 51: 16/32-Bit Timer 3 A */ -VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_qei1, TIVA_IRQ_QEI1) /* Vector 54: QEI1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 55: CAN 0 */ -VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 56: CAN 1 */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -UNUSED(TIVA_RESERVED_58) /* Vector 58: Reserved */ -VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 60: USB */ -VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 61: PWM0 Generator 3 */ -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 62: uDMA Software */ -VECTOR(tiva_udmaerro, TIVA_IRQ_UDMAERROR) /* Vector 63: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 64: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 65: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 66: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 67: ADC1 Sequence 3 */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -VECTOR(tiva_gpioj, TIVA_IRQ_GPIOJ) /* Vector 70: GPIO Port J */ -VECTOR(tiva_gpiok, TIVA_IRQ_GPIOK) /* Vector 71: GPIO Port K */ -VECTOR(tiva_gpiol, TIVA_IRQ_GPIOL) /* Vector 72: GPIO Port L */ -VECTOR(tiva_ssi2, TIVA_IRQ_SSI2) /* Vector 73: SSI 2 */ -VECTOR(tiva_ssi3, TIVA_IRQ_SSI3) /* Vector 74: SSI 3 */ -VECTOR(tiva_uart3, TIVA_IRQ_UART3) /* Vector 75: UART 3 */ -VECTOR(tiva_uart4, TIVA_IRQ_UART4) /* Vector 76: UART 4 */ -VECTOR(tiva_uart5, TIVA_IRQ_UART5) /* Vector 77: UART 5 */ -VECTOR(tiva_uart6, TIVA_IRQ_UART6) /* Vector 78: UART 6 */ -VECTOR(tiva_uart7, TIVA_IRQ_UART7) /* Vector 79: UART 7 */ - -UNUSED(TIVA_RESERVED_80) /* Vector 80: Reserved */ -UNUSED(TIVA_RESERVED_81) /* Vector 81: Reserved */ -UNUSED(TIVA_RESERVED_82) /* Vector 82: Reserved */ -UNUSED(TIVA_RESERVED_83) /* Vector 83: Reserved */ -VECTOR(tiva_i2c2, TIVA_IRQ_I2C2) /* Vector 84: I2C 2 */ -VECTOR(tiva_i2c3, TIVA_IRQ_I2C3) /* Vector 85: I2C 3 */ -VECTOR(tiva_timer4a, TIVA_IRQ_TIMER4A) /* Vector 86: 16/32-Bit Timer 4 A */ -VECTOR(tiva_timer4b, TIVA_IRQ_TIMER4B) /* Vector 87: 16/32-Bit Timer 4 B */ -UNUSED(TIVA_RESERVED_88) /* Vector 88: Reserved */ -UNUSED(TIVA_RESERVED_89) /* Vector 89: Reserved */ - -UNUSED(TIVA_RESERVED_90) /* Vector 90: Reserved */ -UNUSED(TIVA_RESERVED_91) /* Vector 91: Reserved */ -UNUSED(TIVA_RESERVED_92) /* Vector 92: Reserved */ -UNUSED(TIVA_RESERVED_93) /* Vector 93: Reserved */ -UNUSED(TIVA_RESERVED_94) /* Vector 94: Reserved */ -UNUSED(TIVA_RESERVED_95) /* Vector 95: Reserved */ -UNUSED(TIVA_RESERVED_96) /* Vector 96: Reserved */ -UNUSED(TIVA_RESERVED_97) /* Vector 97: Reserved */ -UNUSED(TIVA_RESERVED_98) /* Vector 98: Reserved */ -UNUSED(TIVA_RESERVED_99) /* Vector 99: Reserved */ - -UNUSED(TIVA_RESERVED_100) /* Vector 100: Reserved */ -UNUSED(TIVA_RESERVED_101) /* Vector 101: Reserved */ -UNUSED(TIVA_RESERVED_102) /* Vector 102: Reserved */ -UNUSED(TIVA_RESERVED_103) /* Vector 103: Reserved */ -UNUSED(TIVA_RESERVED_104) /* Vector 104: Reserved */ -UNUSED(TIVA_RESERVED_105) /* Vector 105: Reserved */ -UNUSED(TIVA_RESERVED_106) /* Vector 106: Reserved */ -UNUSED(TIVA_RESERVED_107) /* Vector 107: Reserved */ -VECTOR(tiva_timer5a, TIVA_IRQ_TIMER5A) /* Vector 108: 16/32-Bit Timer 5 A */ -VECTOR(tiva_timer5b, TIVA_IRQ_TIMER5B) /* Vector 109: 16/32-Bit Timer 5 B */ - -VECTOR(tiva_wtimer0a, TIVA_IRQ_WTIMER0A) /* Vector 110: 32/64-Bit Timer 0 A */ -VECTOR(tiva_wtimer0b, TIVA_IRQ_WTIMER0B) /* Vector 111: 32/64-Bit Timer 0 B */ -VECTOR(tiva_wtimer1a, TIVA_IRQ_WTIMER1A) /* Vector 112: 32/64-Bit Timer 1 A */ -VECTOR(tiva_wtimer1b, TIVA_IRQ_WTIMER1B) /* Vector 113: 32/64-Bit Timer 1 B */ -VECTOR(tiva_wtimer2a, TIVA_IRQ_WTIMER2A) /* Vector 114: 32/64-Bit Timer 2 A */ -VECTOR(tiva_wtimer2b, TIVA_IRQ_WTIMER2B) /* Vector 115: 32/64-Bit Timer 2 B */ -VECTOR(tiva_wtimer3a, TIVA_IRQ_WTIMER3A) /* Vector 116: 32/64-Bit Timer 3 A */ -VECTOR(tiva_wtimer3b, TIVA_IRQ_WTIMER3B) /* Vector 117: 32/64-Bit Timer 3 B */ -VECTOR(tiva_wtimer4a, TIVA_IRQ_WTIMER4A) /* Vector 118: 32/64-Bit Timer 4 A */ -VECTOR(tiva_WTIMER4B, TIVA_IRQ_WTIMER4B) /* Vector 119: 32/64-Bit Timer 4 B */ - -VECTOR(tiva_wtimer5a, TIVA_IRQ_WTIMER5A) /* Vector 120: 32/64-Bit Timer 5 A */ -VECTOR(tiva_wtimer5b, TIVA_IRQ_WTIMER5B) /* Vector 121: 32/64-Bit Timer 5 B */ -VECTOR(tiva_system, TIVA_IRQ_SYSTEM) /* Vector 122: System Exception (imprecise) */ -UNUSED(TIVA_RESERVED_123) /* Vector 123: Reserved */ -UNUSED(TIVA_RESERVED_124) /* Vector 124: Reserved */ -VECTOR(tiva_i2c4, TIVA_IRQ_I2C4) /* Vector 125: I2C4 */ -VECTOR(tiva_i2c5, TIVA_IRQ_I2C5) /* Vector 126: I2C5 */ -VECTOR(tiva_gpiom, TIVA_IRQ_GPIOM) /* Vector 127: GPIO Port M */ -VECTOR(tiva_gpion, TIVA_IRQ_GPION) /* Vector 128: GPIO Port N */ -UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */ - -UNUSED(TIVA_RESERVED_130) /* Vector 130: Reserved */ -UNUSED(TIVA_RESERVED_131) /* Vector 131: Reserved */ -VECTOR(tiva_gpiop, TIVA_IRQ_GPIOP) /* Vector 132: GPIO Port P (Summary or P0) */ -VECTOR(tiva_gpiop1, TIVA_IRQ_GPIOP1) /* Vector 133: GPIO Port P1 */ -VECTOR(tiva_gpiop2, TIVA_IRQ_GPIOP2) /* Vector 134: GPIO Port P2 */ -VECTOR(tiva_gpiop3, TIVA_IRQ_GPIOP3) /* Vector 135: GPIO Port P3 */ -VECTOR(tiva_gpiop4, TIVA_IRQ_GPIOP4) /* Vector 136: GPIO Port P4 */ -VECTOR(tiva_gpiop5, TIVA_IRQ_GPIOP5) /* Vector 137: GPIO Port P5 */ -VECTOR(tiva_gpiop6, TIVA_IRQ_GPIOP6) /* Vector 138: GPIO Port P6 */ -VECTOR(tiva_gpiop7, TIVA_IRQ_GPIOP7) /* Vector 139: GPIO Port P7 */ - -VECTOR(tiva_gpioq, TIVA_IRQ_GPIOQ) /* Vector 140: GPIO Port Q (Summary or Q0) */ -VECTOR(tiva_gpioq1, TIVA_IRQ_GPIOQ1) /* Vector 141: GPIO Port Q1 */ -VECTOR(tiva_gpioq2, TIVA_IRQ_GPIOQ2) /* Vector 142: GPIO Port Q2 */ -VECTOR(tiva_gpioq3, TIVA_IRQ_GPIOQ3) /* Vector 143: GPIO Port Q3 */ -VECTOR(tiva_gpioq4, TIVA_IRQ_GPIOQ4) /* Vector 144: GPIO Port Q4 */ -VECTOR(tiva_gpioq5, TIVA_IRQ_GPIOQ5) /* Vector 145: GPIO Port Q5 */ -VECTOR(tiva_gpioq6, TIVA_IRQ_GPIOQ6) /* Vector 146: GPIO Port Q6 */ -VECTOR(tiva_gpioq7, TIVA_IRQ_GPIOQ7) /* Vector 147: GPIO Port Q7 */ -UNUSED(TIVA_RESERVED_148) /* Vector 148: Reserved */ -UNUSED(TIVA_RESERVED_149) /* Vector 149: Reserved */ - -VECTOR(tiva_pwm1_gen0, TIVA_IRQ_PWM1_GEN0) /* Vector 150: PWM1 Generator 0 */ -VECTOR(tiva_pwm1_gen1, TIVA_IRQ_PWM1_GEN1) /* Vector 151: PWM1 Generator 1 */ -VECTOR(tiva_pwm1_gen2, TIVA_IRQ_PWM1_GEN2) /* Vector 152: PWM1 Generator 2 */ -VECTOR(tiva_pwm1_gen3, TIVA_IRQ_PWM1_GEN3) /* Vector 153: PWM1 Generator 3 */ -VECTOR(tiva_pwm1_fault, TIVA_IRQ_PWM1_FAULT) /* Vector 154: PWM1 Fault */ - -# endif /* CONFIG_ARMV7M_CMNVECTOR */ - -#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -# ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 155 interrupt table entries for I/O interrupts. */ - -ARMV7M_PERIPHERAL_INTERRUPTS 155 - -# else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwm0_fault, TIVA_IRQ_PWM0_FAULT) /* Vector 25: PWM0 Fault */ -VECTOR(tiva_pwm0_gen0, TIVA_IRQ_PWM0_GEN0) /* Vector 26: PWM0 Generator 0 */ -VECTOR(tiva_pwm0_gen1, TIVA_IRQ_PWM0_GEN1) /* Vector 27: PWM0 Generator 1 */ -VECTOR(tiva_pwm0_gen2, TIVA_IRQ_PWM0_GEN2) /* Vector 28: PWM0 Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timers 0 and 1 */ -VECTOR(tiva_timer0a, TIVA_IRQ_TIMER0A) /* Vector 35: 16/32-Bit Timer 0 A */ -VECTOR(tiva_timer0b, TIVA_IRQ_TIMER0B) /* Vector 36: 16/32-Bit Timer 0 B */ -VECTOR(tiva_timer1a, TIVA_IRQ_TIMER1A) /* Vector 37: 16/32-Bit Timer 1 A */ -VECTOR(tiva_timer1b, TIVA_IRQ_TIMER1B) /* Vector 38: 16/32-Bit Timer 1 B */ -VECTOR(tiva_timer2a, TIVA_IRQ_TIMER2A) /* Vector 39: 16/32-Bit Timer 2 A */ - -VECTOR(tiva_timer2b, TIVA_IRQ_TIMER2B) /* Vector 40: 16/32-Bit Timer 2 B */ -VECTOR(tiva_compare0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_compare1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -VECTOR(tiva_compare2, TIVA_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH and EEPROM Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -UNUSED(TIVA_RESERVED_47) /* Vector 47: GPIO Port G */ -UNUSED(TIVA_RESERVED_48) /* Vector 48: GPIO Port H */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 49: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_timer3a, TIVA_IRQ_TIMER3A) /* Vector 51: 16/32-Bit Timer 3 A */ -VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_qei1, TIVA_IRQ_QEI1) /* Vector 54: QEI1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 55: CAN 0 */ -VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 56: CAN 1 */ -UNUSED(TIVA_RESERVED_57) /* Vector 57: Reserved */ -UNUSED(TIVA_RESERVED_58) /* Vector 58: Reserved */ -VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 59: Hibernation Module */ - -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 60: USB */ -VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 61: PWM0 Generator 3 */ -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 62: uDMA Software */ -VECTOR(tiva_udmaerro, TIVA_IRQ_UDMAERROR) /* Vector 63: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 64: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 65: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 66: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 67: ADC1 Sequence 3 */ -UNUSED(TIVA_RESERVED_68) /* Vector 68: Reserved */ -UNUSED(TIVA_RESERVED_69) /* Vector 69: Reserved */ - -UNUSED(TIVA_RESERVED_70) /* Vector 70: GPIO Port J */ -UNUSED(TIVA_RESERVED_71) /* Vector 71: GPIO Port K */ -UNUSED(TIVA_RESERVED_72) /* Vector 72: GPIO Port L */ -VECTOR(tiva_ssi2, TIVA_IRQ_SSI2) /* Vector 73: SSI 2 */ -VECTOR(tiva_ssi3, TIVA_IRQ_SSI3) /* Vector 74: SSI 3 */ -VECTOR(tiva_uart3, TIVA_IRQ_UART3) /* Vector 75: UART 3 */ -VECTOR(tiva_uart4, TIVA_IRQ_UART4) /* Vector 76: UART 4 */ -VECTOR(tiva_uart5, TIVA_IRQ_UART5) /* Vector 77: UART 5 */ -VECTOR(tiva_uart6, TIVA_IRQ_UART6) /* Vector 78: UART 6 */ -VECTOR(tiva_uart7, TIVA_IRQ_UART7) /* Vector 79: UART 7 */ - -UNUSED(TIVA_RESERVED_80) /* Vector 80: Reserved */ -UNUSED(TIVA_RESERVED_81) /* Vector 81: Reserved */ -UNUSED(TIVA_RESERVED_82) /* Vector 82: Reserved */ -UNUSED(TIVA_RESERVED_83) /* Vector 83: Reserved */ -VECTOR(tiva_i2c2, TIVA_IRQ_I2C2) /* Vector 84: I2C 2 */ -VECTOR(tiva_i2c3, TIVA_IRQ_I2C3) /* Vector 85: I2C 3 */ -VECTOR(tiva_timer4a, TIVA_IRQ_TIMER4A) /* Vector 86: 16/32-Bit Timer 4 A */ -VECTOR(tiva_timer4b, TIVA_IRQ_TIMER4B) /* Vector 87: 16/32-Bit Timer 4 B */ -UNUSED(TIVA_RESERVED_88) /* Vector 88: Reserved */ -UNUSED(TIVA_RESERVED_89) /* Vector 89: Reserved */ - -UNUSED(TIVA_RESERVED_90) /* Vector 90: Reserved */ -UNUSED(TIVA_RESERVED_91) /* Vector 91: Reserved */ -UNUSED(TIVA_RESERVED_92) /* Vector 92: Reserved */ -UNUSED(TIVA_RESERVED_93) /* Vector 93: Reserved */ -UNUSED(TIVA_RESERVED_94) /* Vector 94: Reserved */ -UNUSED(TIVA_RESERVED_95) /* Vector 95: Reserved */ -UNUSED(TIVA_RESERVED_96) /* Vector 96: Reserved */ -UNUSED(TIVA_RESERVED_97) /* Vector 97: Reserved */ -UNUSED(TIVA_RESERVED_98) /* Vector 98: Reserved */ -UNUSED(TIVA_RESERVED_99) /* Vector 99: Reserved */ - -UNUSED(TIVA_RESERVED_100) /* Vector 100: Reserved */ -UNUSED(TIVA_RESERVED_101) /* Vector 101: Reserved */ -UNUSED(TIVA_RESERVED_102) /* Vector 102: Reserved */ -UNUSED(TIVA_RESERVED_103) /* Vector 103: Reserved */ -UNUSED(TIVA_RESERVED_104) /* Vector 104: Reserved */ -UNUSED(TIVA_RESERVED_105) /* Vector 105: Reserved */ -UNUSED(TIVA_RESERVED_106) /* Vector 106: Reserved */ -UNUSED(TIVA_RESERVED_107) /* Vector 107: Reserved */ -VECTOR(tiva_timer5a, TIVA_IRQ_TIMER5A) /* Vector 108: 16/32-Bit Timer 5 A */ -VECTOR(tiva_timer5b, TIVA_IRQ_TIMER5B) /* Vector 109: 16/32-Bit Timer 5 B */ - -VECTOR(tiva_wtimer0a, TIVA_IRQ_WTIMER0A) /* Vector 110: 32/64-Bit Timer 0 A */ -VECTOR(tiva_wtimer0b, TIVA_IRQ_WTIMER0B) /* Vector 111: 32/64-Bit Timer 0 B */ -VECTOR(tiva_wtimer1a, TIVA_IRQ_WTIMER1A) /* Vector 112: 32/64-Bit Timer 1 A */ -VECTOR(tiva_wtimer1b, TIVA_IRQ_WTIMER1B) /* Vector 113: 32/64-Bit Timer 1 B */ -VECTOR(tiva_wtimer2a, TIVA_IRQ_WTIMER2A) /* Vector 114: 32/64-Bit Timer 2 A */ -VECTOR(tiva_wtimer2b, TIVA_IRQ_WTIMER2B) /* Vector 115: 32/64-Bit Timer 2 B */ -VECTOR(tiva_wtimer3a, TIVA_IRQ_WTIMER3A) /* Vector 116: 32/64-Bit Timer 3 A */ -VECTOR(tiva_wtimer3b, TIVA_IRQ_WTIMER3B) /* Vector 117: 32/64-Bit Timer 3 B */ -VECTOR(tiva_wtimer4a, TIVA_IRQ_WTIMER4A) /* Vector 118: 32/64-Bit Timer 4 A */ -VECTOR(tiva_WTIMER4B, TIVA_IRQ_WTIMER4B) /* Vector 119: 32/64-Bit Timer 4 B */ - -VECTOR(tiva_wtimer5a, TIVA_IRQ_WTIMER5A) /* Vector 120: 32/64-Bit Timer 5 A */ -VECTOR(tiva_wtimer5b, TIVA_IRQ_WTIMER5B) /* Vector 121: 32/64-Bit Timer 5 B */ -VECTOR(tiva_system, TIVA_IRQ_SYSTEM) /* Vector 122: System Exception (imprecise) */ -UNUSED(TIVA_RESERVED_123) /* Vector 123: Reserved */ -UNUSED(TIVA_RESERVED_124) /* Vector 124: Reserved */ -UNUSED(TIVA_RESERVED_125) /* Vector 125: Reserved */ -UNUSED(TIVA_RESERVED_126) /* Vector 126: Reserved */ -UNUSED(TIVA_RESERVED_127) /* Vector 127: Reserved */ -UNUSED(TIVA_RESERVED_128) /* Vector 128: Reserved */ -UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */ - -UNUSED(TIVA_RESERVED_130) /* Vector 130: Reserved */ -UNUSED(TIVA_RESERVED_131) /* Vector 131: Reserved */ -UNUSED(TIVA_RESERVED_132) /* Vector 132: Reserved */ -UNUSED(TIVA_RESERVED_133) /* Vector 133: Reserved */ -UNUSED(TIVA_RESERVED_134) /* Vector 134: Reserved */ -UNUSED(TIVA_RESERVED_135) /* Vector 135: Reserved */ -UNUSED(TIVA_RESERVED_136) /* Vector 136: Reserved */ -UNUSED(TIVA_RESERVED_137) /* Vector 137: Reserved */ -UNUSED(TIVA_RESERVED_138) /* Vector 138: Reserved */ -UNUSED(TIVA_RESERVED_139) /* Vector 139: Reserved */ - -UNUSED(TIVA_RESERVED_140) /* Vector 140: Reserved */ -UNUSED(TIVA_RESERVED_141) /* Vector 141: Reserved */ -UNUSED(TIVA_RESERVED_142) /* Vector 142: Reserved */ -UNUSED(TIVA_RESERVED_143) /* Vector 143: Reserved */ -UNUSED(TIVA_RESERVED_144) /* Vector 144: Reserved */ -UNUSED(TIVA_RESERVED_145) /* Vector 145: Reserved */ -UNUSED(TIVA_RESERVED_146) /* Vector 146: Reserved */ -UNUSED(TIVA_RESERVED_147) /* Vector 147: Reserved */ -UNUSED(TIVA_RESERVED_148) /* Vector 148: Reserved */ -UNUSED(TIVA_RESERVED_149) /* Vector 149: Reserved */ - -VECTOR(tiva_pwm1_gen0, TIVA_IRQ_PWM1_GEN0) /* Vector 150: PWM1 Generator 0 */ -VECTOR(tiva_pwm1_gen1, TIVA_IRQ_PWM1_GEN1) /* Vector 151: PWM1 Generator 1 */ -VECTOR(tiva_pwm1_gen2, TIVA_IRQ_PWM1_GEN2) /* Vector 152: PWM1 Generator 2 */ -VECTOR(tiva_pwm1_gen3, TIVA_IRQ_PWM1_GEN3) /* Vector 153: PWM1 Generator 3 */ -VECTOR(tiva_pwm1_fault, TIVA_IRQ_PWM1_FAULT) /* Vector 154: PWM1 Fault */ - -# endif /* CONFIG_ARMV7M_CMNVECTOR */ - -#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -# ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 130 interrupt table entries for I/O interrupts. */ - -ARMV7M_PERIPHERAL_INTERRUPTS 130 - -# else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwm0_fault, TIVA_IRQ_PWM0_FAULT) /* Vector 25: PWM0 Fault */ -VECTOR(tiva_pwm0_gen0, TIVA_IRQ_PWM0_GEN0) /* Vector 26: PWM0 Generator 0 */ -VECTOR(tiva_pwm0_gen1, TIVA_IRQ_PWM0_GEN1) /* Vector 27: PWM0 Generator 1 */ -VECTOR(tiva_pwm0_gen2, TIVA_IRQ_PWM0_GEN2) /* Vector 28: PWM0 Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timers 0 and 1 */ -VECTOR(tiva_timer0a, TIVA_IRQ_TIMER0A) /* Vector 35: 16/32-Bit Timer 0 A */ -VECTOR(tiva_timer0b, TIVA_IRQ_TIMER0B) /* Vector 36: 16/32-Bit Timer 0 B */ -VECTOR(tiva_timer1a, TIVA_IRQ_TIMER1A) /* Vector 37: 16/32-Bit Timer 1 A */ -VECTOR(tiva_timer1b, TIVA_IRQ_TIMER1B) /* Vector 38: 16/32-Bit Timer 1 B */ -VECTOR(tiva_timer2a, TIVA_IRQ_TIMER2A) /* Vector 39: 16/32-Bit Timer 2 A */ - -VECTOR(tiva_timer2b, TIVA_IRQ_TIMER2B) /* Vector 40: 16/32-Bit Timer 2 B */ -VECTOR(tiva_compare0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_compare1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -VECTOR(tiva_compare2, TIVA_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH and EEPROM Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -VECTOR(tiva_gpioh, TIVA_IRQ_GPIOH) /* Vector 48: GPIO Port H */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 49: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_timer3a, TIVA_IRQ_TIMER3A) /* Vector 51: 16/32-Bit Timer 3 A */ -VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 54: CAN 0 */ -VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 55: CAN 1 */ -VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */ -VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 57: Hibernation Module */ -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 58: USB MAC */ -VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 59: PWM0 Generator 3 */ - -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 60: uDMA Software */ -VECTOR(tiva_udmaerro, TIVA_IRQ_UDMAERROR) /* Vector 61: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 62: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 63: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 64: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 65: ADC1 Sequence 3 */ -VECTOR(tiva_epi0, TIVA_IRQ_EPI0) /* Vector 66: ADC1 Sequence 3 */ -VECTOR(tiva_gpioj, TIVA_IRQ_GPIOJ) /* Vector 67: GPIO Port J */ -VECTOR(tiva_gpiok, TIVA_IRQ_GPIOK) /* Vector 68: GPIO Port K */ -VECTOR(tiva_gpiol, TIVA_IRQ_GPIOL) /* Vector 69: GPIO Port L */ - -VECTOR(tiva_ssi2, TIVA_IRQ_SSI2) /* Vector 70: SSI 2 */ -VECTOR(tiva_ssi3, TIVA_IRQ_SSI3) /* Vector 71: SSI 3 */ -VECTOR(tiva_uart3, TIVA_IRQ_UART3) /* Vector 72: UART 3 */ -VECTOR(tiva_uart4, TIVA_IRQ_UART4) /* Vector 73: UART 4 */ -VECTOR(tiva_uart5, TIVA_IRQ_UART5) /* Vector 74: UART 5 */ -VECTOR(tiva_uart6, TIVA_IRQ_UART6) /* Vector 75: UART 6 */ -VECTOR(tiva_uart7, TIVA_IRQ_UART7) /* Vector 76: UART 7 */ -VECTOR(tiva_i2c2, TIVA_IRQ_I2C2) /* Vector 77: I2C 2 */ -VECTOR(tiva_i2c3, TIVA_IRQ_I2C3) /* Vector 78: I2C 3 */ -VECTOR(tiva_timer4a, TIVA_IRQ_TIMER4A) /* Vector 79: 16/32-Bit Timer 4 A */ - -VECTOR(tiva_timer4b, TIVA_IRQ_TIMER4B) /* Vector 80: 16/32-Bit Timer 4 B */ -VECTOR(tiva_timer5a, TIVA_IRQ_TIMER5A) /* Vector 81: 16/32-Bit Timer 5 A */ -VECTOR(tiva_timer5b, TIVA_IRQ_TIMER5B) /* Vector 82: 16/32-Bit Timer 5 B */ -VECTOR(tiva_float, TIVA_IRQ_FLOAT) /* Vector 83: Floating point exception */ -UNUSED(TIVA_RESERVED_84) /* Vector 84: Reserved */ -UNUSED(TIVA_RESERVED_85) /* Vector 85: Reserved */ -VECTOR(tiva_i2c4, TIVA_IRQ_I2C4) /* Vector 86: I2C 2 */ -VECTOR(tiva_i2c5, TIVA_IRQ_I2C5) /* Vector 87: I2C 3 */ -VECTOR(tiva_gpiom, TIVA_IRQ_GPIOM) /* Vector 88: GPIO Port M */ -VECTOR(tiva_gpion, TIVA_IRQ_GPION) /* Vector 89: GPIO Port N */ - -UNUSED(TIVA_RESERVED_90) /* Vector 90: Reserved */ -VECTOR(tiva_tamper, TIVA_IRQ_TAMPER) /* Vector 91: Tamper */ -VECTOR(tiva_gpiop, TIVA_IRQ_GPIOP) /* Vector 92: GPIO Port P (Summary or P0) */ -VECTOR(tiva_gpiop1, TIVA_IRQ_GPIOP1) /* Vector 93: GPIO Port P1 */ -VECTOR(tiva_gpiop2, TIVA_IRQ_GPIOP2) /* Vector 94: GPIO Port P2 */ -VECTOR(tiva_gpiop3, TIVA_IRQ_GPIOP3) /* Vector 95: GPIO Port P3 */ -VECTOR(tiva_gpiop4, TIVA_IRQ_GPIOP4) /* Vector 96: GPIO Port P4 */ -VECTOR(tiva_gpiop5, TIVA_IRQ_GPIOP5) /* Vector 97: GPIO Port P5 */ -VECTOR(tiva_gpiop6, TIVA_IRQ_GPIOP6) /* Vector 98: GPIO Port P6 */ -VECTOR(tiva_gpiop7, TIVA_IRQ_GPIOP7) /* Vector 99: GPIO Port P7 */ - -VECTOR(tiva_gpioq, TIVA_IRQ_GPIOQ) /* Vector 100: GPIO Port Q (Summary or Q0) */ -VECTOR(tiva_gpioq1, TIVA_IRQ_GPIOQ1) /* Vector 101: GPIO Port Q1 */ -VECTOR(tiva_gpioq2, TIVA_IRQ_GPIOQ2) /* Vector 102: GPIO Port Q2 */ -VECTOR(tiva_gpioq3, TIVA_IRQ_GPIOQ3) /* Vector 103: GPIO Port Q3 */ -VECTOR(tiva_gpioq4, TIVA_IRQ_GPIOQ4) /* Vector 104: GPIO Port Q4 */ -VECTOR(tiva_gpioq5, TIVA_IRQ_GPIOQ5) /* Vector 105: GPIO Port Q5 */ -VECTOR(tiva_gpioq6, TIVA_IRQ_GPIOQ6) /* Vector 106: GPIO Port Q6 */ -VECTOR(tiva_gpioq7, TIVA_IRQ_GPIOQ7) /* Vector 107: GPIO Port Q7 */ -VECTOR(tiva_gpior, TIVA_IRQ_GPIOR) /* Vector 108: GPIO Port R */ -VECTOR(tiva_gpios, TIVA_IRQ_GPIOS) /* Vector 109: GPIO Port S */ - -VECTOR(tiva_shamd5, TIVA_IRQ_SHAMD5) /* Vector 110: SHA/MD5 */ -VECTOR(tiva_aes, TIVA_IRQ_AES) /* Vector 111: AES */ -VECTOR(tiva_des, TIVA_IRQ_DES) /* Vector 112: DES */ -VECTOR(tiva_lcd, TIVA_IRQ_LCD) /* Vector 113: LCD */ -VECTOR(tiva_timer6a, TIVA_IRQ_TIMER6A) /* Vector 114: 16/32-Bit Timer 6 A */ -VECTOR(tiva_timer6b, TIVA_IRQ_TIMER6B) /* Vector 115: 16/32-Bit Timer 6 B */ -VECTOR(tiva_timer7a, TIVA_IRQ_TIMER7A) /* Vector 116: 16/32-Bit Timer 7 A */ -VECTOR(tiva_timer7b, TIVA_IRQ_TIMER7B) /* Vector 117: 16/32-Bit Timer 7 B */ -VECTOR(tiva_i2c6, TIVA_IRQ_I2C6) /* Vector 118: I2C 6 */ -VECTOR(tiva_i2c7, TIVA_IRQ_I2C7) /* Vector 119: I2C 7 */ - -UNUSED(TIVA_RESERVED_120) /* Vector 120: Reserved */ -VECTOR(tiva_1wire, TIVA_IRQ_1WIRE) /* Vector 121: I2C 7 */ -UNUSED(TIVA_RESERVED_122) /* Vector 122: Reserved */ -UNUSED(TIVA_RESERVED_123) /* Vector 123: Reserved */ -UNUSED(TIVA_RESERVED_124) /* Vector 124: Reserved */ -VECTOR(tiva_i2c8, TIVA_IRQ_I2C8) /* Vector 125: I2C 8 */ -VECTOR(tiva_i2c9, TIVA_IRQ_I2C9) /* Vector 126: I2C 9 */ -VECTOR(tiva_gpiot, TIVA_IRQ_GPIOT) /* Vector 127: GPIO Port T */ -UNUSED(TIVA_RESERVED_128) /* Vector 128: Reserved */ -UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */ - -# endif /* CONFIG_ARMV7M_CMNVECTOR */ - -#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC) - -/* If the common ARMv7-M vector handling is used, then all it needs is the following - * definition that provides the number of supported vectors. - */ - -# ifdef CONFIG_ARMV7M_CMNVECTOR - -/* Reserve 130 interrupt table entries for I/O interrupts. */ - -ARMV7M_PERIPHERAL_INTERRUPTS 130 - -# else - -VECTOR(tiva_gpioa, TIVA_IRQ_GPIOA) /* Vector 16: GPIO Port A */ -VECTOR(tiva_gpiob, TIVA_IRQ_GPIOB) /* Vector 17: GPIO Port B */ -VECTOR(tiva_gpioc, TIVA_IRQ_GPIOC) /* Vector 18: GPIO Port C */ -VECTOR(tiva_gpiod, TIVA_IRQ_GPIOD) /* Vector 19: GPIO Port D */ - -VECTOR(tiva_gpioe, TIVA_IRQ_GPIOE) /* Vector 20: GPIO Port E */ -VECTOR(tiva_uart0, TIVA_IRQ_UART0) /* Vector 21: UART 0 */ -VECTOR(tiva_uart1, TIVA_IRQ_UART1) /* Vector 22: UART 1 */ -VECTOR(tiva_ssi0, TIVA_IRQ_SSI0) /* Vector 23: SSI 0 */ -VECTOR(tiva_i2c0, TIVA_IRQ_I2C0) /* Vector 24: I2C 0 */ -VECTOR(tiva_pwm0_fault, TIVA_IRQ_PWM0_FAULT) /* Vector 25: PWM0 Fault */ -VECTOR(tiva_pwm0_gen0, TIVA_IRQ_PWM0_GEN0) /* Vector 26: PWM0 Generator 0 */ -VECTOR(tiva_pwm0_gen1, TIVA_IRQ_PWM0_GEN1) /* Vector 27: PWM0 Generator 1 */ -VECTOR(tiva_pwm0_gen2, TIVA_IRQ_PWM0_GEN2) /* Vector 28: PWM0 Generator 2 */ -VECTOR(tiva_qei0, TIVA_IRQ_QEI0) /* Vector 29: QEI0 */ - -VECTOR(tiva_adc0, TIVA_IRQ_ADC0) /* Vector 30: ADC Sequence 0 */ -VECTOR(tiva_adc1, TIVA_IRQ_ADC1) /* Vector 31: ADC Sequence 1 */ -VECTOR(tiva_adc2, TIVA_IRQ_ADC2) /* Vector 32: ADC Sequence 2 */ -VECTOR(tiva_adc3, TIVA_IRQ_ADC3) /* Vector 33: ADC Sequence 3 */ -VECTOR(tiva_wdog, TIVA_IRQ_WDOG) /* Vector 34: Watchdog Timers 0 and 1 */ -VECTOR(tiva_timer0a, TIVA_IRQ_TIMER0A) /* Vector 35: 16/32-Bit Timer 0 A */ -VECTOR(tiva_timer0b, TIVA_IRQ_TIMER0B) /* Vector 36: 16/32-Bit Timer 0 B */ -VECTOR(tiva_timer1a, TIVA_IRQ_TIMER1A) /* Vector 37: 16/32-Bit Timer 1 A */ -VECTOR(tiva_timer1b, TIVA_IRQ_TIMER1B) /* Vector 38: 16/32-Bit Timer 1 B */ -VECTOR(tiva_timer2a, TIVA_IRQ_TIMER2A) /* Vector 39: 16/32-Bit Timer 2 A */ - -VECTOR(tiva_timer2b, TIVA_IRQ_TIMER2B) /* Vector 40: 16/32-Bit Timer 2 B */ -VECTOR(tiva_compare0, TIVA_IRQ_COMPARE0) /* Vector 41: Analog Comparator 0 */ -VECTOR(tiva_compare1, TIVA_IRQ_COMPARE1) /* Vector 42: Analog Comparator 1 */ -VECTOR(tiva_compare2, TIVA_IRQ_COMPARE2) /* Vector 43: Analog Comparator 2 */ -VECTOR(tiva_syscon, TIVA_IRQ_SYSCON) /* Vector 44: System Control */ -VECTOR(tiva_flashcon, TIVA_IRQ_FLASHCON) /* Vector 45: FLASH and EEPROM Control */ -VECTOR(tiva_gpiof, TIVA_IRQ_GPIOF) /* Vector 46: GPIO Port F */ -VECTOR(tiva_gpiog, TIVA_IRQ_GPIOG) /* Vector 47: GPIO Port G */ -VECTOR(tiva_gpioh, TIVA_IRQ_GPIOH) /* Vector 48: GPIO Port H */ -VECTOR(tiva_uart2, TIVA_IRQ_UART2) /* Vector 49: UART 2 */ - -VECTOR(tiva_ssi1, TIVA_IRQ_SSI1) /* Vector 50: SSI 1 */ -VECTOR(tiva_timer3a, TIVA_IRQ_TIMER3A) /* Vector 51: 16/32-Bit Timer 3 A */ -VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B */ -VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */ -VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 54: CAN 0 */ -VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 55: CAN 1 */ -VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */ -VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 57: Hibernation Module */ -VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 58: USB MAC */ -VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 59: PWM0 Generator 3 */ - -VECTOR(tiva_udmasoft, TIVA_IRQ_UDMASOFT) /* Vector 60: uDMA Software */ -VECTOR(tiva_udmaerro, TIVA_IRQ_UDMAERROR) /* Vector 61: uDMA Error */ -VECTOR(tiva_adc1_0, TIVA_IRQ_ADC1_0) /* Vector 62: ADC1 Sequence 0 */ -VECTOR(tiva_adc1_1, TIVA_IRQ_ADC1_1) /* Vector 63: ADC1 Sequence 1 */ -VECTOR(tiva_adc1_2, TIVA_IRQ_ADC1_2) /* Vector 64: ADC1 Sequence 2 */ -VECTOR(tiva_adc1_3, TIVA_IRQ_ADC1_3) /* Vector 65: ADC1 Sequence 3 */ -VECTOR(tiva_epi0, TIVA_IRQ_EPI0) /* Vector 66: ADC1 Sequence 3 */ -VECTOR(tiva_gpioj, TIVA_IRQ_GPIOJ) /* Vector 67: GPIO Port J */ -VECTOR(tiva_gpiok, TIVA_IRQ_GPIOK) /* Vector 68: GPIO Port K */ -VECTOR(tiva_gpiol, TIVA_IRQ_GPIOL) /* Vector 69: GPIO Port L */ - -VECTOR(tiva_ssi2, TIVA_IRQ_SSI2) /* Vector 70: SSI 2 */ -VECTOR(tiva_ssi3, TIVA_IRQ_SSI3) /* Vector 71: SSI 3 */ -VECTOR(tiva_uart3, TIVA_IRQ_UART3) /* Vector 72: UART 3 */ -VECTOR(tiva_uart4, TIVA_IRQ_UART4) /* Vector 73: UART 4 */ -VECTOR(tiva_uart5, TIVA_IRQ_UART5) /* Vector 74: UART 5 */ -VECTOR(tiva_uart6, TIVA_IRQ_UART6) /* Vector 75: UART 6 */ -VECTOR(tiva_uart7, TIVA_IRQ_UART7) /* Vector 76: UART 7 */ -VECTOR(tiva_i2c2, TIVA_IRQ_I2C2) /* Vector 77: I2C 2 */ -VECTOR(tiva_i2c3, TIVA_IRQ_I2C3) /* Vector 78: I2C 3 */ -VECTOR(tiva_timer4a, TIVA_IRQ_TIMER4A) /* Vector 79: 16/32-Bit Timer 4 A */ - -VECTOR(tiva_timer4b, TIVA_IRQ_TIMER4B) /* Vector 80: 16/32-Bit Timer 4 B */ -VECTOR(tiva_timer5a, TIVA_IRQ_TIMER5A) /* Vector 81: 16/32-Bit Timer 5 A */ -VECTOR(tiva_timer5b, TIVA_IRQ_TIMER5B) /* Vector 82: 16/32-Bit Timer 5 B */ -VECTOR(tiva_float, TIVA_IRQ_FLOAT) /* Vector 83: Floating point exception */ -UNUSED(TIVA_RESERVED_84) /* Vector 84: Reserved */ -UNUSED(TIVA_RESERVED_85) /* Vector 85: Reserved */ -VECTOR(tiva_i2c4, TIVA_IRQ_I2C4) /* Vector 86: I2C 2 */ -VECTOR(tiva_i2c5, TIVA_IRQ_I2C5) /* Vector 87: I2C 3 */ -VECTOR(tiva_gpiom, TIVA_IRQ_GPIOM) /* Vector 88: GPIO Port M */ -VECTOR(tiva_gpion, TIVA_IRQ_GPION) /* Vector 89: GPIO Port N */ - -UNUSED(TIVA_RESERVED_90) /* Vector 90: Reserved */ -VECTOR(tiva_tamper, TIVA_IRQ_TAMPER) /* Vector 91: Tamper */ -VECTOR(tiva_gpiop, TIVA_IRQ_GPIOP) /* Vector 92: GPIO Port P (Summary or P0) */ -VECTOR(tiva_gpiop1, TIVA_IRQ_GPIOP1) /* Vector 93: GPIO Port P1 */ -VECTOR(tiva_gpiop2, TIVA_IRQ_GPIOP2) /* Vector 94: GPIO Port P2 */ -VECTOR(tiva_gpiop3, TIVA_IRQ_GPIOP3) /* Vector 95: GPIO Port P3 */ -VECTOR(tiva_gpiop4, TIVA_IRQ_GPIOP4) /* Vector 96: GPIO Port P4 */ -VECTOR(tiva_gpiop5, TIVA_IRQ_GPIOP5) /* Vector 97: GPIO Port P5 */ -VECTOR(tiva_gpiop6, TIVA_IRQ_GPIOP6) /* Vector 98: GPIO Port P6 */ -VECTOR(tiva_gpiop7, TIVA_IRQ_GPIOP7) /* Vector 99: GPIO Port P7 */ - -VECTOR(tiva_gpioq, TIVA_IRQ_GPIOQ) /* Vector 100: GPIO Port Q (Summary or Q0) */ -VECTOR(tiva_gpioq1, TIVA_IRQ_GPIOQ1) /* Vector 101: GPIO Port Q1 */ -VECTOR(tiva_gpioq2, TIVA_IRQ_GPIOQ2) /* Vector 102: GPIO Port Q2 */ -VECTOR(tiva_gpioq3, TIVA_IRQ_GPIOQ3) /* Vector 103: GPIO Port Q3 */ -VECTOR(tiva_gpioq4, TIVA_IRQ_GPIOQ4) /* Vector 104: GPIO Port Q4 */ -VECTOR(tiva_gpioq5, TIVA_IRQ_GPIOQ5) /* Vector 105: GPIO Port Q5 */ -VECTOR(tiva_gpioq6, TIVA_IRQ_GPIOQ6) /* Vector 106: GPIO Port Q6 */ -VECTOR(tiva_gpioq7, TIVA_IRQ_GPIOQ7) /* Vector 107: GPIO Port Q7 */ -UNUSED(TIVA_RESERVED_108) /* Vector 108: Reserved */ -UNUSED(TIVA_RESERVED_109) /* Vector 109: Reserved */ - -UNUSED(TIVA_RESERVED_110) /* Vector 110: Reserved */ -UNUSED(TIVA_RESERVED_111) /* Vector 111: Reserved */ -UNUSED(TIVA_RESERVED_112) /* Vector 112: Reserved */ -UNUSED(TIVA_RESERVED_113) /* Vector 113: Reserved */ -VECTOR(tiva_timer6a, TIVA_IRQ_TIMER6A) /* Vector 114: 16/32-Bit Timer 6 A */ -VECTOR(tiva_timer6b, TIVA_IRQ_TIMER6B) /* Vector 115: 16/32-Bit Timer 6 B */ -VECTOR(tiva_timer7a, TIVA_IRQ_TIMER7A) /* Vector 116: 16/32-Bit Timer 7 A */ -VECTOR(tiva_timer7b, TIVA_IRQ_TIMER7B) /* Vector 117: 16/32-Bit Timer 7 B */ -VECTOR(tiva_i2c6, TIVA_IRQ_I2C6) /* Vector 118: I2C 6 */ -VECTOR(tiva_i2c7, TIVA_IRQ_I2C7) /* Vector 119: I2C 7 */ - -UNUSED(TIVA_RESERVED_120) /* Vector 120: Reserved */ -UNUSED(TIVA_RESERVED_121) /* Vector 121: Reserved */ -UNUSED(TIVA_RESERVED_122) /* Vector 122: Reserved */ -UNUSED(TIVA_RESERVED_123) /* Vector 123: Reserved */ -UNUSED(TIVA_RESERVED_124) /* Vector 124: Reserved */ -VECTOR(tiva_i2c8, TIVA_IRQ_I2C8) /* Vector 125: I2C 8 */ -VECTOR(tiva_i2c9, TIVA_IRQ_I2C9) /* Vector 126: I2C 9 */ -UNUSED(TIVA_RESERVED_127) /* Vector 127: Reserved */ -UNUSED(TIVA_RESERVED_128) /* Vector 128: Reserved */ -UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */ - -# endif /* CONFIG_ARMV7M_CMNVECTOR */ -#else -# error "Vectors not known for this Tiva chip" -#endif diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c index c0e4930a69..323316c630 100644 --- a/arch/arm/src/tiva/tiva_irq.c +++ b/arch/arm/src/tiva/tiva_irq.c @@ -123,19 +123,19 @@ static void tiva_dumpnvic(const char *msg, int irq) getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE)); #endif -#if NR_VECTORS < 64 +#if TIVA_IRQ_NEXTINT < 64 irqinfo(" IRQ ENABLE: %08x %08x\n", getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE)); -#elif NR_VECTORS < 96 +#elif TIVA_IRQ_NEXTINT < 96 irqinfo(" IRQ ENABLE: %08x %08x %08x\n", getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE), getreg32(NVIC_IRQ64_95_ENABLE)); -#elif NR_VECTORS < 128 +#elif TIVA_IRQ_NEXTINT < 128 irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n", getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE), getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE)); #endif -#if NR_VECTORS > 127 +#if TIVA_IRQ_NEXTINT > 127 # warning Missing output #endif @@ -151,32 +151,32 @@ static void tiva_dumpnvic(const char *msg, int irq) irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY), getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY)); -#if NR_VECTORS > 47 +#if TIVA_IRQ_NEXTINT > 47 irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY), getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY)); #endif -#if NR_VECTORS > 63 +#if TIVA_IRQ_NEXTINT > 63 irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY), getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY)); #endif -#if NR_VECTORS > 79 +#if TIVA_IRQ_NEXTINT > 79 irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY), getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY)); #endif -#if NR_VECTORS > 95 +#if TIVA_IRQ_NEXTINT > 95 irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY), getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY)); #endif -#if NR_VECTORS > 111 +#if TIVA_IRQ_NEXTINT > 111 irqinfo(" %08x %08x %08x %08x\n", getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY), getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY)); #endif -#if NR_VECTORS > 127 +#if TIVA_IRQ_NEXTINT > 127 # warning Missing output #endif leave_critical_section(flags); @@ -302,19 +302,19 @@ static int tiva_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, *regaddr = (NVIC_IRQ32_63_ENABLE + offset); *bit = 1 << (irq - TIVA_IRQ_INTERRUPTS - 32); } -#if NR_VECTORS > 63 +#if TIVA_IRQ_NEXTINT > 63 else if (irq < TIVA_IRQ_INTERRUPTS + 96) { *regaddr = (NVIC_IRQ64_95_ENABLE + offset); *bit = 1 << (irq - TIVA_IRQ_INTERRUPTS - 64); } -#if NR_VECTORS > 95 +#if TIVA_IRQ_NEXTINT > 95 else if (irq < TIVA_IRQ_INTERRUPTS + 128) { *regaddr = (NVIC_IRQ96_127_ENABLE + offset); *bit = 1 << (irq - TIVA_IRQ_INTERRUPTS - 96); } -#if NR_VECTORS > 127 +#if TIVA_IRQ_NEXTINT > 127 # warning Missing logic #endif #endif diff --git a/arch/arm/src/tiva/tiva_start.c b/arch/arm/src/tiva/tiva_start.c index 8750fbf0f3..606ce69277 100644 --- a/arch/arm/src/tiva/tiva_start.c +++ b/arch/arm/src/tiva/tiva_start.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_start.c * - * Copyright (C) 2009, 2012, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2012, 2014, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -46,6 +46,10 @@ #include #include +#ifdef CONFIG_ARCH_FPU +# include "nvic.h" +#endif + #include "up_arch.h" #include "up_internal.h" @@ -55,6 +59,36 @@ #include "tiva_eeprom.h" #include "tiva_start.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* .data is positioned first in the primary RAM followed immediately by .bss. + * The IDLE thread stack lies just after .bss and has size give by + * CONFIG_IDLETHREAD_STACKSIZE; The heap then begins just after the IDLE. + * ARM EABI requires 64 bit stack alignment. + */ + +#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7) +#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE) +#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE) + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* g_idle_topstack: _sbss is the start of the BSS region as defined by the + * linker script. _ebss lies at the end of the BSS region. The idle task + * stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. + * The IDLE thread is the thread that the system boots on and, eventually, + * becomes the IDLE, do nothing task that runs only when there is nothing + * else to run. The heap continues from there until the end of memory. + * g_idle_topstack is a read-only variable the provides this computed + * address. + */ + +const uintptr_t g_idle_topstack = HEAP_BASE; + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -73,6 +107,96 @@ # define showprogress(c) #endif +/**************************************************************************** + * Name: tiva_fpuconfig + * + * Description: + * Configure the FPU. Relative bit settings: + * + * CPACR: Enables access to CP10 and CP11 + * CONTROL.FPCA: Determines whether the FP extension is active in the + * current context: + * FPCCR.ASPEN: Enables automatic FP state preservation, then the + * processor sets this bit to 1 on successful completion of any FP + * instruction. + * FPCCR.LSPEN: Enables lazy context save of FP state. When this is + * done, the processor reserves space on the stack for the FP state, + * but does not save that state information to the stack. + * + * Software must not change the value of the ASPEN bit or LSPEN bit while either: + * - the CPACR permits access to CP10 and CP11, that give access to the FP + * extension, or + * - the CONTROL.FPCA bit is set to 1 + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_FPU +#ifndef CONFIG_ARMV7M_LAZYFPU + +static inline void tiva_fpuconfig(void) +{ + uint32_t regval; + + /* Set CONTROL.FPCA so that we always get the extended context frame + * with the volatile FP registers stacked above the basic context. + */ + + regval = getcontrol(); + regval |= (1 << 2); + setcontrol(regval); + + /* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend + * with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we + * are going to turn on CONTROL.FPCA for all contexts. + */ + + regval = getreg32(NVIC_FPCCR); + regval &= ~((1 << 31) | (1 << 30)); + putreg32(regval, NVIC_FPCCR); + + /* Enable full access to CP10 and CP11 */ + + regval = getreg32(NVIC_CPACR); + regval |= ((3 << (2*10)) | (3 << (2*11))); + putreg32(regval, NVIC_CPACR); +} + +#else + +static inline void tiva_fpuconfig(void) +{ + uint32_t regval; + + /* Clear CONTROL.FPCA so that we do not get the extended context frame + * with the volatile FP registers stacked in the saved context. + */ + + regval = getcontrol(); + regval &= ~(1 << 2); + setcontrol(regval); + + /* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend + * with the lazy FP context save behavior. Clear FPCCR.ASPEN since we + * are going to keep CONTROL.FPCA off for all contexts. + */ + + regval = getreg32(NVIC_FPCCR); + regval &= ~((1 << 31) | (1 << 30)); + putreg32(regval, NVIC_FPCCR); + + /* Enable full access to CP10 and CP11 */ + + regval = getreg32(NVIC_CPACR); + regval |= ((3 << (2*10)) | (3 << (2*11))); + putreg32(regval, NVIC_CPACR); +} + +#endif + +#else +# define tiva_fpuconfig() +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -100,6 +224,7 @@ void __start(void) up_clockconfig(); up_lowsetup(); #endif + tiva_fpuconfig(); showprogress('A'); /* Clear .bss. We'll do this inline (vs. calling memset) just to be @@ -110,6 +235,7 @@ void __start(void) { *dest++ = 0; } + showprogress('B'); #ifdef CONFIG_BOOT_RUNFROMFLASH @@ -123,6 +249,7 @@ void __start(void) { *dest++ = *src++; } + showprogress('C'); #endif diff --git a/arch/arm/src/tiva/tiva_start.h b/arch/arm/src/tiva/tiva_start.h index ec4c5f71d4..0510c1b370 100644 --- a/arch/arm/src/tiva/tiva_start.h +++ b/arch/arm/src/tiva/tiva_start.h @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_start.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,6 +42,22 @@ #include +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* g_idle_topstack: _sbss is the start of the BSS region as defined by the + * linker script. _ebss lies at the end of the BSS region. The idle task + * stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. + * The IDLE thread is the thread that the system boots on and, eventually, + * becomes the IDLE, do nothing task that runs only when there is nothing + * else to run. The heap continues from there until the end of memory. + * g_idle_topstack is a read-only variable the provides this computed + * address. + */ + +extern const uintptr_t g_idle_topstack; + /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/arm/src/tiva/tiva_vectors.S b/arch/arm/src/tiva/tiva_vectors.S deleted file mode 100644 index 99db8115cc..0000000000 --- a/arch/arm/src/tiva/tiva_vectors.S +++ /dev/null @@ -1,488 +0,0 @@ -/************************************************************************************ - * arch/arm/src/tiva/tiva_vectors.S - * - * Copyright (C) 2009-2010, 2013-2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include - -#include "chip.h" -#include "exc_return.h" - -/************************************************************************************ - * Configuration - ************************************************************************************/ - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ -/* Configuration ********************************************************************/ - -#ifdef CONFIG_ARCH_HIPRI_INTERRUPT - /* In kernel mode without an interrupt stack, this interrupt handler will set the - * MSP to the stack pointer of the interrupted thread. If the interrupted thread - * was a privileged thread, that will be the MSP otherwise it will be the PSP. If - * the PSP is used, then the value of the MSP will be invalid when the interrupt - * handler returns because it will be a pointer to an old position in the - * unprivileged stack. Then when the high priority interrupt occurs and uses this - * stale MSP, there will most likely be a system failure. - * - * If the interrupt stack is selected, on the other hand, then the interrupt - * handler will always set the MSP to the interrupt stack. So when the high - * priority interrupt occurs, it will either use the MSP of the last privileged - * thread to run or, in the case of the nested interrupt, the interrupt stack if - * no privileged task has run. - */ - -# if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 4 -# error Interrupt stack must be used with high priority interrupts in kernel mode -# endif - - /* Use the BASEPRI to control interrupts is required if nested, high - * priority interrupts are supported. - */ - -# ifndef CONFIG_ARMV7M_USEBASEPRI -# error CONFIG_ARMV7M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT -# endif -#endif - -/* Memory Map ***********************************************************************/ -/* - * 0x0000:0000 - Beginning of FLASH. Address of vectors (if not using bootloader) - * 0x0002:0000 - Address of vectors if using bootloader - * 0x0003:ffff - End of flash - * 0x2000:0000 - Start of SRAM and start of .data (_sdata) - * - End of .data (_edata) abd start of .bss (_sbss) - * - End of .bss (_ebss) and bottom of idle stack - * - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack, start of heap - * 0x2000:ffff - End of SRAM and end of heap - */ - -#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) -#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE) - -/************************************************************************************ - * Public Symbols - ************************************************************************************/ - - .syntax unified - .thumb - .file "tiva_vectors.S" - -/* Check if common ARMv7 interrupt vectoring is used (see arch/arm/src/armv7-m/up_vectors.S) */ - -#ifndef CONFIG_ARMV7M_CMNVECTOR - - .globl __start - -/************************************************************************************ - * Macros - ************************************************************************************/ - -/* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3 - * registers on the stack, then branches to an instantantiation of the following - * macro. This macro simply loads the IRQ number into R0, then jumps to the common - * IRQ handling logic. - */ - - .macro HANDLER, label, irqno - .thumb_func -\label: - mov r0, #\irqno - b exception_common - .endm - -/************************************************************************************ - * Vectors - ************************************************************************************/ - - .section .vectors, "ax" - .code 16 - .align 2 - .globl _vectors - .type _vectors, function - -_vectors: - -/* Processor Exceptions */ - - .word IDLE_STACK /* Vector 0: Reset stack pointer */ - .word __start /* Vector 1: Reset vector */ - .word tiva_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */ - .word tiva_hardfault /* Vector 3: Hard fault */ - .word tiva_mpu /* Vector 4: Memory management (MPU) */ - .word tiva_busfault /* Vector 5: Bus fault */ - .word tiva_usagefault /* Vector 6: Usage fault */ - .word tiva_reserved /* Vector 7: Reserved */ - .word tiva_reserved /* Vector 8: Reserved */ - .word tiva_reserved /* Vector 9: Reserved */ - .word tiva_reserved /* Vector 10: Reserved */ - .word tiva_svcall /* Vector 11: SVC call */ - .word tiva_dbgmonitor /* Vector 12: Debug monitor */ - .word tiva_reserved /* Vector 13: Reserved */ - .word tiva_pendsv /* Vector 14: Pendable system service request */ - .word tiva_systick /* Vector 15: System tick */ - -/* External Interrupts */ - -/* External Interrupts */ - -#undef VECTOR -#define VECTOR(l,i) .word l - -#undef UNUSED -#define UNUSED(i) .word tiva_reserved - -#include "chip/chip/tiva_vectors.h" - .size _vectors, .-_vectors - -/************************************************************************************ - * .text - ************************************************************************************/ - - .text - .type handlers, function - .thumb_func -handlers: - HANDLER tiva_reserved, TIVA_IRQ_RESERVED /* Unexpected/reserved vector */ - HANDLER tiva_nmi, TIVA_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */ - HANDLER tiva_hardfault, TIVA_IRQ_HARDFAULT /* Vector 3: Hard fault */ - HANDLER tiva_mpu, TIVA_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */ - HANDLER tiva_busfault, TIVA_IRQ_BUSFAULT /* Vector 5: Bus fault */ - HANDLER tiva_usagefault, TIVA_IRQ_USAGEFAULT /* Vector 6: Usage fault */ - HANDLER tiva_svcall, TIVA_IRQ_SVCALL /* Vector 11: SVC call */ - HANDLER tiva_dbgmonitor, TIVA_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */ - HANDLER tiva_pendsv, TIVA_IRQ_PENDSV /* Vector 14: Penable system service request */ - HANDLER tiva_systick, TIVA_IRQ_SYSTICK /* Vector 15: System tick */ - -#undef VECTOR -#define VECTOR(l,i) HANDLER l, i - -#undef UNUSED -#define UNUSED(i) - -#include "chip/chip/tiva_vectors.h" - -/* Common IRQ handling logic. On entry here, the return stack is on either - * the PSP or the MSP and looks like the following: - * - * REG_XPSR - * REG_R15 - * REG_R14 - * REG_R12 - * REG_R3 - * REG_R2 - * REG_R1 - * MSP->REG_R0 - * - * And - * R0 contains the IRQ number - * R14 Contains the EXC_RETURN value - * We are in handler mode and the current SP is the MSP - */ - - .globl exception_common - .type exception_common, function -exception_common: - - /* Complete the context save */ - -#ifdef CONFIG_BUILD_PROTECTED - /* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1 - * (handler mode) if the stack is on the MSP. It can only be on the PSP if - * EXC_RETURN is 0xfffffffd (unprivileged thread) - */ - - tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */ - beq 1f /* Branch if context already on the MSP */ - mrs r1, psp /* R1=The process stack pointer (PSP) */ - mov sp, r1 /* Set the MSP to the PSP */ - -1: -#endif - - /* r1 holds the value of the stack pointer AFTER the exception handling logic - * pushed the various registers onto the stack. Get r2 = the value of the - * stack pointer BEFORE the interrupt modified it. - */ - - mov r2, sp /* R2=Copy of the main/process stack pointer */ - add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */ -#ifdef CONFIG_ARMV7M_USEBASEPRI - mrs r3, basepri /* R3=Current BASEPRI setting */ -#else - mrs r3, primask /* R3=Current PRIMASK setting */ -#endif - -#ifdef CONFIG_ARCH_FPU - /* Skip over the block of memory reserved for floating pointer register save. - * Lazy FPU register saving is used. FPU registers will be saved in this - * block only if a context switch occurs (this means, of course, that the FPU - * cannot be used in interrupt processing). - */ - - sub sp, #(4*SW_FPU_REGS) -#endif - - /* Save the remaining registers on the stack after the registers pushed - * by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11, - * r14=register values. - */ - -#ifdef CONFIG_BUILD_PROTECTED - stmdb sp!, {r2-r11,r14} /* Save the remaining registers plus the SP value */ -#else - stmdb sp!, {r2-r11} /* Save the remaining registers plus the SP value */ -#endif - -#ifndef CONFIG_ARCH_HIPRI_INTERRUPT - /* Disable interrupts, select the stack to use for interrupt handling - * and call up_doirq to handle the interrupt - */ - - cpsid i /* Disable further interrupts */ - -#else - /* Set the BASEPRI register so that further normal interrupts will be - * masked. Nested, high priority may still occur, however. - */ - - mov r2, #NVIC_SYSH_DISABLE_PRIORITY - msr basepri, r2 /* Set the BASEPRI */ -#endif - - /* There are two arguments to up_doirq: - * - * R0 = The IRQ number - * R1 = The top of the stack points to the saved state - */ - - mov r1, sp - - /* Also save the top of the stack in a preserved register */ - - mov r4, sp - -#if CONFIG_ARCH_INTERRUPTSTACK > 7 - /* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will set the MSP to use - * a special special interrupt stack pointer. The way that this is done - * here prohibits nested interrupts without some additional logic! - */ - - ldr sp, =g_intstackbase - -#else - /* Otherwise, we will re-use the interrupted thread's stack. That may - * mean using either MSP or PSP stack for interrupt level processing (in - * kernel mode). - */ - - bic r2, r4, #7 /* Get the stack pointer with 8-byte alignment */ - mov sp, r2 /* Instantiate the aligned stack */ - -#endif - - bl up_doirq /* R0=IRQ, R1=register save (msp) */ - mov r1, r4 /* Recover R1=main stack pointer */ - - /* On return from up_doirq, R0 will hold a pointer to register context - * array to use for the interrupt return. If that return value is the same - * as current stack pointer, then things are relatively easy. - */ - - cmp r0, r1 /* Context switch? */ - beq 2f /* Branch if no context switch */ - - /* We are returning with a pending context switch. - * - * If the FPU is enabled, then we will need to restore FPU registers. - * This is not done in normal interrupt save/restore because the cost - * is prohibitive. This is only done when switching contexts. A - * consequence of this is that floating point operations may not be - * performed in interrupt handling logic. - * - * Here: - * r0 = Address of the register save area - * - * NOTE: It is a requirement that up_restorefpu() preserve the value of - * r0! - */ - -#ifdef CONFIG_ARCH_FPU - bl up_restorefpu /* Restore the FPU registers */ -#endif - - /* We are returning with a pending context switch. This case is different - * because in this case, the register save structure does not lie in the - * stack but, rather, within a TCB structure. We'll have to copy some - * values to the stack. - */ - - add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */ - ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */ - ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */ - stmdb r1!, {r4-r11} /* Store eight registers in HW save area */ -#ifdef CONFIG_BUILD_PROTECTED - ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */ -#else - ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */ -#endif - b 3f /* Re-join common logic */ - - /* We are returning with no context switch. We simply need to "unwind" - * the same stack frame that we created - * - * Here: - * r1 = Address of the return stack (same as r0) - */ - -2: -#ifdef CONFIG_BUILD_PROTECTED - ldmia r1!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */ -#else - ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */ -#endif - -#ifdef CONFIG_ARCH_FPU - /* Skip over the block of memory reserved for floating pointer register - * save. Then R1 is the address of the HW save area - */ - - add r1, #(4*SW_FPU_REGS) -#endif - - /* Set up to return from the exception - * - * Here: - * r1 = Address on the target thread's stack position at the start of - * the registers saved by hardware - * r3 = primask or basepri - * r4-r11 = restored register values - */ - -3: - -#ifdef CONFIG_BUILD_PROTECTED - /* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1 - * (handler mode) if the stack is on the MSP. It can only be on the PSP if - * EXC_RETURN is 0xfffffffd (unprivileged thread) - */ - - mrs r2, control /* R2=Contents of the control register */ - tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */ - beq 4f /* Branch if privileged */ - - orr r2, r2, #1 /* Unprivileged mode */ - msr psp, r1 /* R1=The process stack pointer */ - b 5f -4: - bic r2, r2, #1 /* Privileged mode */ - msr msp, r1 /* R1=The main stack pointer */ -5: - msr control, r2 /* Save the updated control register */ -#else - msr msp, r1 /* Recover the return MSP value */ - - /* Preload r14 with the special return value first (so that the return - * actually occurs with interrupts still disabled). - */ - - ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ -#endif - - /* Restore the interrupt state */ - -#ifdef CONFIG_ARMV7M_USEBASEPRI - msr basepri, r3 /* Restore interrupts priority masking */ -#ifndef CONFIG_ARCH_HIPRI_INTERRUPT - cpsie i /* Re-enable interrupts */ -#endif - -#else - msr primask, r3 /* Restore interrupts */ -#endif - - /* Always return with R14 containing the special value that will: (1) - * return to thread mode, and (2) continue to use the MSP - */ - - bx r14 /* And return */ - .size handlers, .-handlers - -/************************************************************************************ - * Name: g_intstackalloc/g_intstackbase - * - * Description: - * Shouldn't happen - * - ************************************************************************************/ - -#if CONFIG_ARCH_INTERRUPTSTACK > 7 - .bss - .global g_intstackalloc - .global g_intstackbase - .align 8 -g_intstackalloc: - .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) -g_intstackbase: - .size g_intstackalloc, .-g_intstackalloc -#endif -#endif /* CONFIG_ARMV7M_CMNVECTOR */ - -/************************************************************************************ - * .rodata - ************************************************************************************/ - - .section .rodata, "a" - -/* Variables: _sbss is the start of the BSS region (see ld.script) _ebss is the end - * of the BSS regsion (see ld.script). The idle task stack starts at the end of BSS - * and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE thread is the thread that - * the system boots on and, eventually, becomes the idle, do nothing task that runs - * only when there is nothing else to run. The heap continues from there until the - * end of memory. See g_idle_topstack below. - */ - - .globl g_idle_topstack - .type g_idle_topstack, object -g_idle_topstack: - .word HEAP_BASE - .size g_idle_topstack, .-g_idle_topstack - - .end diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig index c7b6179b4f..ead5064e19 100644 --- a/configs/dk-tm4c129x/ipv6/defconfig +++ b/configs/dk-tm4c129x/ipv6/defconfig @@ -3,16 +3,16 @@ # CONFIG_NET_UDP_READAHEAD is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_DK_TM4C129X=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="dk-tm4c129x" +CONFIG_ARCH_BOARD_DK_TM4C129X=y CONFIG_ARCH_BUTTONS=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_CHIP_TM4C129=y CONFIG_ARCH_CHIP_TM4C129XNC=y +CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y CONFIG_BOARD_LOOPSPERMSEC=11401 CONFIG_BUILTIN=y @@ -22,24 +22,23 @@ CONFIG_I2CTOOL_MAXBUS=6 CONFIG_I2CTOOL_MINBUS=6 CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBM=y -CONFIG_SENSORS_LM75=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 +CONFIG_NET=y CONFIG_NET_BROADCAST=y CONFIG_NET_ETH_MTU=590 CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_ICMPv6=y CONFIG_NET_ICMPv6_NEIGHBOR=y CONFIG_NET_ICMPv6_SOCKET=y -CONFIG_NET_ICMPv6=y CONFIG_NET_IPv6=y CONFIG_NET_SOCKOPTS=y CONFIG_NET_SOLINGER=y CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y -CONFIG_NET=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y @@ -60,6 +59,7 @@ CONFIG_RR_INTERVAL=200 CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y CONFIG_SENSORS=y +CONFIG_SENSORS_LM75=y CONFIG_START_DAY=24 CONFIG_START_MONTH=3 CONFIG_START_YEAR=2013 diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig index 5e4e3b67fa..14f9e81105 100644 --- a/configs/dk-tm4c129x/nsh/defconfig +++ b/configs/dk-tm4c129x/nsh/defconfig @@ -1,16 +1,16 @@ # CONFIG_ARCH_FPU is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_DK_TM4C129X=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="dk-tm4c129x" +CONFIG_ARCH_BOARD_DK_TM4C129X=y CONFIG_ARCH_BUTTONS=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_CHIP_TM4C129=y CONFIG_ARCH_CHIP_TM4C129XNC=y +CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y CONFIG_BOARD_LOOPSPERMSEC=11401 CONFIG_BUILTIN=y @@ -22,24 +22,24 @@ CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBM=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_NET_ARP_IPIN=y -CONFIG_NET_ARP_SEND=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_SOLINGER=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_WRITE_BUFFERS=y -CONFIG_NET_TCP=y -CONFIG_NET_TCPBACKLOG=y -CONFIG_NET_UDP=y CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y @@ -58,8 +58,8 @@ CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y -CONFIG_SENSORS_LM75=y CONFIG_SENSORS=y +CONFIG_SENSORS_LM75=y CONFIG_START_DAY=24 CONFIG_START_MONTH=3 CONFIG_START_YEAR=2013 diff --git a/configs/dk-tm4c129x/scripts/ld.script b/configs/dk-tm4c129x/scripts/ld.script index bfb0996f32..c53b6a7184 100644 --- a/configs/dk-tm4c129x/scripts/ld.script +++ b/configs/dk-tm4c129x/scripts/ld.script @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig index 4e637dfbd7..2583cbfcae 100644 --- a/configs/eagle100/httpd/defconfig +++ b/configs/eagle100/httpd/defconfig @@ -1,10 +1,10 @@ -CONFIG_ARCH_BOARD_EAGLE100=y -CONFIG_ARCH_BOARD="eagle100" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6918=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="eagle100" +CONFIG_ARCH_BOARD_EAGLE100=y +CONFIG_ARCH_CHIP_LM3S6918=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_DEV_LOWCONSOLE=y @@ -15,16 +15,16 @@ CONFIG_DISABLE_POLL=y CONFIG_EXAMPLES_WEBSERVER=y CONFIG_HOST_WINDOWS=y CONFIG_MAX_TASKS=8 +CONFIG_NET=y +CONFIG_NETUTILS_NETLIB=y +CONFIG_NETUTILS_WEBSERVER=y CONFIG_NET_ICMP=y CONFIG_NET_MAX_LISTENPORTS=8 CONFIG_NET_SOCKOPTS=y CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_CONNS=16 CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y -CONFIG_NET=y -CONFIG_NETUTILS_NETLIB=y -CONFIG_NETUTILS_WEBSERVER=y +CONFIG_NET_TCP_CONNS=16 CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NPTHREAD_KEYS=0 diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig index 507816b761..369a7c8175 100644 --- a/configs/eagle100/nettest/defconfig +++ b/configs/eagle100/nettest/defconfig @@ -1,10 +1,10 @@ -CONFIG_ARCH_BOARD_EAGLE100=y -CONFIG_ARCH_BOARD="eagle100" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6918=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="eagle100" +CONFIG_ARCH_BOARD_EAGLE100=y +CONFIG_ARCH_CHIP_LM3S6918=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_DEV_LOWCONSOLE=y @@ -16,12 +16,12 @@ CONFIG_DISABLE_PTHREAD=y CONFIG_EXAMPLES_NETTEST=y CONFIG_HOST_WINDOWS=y CONFIG_MAX_TASKS=8 +CONFIG_NET=y +CONFIG_NETUTILS_NETLIB=y CONFIG_NET_ICMP=y CONFIG_NET_MAX_LISTENPORTS=8 CONFIG_NET_SOCKOPTS=y CONFIG_NET_TCP=y -CONFIG_NET=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NUNGET_CHARS=0 diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig index ef4b92bbb8..4116e2f91e 100644 --- a/configs/eagle100/nsh/defconfig +++ b/configs/eagle100/nsh/defconfig @@ -1,12 +1,12 @@ # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_EAGLE100=y -CONFIG_ARCH_BOARD="eagle100" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6918=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="eagle100" +CONFIG_ARCH_BOARD_EAGLE100=y +CONFIG_ARCH_CHIP_LM3S6918=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_EXAMPLES_NSH=y @@ -14,24 +14,24 @@ CONFIG_FS_FAT=y CONFIG_HOST_WINDOWS=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y +CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig index af479ff457..d78bc83a79 100644 --- a/configs/eagle100/nxflat/defconfig +++ b/configs/eagle100/nxflat/defconfig @@ -1,10 +1,10 @@ -CONFIG_ARCH_BOARD_EAGLE100=y -CONFIG_ARCH_BOARD="eagle100" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6918=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="eagle100" +CONFIG_ARCH_BOARD_EAGLE100=y +CONFIG_ARCH_CHIP_LM3S6918=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y CONFIG_BOARD_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=4531 @@ -43,6 +43,6 @@ CONFIG_TIVA_GPIOG_IRQS=y CONFIG_TIVA_SSI0=y CONFIG_TIVA_UART0=y CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_USER_ENTRYPOINT="nxflat_main" CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_USER_ENTRYPOINT="nxflat_main" CONFIG_WDOG_INTRESERVE=0 diff --git a/configs/eagle100/scripts/ld.script b/configs/eagle100/scripts/ld.script index 0382307696..9bff0b1c5c 100644 --- a/configs/eagle100/scripts/ld.script +++ b/configs/eagle100/scripts/ld.script @@ -47,6 +47,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS { diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig index 4bed028dca..fef2d36836 100644 --- a/configs/eagle100/thttpd/defconfig +++ b/configs/eagle100/thttpd/defconfig @@ -1,10 +1,10 @@ -CONFIG_ARCH_BOARD_EAGLE100=y -CONFIG_ARCH_BOARD="eagle100" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6918=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="eagle100" +CONFIG_ARCH_BOARD_EAGLE100=y +CONFIG_ARCH_CHIP_LM3S6918=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_DEV_LOWCONSOLE=y @@ -15,15 +15,15 @@ CONFIG_EXAMPLES_THTTPD=y CONFIG_FS_ROMFS=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_TCP_CONNS=16 -CONFIG_NET_TCP=y -CONFIG_NET_TCPBACKLOG=y CONFIG_NET=y CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_THTTPD=y +CONFIG_NET_ICMP=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_CONNS=16 CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSOCKET_DESCRIPTORS=16 @@ -57,6 +57,6 @@ CONFIG_TIVA_GPIOG_IRQS=y CONFIG_TIVA_SSI0=y CONFIG_TIVA_UART0=y CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_USER_ENTRYPOINT="thttp_main" CONFIG_USERMAIN_STACKSIZE=8192 +CONFIG_USER_ENTRYPOINT="thttp_main" CONFIG_WDOG_INTRESERVE=1 diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig index ed2bd479b1..4c1a102a85 100644 --- a/configs/ekk-lm3s9b96/nsh/defconfig +++ b/configs/ekk-lm3s9b96/nsh/defconfig @@ -1,12 +1,12 @@ # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_EKKLM3S9B96=y -CONFIG_ARCH_BOARD="ekk-lm3s9b96" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S9B96=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="ekk-lm3s9b96" +CONFIG_ARCH_BOARD_EKKLM3S9B96=y +CONFIG_ARCH_CHIP_LM3S9B96=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 @@ -14,22 +14,22 @@ CONFIG_EXAMPLES_NSH=y CONFIG_FS_FAT=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_MMCSD_NSLOTS=0 CONFIG_MMCSD=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y +CONFIG_MMCSD_NSLOTS=0 CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NFS=y diff --git a/configs/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld b/configs/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld index 864c2159d1..40978b93ad 100644 --- a/configs/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld +++ b/configs/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld @@ -45,6 +45,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS { diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig index 38b224208b..7a2d42ff20 100644 --- a/configs/lm3s6432-s2e/nsh/defconfig +++ b/configs/lm3s6432-s2e/nsh/defconfig @@ -1,34 +1,34 @@ # CONFIG_NET_UDP_READAHEAD is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_LM3S6432S2E=y -CONFIG_ARCH_BOARD="lm3s6432-s2e" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6432=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s6432-s2e" +CONFIG_ARCH_BOARD_LM3S6432S2E=y +CONFIG_ARCH_CHIP_LM3S6432=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_EXAMPLES_NSH=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/lm3s6432-s2e/scripts/lm3s6432-s2e.ld b/configs/lm3s6432-s2e/scripts/lm3s6432-s2e.ld index 1c848616aa..aaf7b4ed04 100644 --- a/configs/lm3s6432-s2e/scripts/lm3s6432-s2e.ld +++ b/configs/lm3s6432-s2e/scripts/lm3s6432-s2e.ld @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS { diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig index 9bf48a9b41..b2d431b9b6 100644 --- a/configs/lm3s6965-ek/discover/defconfig +++ b/configs/lm3s6965-ek/discover/defconfig @@ -1,12 +1,12 @@ # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_LM3S6965EK=y -CONFIG_ARCH_BOARD="lm3s6965-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6965=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s6965-ek" +CONFIG_ARCH_BOARD_LM3S6965EK=y +CONFIG_ARCH_CHIP_LM3S6965=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 @@ -14,25 +14,25 @@ CONFIG_EXAMPLES_NSH=y CONFIG_FS_FAT=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y +CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_DHCPC=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig index 9bf48a9b41..b2d431b9b6 100644 --- a/configs/lm3s6965-ek/nsh/defconfig +++ b/configs/lm3s6965-ek/nsh/defconfig @@ -1,12 +1,12 @@ # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_LM3S6965EK=y -CONFIG_ARCH_BOARD="lm3s6965-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6965=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s6965-ek" +CONFIG_ARCH_BOARD_LM3S6965EK=y +CONFIG_ARCH_CHIP_LM3S6965=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 @@ -14,25 +14,25 @@ CONFIG_EXAMPLES_NSH=y CONFIG_FS_FAT=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y +CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_DHCPC=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig index e5a20dbdfd..17d702dbeb 100644 --- a/configs/lm3s6965-ek/nx/defconfig +++ b/configs/lm3s6965-ek/nx/defconfig @@ -1,13 +1,13 @@ # CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set -# CONFIG_NX_DISABLE_4BPP is not set # CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set -CONFIG_ARCH_BOARD_LM3S6965EK=y -CONFIG_ARCH_BOARD="lm3s6965-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6965=y -CONFIG_ARCH_STACKDUMP=y +# CONFIG_NX_DISABLE_4BPP is not set CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s6965-ek" +CONFIG_ARCH_BOARD_LM3S6965EK=y +CONFIG_ARCH_CHIP_LM3S6965=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 @@ -15,29 +15,29 @@ CONFIG_DISABLE_ENVIRON=y CONFIG_DISABLE_MOUNTPOINT=y CONFIG_DISABLE_POLL=y CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_EXAMPLES_NX=y CONFIG_EXAMPLES_NX_BGCOLOR=0x02 CONFIG_EXAMPLES_NX_BPP=4 CONFIG_EXAMPLES_NX_COLOR1=0x0a CONFIG_EXAMPLES_NX_COLOR2=0x0c CONFIG_EXAMPLES_NX_FONTCOLOR=0x00 CONFIG_EXAMPLES_NX_TBCOLOR=0x08 -CONFIG_EXAMPLES_NX=y -CONFIG_LCD_P14201=y CONFIG_LCD=y +CONFIG_LCD_P14201=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 CONFIG_MQ_MAXMSGSIZE=64 CONFIG_NFILE_DESCRIPTORS=12 CONFIG_NFILE_STREAMS=12 -CONFIG_NX_BLOCKING=y -CONFIG_NX_KBD=y -CONFIG_NX_XYINPUT_MOUSE=y CONFIG_NX=y CONFIG_NXFONT_SANS23X27=y CONFIG_NXSTART_EXTERNINIT=y CONFIG_NXTK_BORDERCOLOR1=0x08 CONFIG_NXTK_BORDERCOLOR2=0x04 CONFIG_NXTK_BORDERCOLOR3=0x0c +CONFIG_NX_BLOCKING=y +CONFIG_NX_KBD=y +CONFIG_NX_XYINPUT_MOUSE=y CONFIG_P14201_FREQUENCY=3500000 CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_PREALLOC_TIMERS=4 @@ -47,8 +47,8 @@ CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SDCLONE_DISABLE=y -CONFIG_SPI_CMDDATA=y CONFIG_SPI=y +CONFIG_SPI_CMDDATA=y CONFIG_START_DAY=12 CONFIG_START_MONTH=5 CONFIG_START_YEAR=2010 diff --git a/configs/lm3s6965-ek/scripts/ld.script b/configs/lm3s6965-ek/scripts/ld.script index 7350cf5ee5..69b2a35ac8 100644 --- a/configs/lm3s6965-ek/scripts/ld.script +++ b/configs/lm3s6965-ek/scripts/ld.script @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS { diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig index 1ba2dbc4ab..f7c59d120c 100644 --- a/configs/lm3s6965-ek/tcpecho/defconfig +++ b/configs/lm3s6965-ek/tcpecho/defconfig @@ -1,42 +1,42 @@ # CONFIG_DISABLE_OS_API is not set -CONFIG_ARCH_BOARD_LM3S6965EK=y -CONFIG_ARCH_BOARD="lm3s6965-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S6965=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s6965-ek" +CONFIG_ARCH_BOARD_LM3S6965EK=y +CONFIG_ARCH_CHIP_LM3S6965=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y CONFIG_BOARD_LOOPSPERMSEC=4531 +CONFIG_EXAMPLES_TCPECHO=y CONFIG_EXAMPLES_TCPECHO_DRIPADDR=0xc0a80201 CONFIG_EXAMPLES_TCPECHO_IPADDR=0xc0a80232 CONFIG_EXAMPLES_TCPECHO_NOMAC=y -CONFIG_EXAMPLES_TCPECHO=y CONFIG_FS_FAT=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_NET_BROADCAST=y -CONFIG_NET_ETH_MTU=650 -CONFIG_NET_ETH_TCP_RECVWNDO=624 -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_CONNS=16 -CONFIG_NET_TCP=y -CONFIG_NET_TCPBACKLOG=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_DHCPC=y CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ETH_MTU=650 +CONFIG_NET_ETH_TCP_RECVWNDO=624 +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_CONNS=16 +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSOCKET_DESCRIPTORS=16 diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig index bc5b390fbd..9bd07a755e 100644 --- a/configs/lm3s8962-ek/nsh/defconfig +++ b/configs/lm3s8962-ek/nsh/defconfig @@ -1,12 +1,12 @@ # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_LM3S8962EK=y -CONFIG_ARCH_BOARD="lm3s8962-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S8962=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s8962-ek" +CONFIG_ARCH_BOARD_LM3S8962EK=y +CONFIG_ARCH_CHIP_LM3S8962=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_EXAMPLES_NSH=y @@ -14,24 +14,24 @@ CONFIG_FS_FAT=y CONFIG_HOST_WINDOWS=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_MAX_LISTENPORTS=8 -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP=y -CONFIG_NET_UDP_CHECKSUMS=y -CONFIG_NET_UDP=y +CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_MAX_LISTENPORTS=8 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig index 98a49d5d4b..943b246722 100644 --- a/configs/lm3s8962-ek/nx/defconfig +++ b/configs/lm3s8962-ek/nx/defconfig @@ -1,43 +1,43 @@ # CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set -# CONFIG_NX_DISABLE_4BPP is not set # CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set -CONFIG_ARCH_BOARD_LM3S8962EK=y -CONFIG_ARCH_BOARD="lm3s8962-ek" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM3S=y -CONFIG_ARCH_CHIP_LM3S8962=y -CONFIG_ARCH_STACKDUMP=y +# CONFIG_NX_DISABLE_4BPP is not set CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm3s8962-ek" +CONFIG_ARCH_BOARD_LM3S8962EK=y +CONFIG_ARCH_CHIP_LM3S8962=y +CONFIG_ARCH_CHIP_LM3S=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 CONFIG_DISABLE_ENVIRON=y CONFIG_DISABLE_MOUNTPOINT=y CONFIG_DISABLE_POLL=y CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_EXAMPLES_NX=y CONFIG_EXAMPLES_NX_BGCOLOR=2 CONFIG_EXAMPLES_NX_BPP=4 CONFIG_EXAMPLES_NX_COLOR1=10 CONFIG_EXAMPLES_NX_COLOR2=12 CONFIG_EXAMPLES_NX_FONTCOLOR=0 CONFIG_EXAMPLES_NX_TBCOLOR=8 -CONFIG_EXAMPLES_NX=y CONFIG_HOST_WINDOWS=y -CONFIG_LCD_P14201=y CONFIG_LCD=y +CONFIG_LCD_P14201=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 CONFIG_MQ_MAXMSGSIZE=64 CONFIG_NFILE_DESCRIPTORS=12 CONFIG_NFILE_STREAMS=12 -CONFIG_NX_BLOCKING=y -CONFIG_NX_KBD=y -CONFIG_NX_XYINPUT_MOUSE=y CONFIG_NX=y CONFIG_NXFONT_SANS23X27=y CONFIG_NXSTART_EXTERNINIT=y CONFIG_NXTK_BORDERCOLOR1=6 CONFIG_NXTK_BORDERCOLOR2=4 CONFIG_NXTK_BORDERCOLOR3=8 +CONFIG_NX_BLOCKING=y +CONFIG_NX_KBD=y +CONFIG_NX_XYINPUT_MOUSE=y CONFIG_P14201_FREQUENCY=3500000 CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_PREALLOC_TIMERS=4 @@ -47,8 +47,8 @@ CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SDCLONE_DISABLE=y -CONFIG_SPI_CMDDATA=y CONFIG_SPI=y +CONFIG_SPI_CMDDATA=y CONFIG_START_DAY=12 CONFIG_START_MONTH=5 CONFIG_START_YEAR=2010 diff --git a/configs/lm3s8962-ek/scripts/ld.script b/configs/lm3s8962-ek/scripts/ld.script index ccb22ddfae..529b596cf7 100644 --- a/configs/lm3s8962-ek/scripts/ld.script +++ b/configs/lm3s8962-ek/scripts/ld.script @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS { diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig index 6e3750bcb8..7937f142d6 100644 --- a/configs/lm4f120-launchpad/nsh/defconfig +++ b/configs/lm4f120-launchpad/nsh/defconfig @@ -1,13 +1,13 @@ # CONFIG_ARCH_FPU is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD=y -CONFIG_ARCH_BOARD="lm4f120-launchpad" -CONFIG_ARCH_CHIP_LM=y -CONFIG_ARCH_CHIP_LM4F=y -CONFIG_ARCH_CHIP_LM4F120=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="lm4f120-launchpad" +CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD=y +CONFIG_ARCH_CHIP_LM4F120=y +CONFIG_ARCH_CHIP_LM4F=y +CONFIG_ARCH_CHIP_LM=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 diff --git a/configs/lm4f120-launchpad/scripts/lm4f120-launchpad.ld b/configs/lm4f120-launchpad/scripts/lm4f120-launchpad.ld index c6df1ca1a4..a7e3828f89 100644 --- a/configs/lm4f120-launchpad/scripts/lm4f120-launchpad.ld +++ b/configs/lm4f120-launchpad/scripts/lm4f120-launchpad.ld @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig index 0a28cef5eb..ef0f7e1ae9 100644 --- a/configs/tm4c123g-launchpad/nsh/defconfig +++ b/configs/tm4c123g-launchpad/nsh/defconfig @@ -1,14 +1,14 @@ # CONFIG_ARCH_FPU is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_TM4C123G_LAUNCHPAD=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="tm4c123g-launchpad" +CONFIG_ARCH_BOARD_TM4C123G_LAUNCHPAD=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_CHIP_TM4C123=y CONFIG_ARCH_CHIP_TM4C123GH6PMI=y +CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_ARMV7M_OABI_TOOLCHAIN=y CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_BOARD_LOOPSPERMSEC=4531 diff --git a/configs/tm4c123g-launchpad/scripts/tm4c123g-launchpad.ld b/configs/tm4c123g-launchpad/scripts/tm4c123g-launchpad.ld index 7b45b51d15..17a590d9b8 100644 --- a/configs/tm4c123g-launchpad/scripts/tm4c123g-launchpad.ld +++ b/configs/tm4c123g-launchpad/scripts/tm4c123g-launchpad.ld @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig index 6587cc6ba7..528571292f 100644 --- a/configs/tm4c1294-launchpad/ipv6/defconfig +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -2,15 +2,15 @@ # CONFIG_NET_IPv4 is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="tm4c1294-launchpad" +CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y CONFIG_ARCH_BUTTONS=y CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C=y -CONFIG_ARCH_CHIP_TM4C129=y CONFIG_ARCH_CHIP_TM4C1294NC=y +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_BOARD_LOOPSPERMSEC=11401 CONFIG_BUILTIN=y CONFIG_EXAMPLES_NSH=y @@ -21,20 +21,20 @@ CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBM=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 +CONFIG_NET=y CONFIG_NET_BROADCAST=y CONFIG_NET_ETH_MTU=590 CONFIG_NET_ETH_TCP_RECVWNDO=536 -CONFIG_NET_ICMPv6_SOCKET=y CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_SOCKET=y CONFIG_NET_IPv6=y CONFIG_NET_SOCKOPTS=y CONFIG_NET_SOLINGER=y CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y -CONFIG_NET=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig index 9cdd97e4a5..eb3a4a2e3f 100644 --- a/configs/tm4c1294-launchpad/nsh/defconfig +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -1,14 +1,14 @@ # CONFIG_ARCH_FPU is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set -CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y -CONFIG_ARCH_BOARD="tm4c1294-launchpad" -CONFIG_ARCH_CHIP_TIVA=y -CONFIG_ARCH_CHIP_TM4C=y -CONFIG_ARCH_CHIP_TM4C129=y -CONFIG_ARCH_CHIP_TM4C1294NC=y -CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="tm4c1294-launchpad" +CONFIG_ARCH_BOARD_TM4C1294_LAUNCHPAD=y +CONFIG_ARCH_CHIP_TIVA=y +CONFIG_ARCH_CHIP_TM4C1294NC=y +CONFIG_ARCH_CHIP_TM4C129=y +CONFIG_ARCH_CHIP_TM4C=y +CONFIG_ARCH_STACKDUMP=y CONFIG_BOARD_LOOPSPERMSEC=11401 CONFIG_BUILTIN=y CONFIG_EXAMPLES_NSH=y @@ -19,24 +19,24 @@ CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBM=y CONFIG_MAX_TASKS=16 CONFIG_MAX_WDOGPARMS=2 -CONFIG_NET_ARP_IPIN=y -CONFIG_NET_ARP_SEND=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_ICMP=y -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_SOLINGER=y -CONFIG_NET_STATISTICS=y -CONFIG_NET_TCP_WRITE_BUFFERS=y -CONFIG_NET_TCP=y -CONFIG_NET_TCPBACKLOG=y -CONFIG_NET_UDP=y CONFIG_NET=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y diff --git a/configs/tm4c1294-launchpad/scripts/ld.script b/configs/tm4c1294-launchpad/scripts/ld.script index c47cb099a8..5b8232a298 100644 --- a/configs/tm4c1294-launchpad/scripts/ld.script +++ b/configs/tm4c1294-launchpad/scripts/ld.script @@ -44,6 +44,7 @@ MEMORY } OUTPUT_ARCH(arm) +EXTERN(_vectors) ENTRY(_stext) SECTIONS