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Correct last set of changes to configuration logic

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4237 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-29 12:52:15 +00:00
parent b3ef59da0f
commit ae1ea6d5f9
2 changed files with 35 additions and 4 deletions
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30
arch/arm/src/stm32/stm32_gpio.c
View File

@ -47,6 +47,8 @@
#include <errno.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "chip.h"
@ -202,7 +204,12 @@ static inline void stm32_gpioremap(void)
* Based on configuration within the .config file, it does:
* - Remaps positions of alternative functions.
*
* Typically called from stm32_start().
* Typically called from stm32_start().
*
* Assumptions:
* This function is called early in the initialization sequence so that
* no mutual exlusion is necessary.
*
****************************************************************************/
void stm32_gpioinit(void)
@ -244,6 +251,7 @@ int stm32_configgpio(uint32_t cfgset)
unsigned int pin;
unsigned int pos;
unsigned int modecnf;
irqstate_t flags;
bool input;
/* Verify that this hardware supports the select GPIO port */
@ -278,6 +286,12 @@ int stm32_configgpio(uint32_t cfgset)
input = ((cfgset & GPIO_INPUT) != 0);
/* Interrupts must be disabled from here on out so that we have mutually
* exclusive access to all of the GPIO configuration registers.
*/
flags = irqsave();
/* Decode the mode and configuration */
regval = getreg32(cr);
@ -316,6 +330,7 @@ int stm32_configgpio(uint32_t cfgset)
{
/* Its an alternate function pin... we can return early */
irqrestore(flags);
return OK;
}
}
@ -342,6 +357,7 @@ int stm32_configgpio(uint32_t cfgset)
{
/* Neither... we can return early */
irqrestore(flags);
return OK;
}
}
@ -367,6 +383,8 @@ int stm32_configgpio(uint32_t cfgset)
regval = getreg32(regaddr);
regval |= (1 << pin);
putreg32(regval, regaddr);
irqrestore(flags);
return OK;
}
#endif
@ -386,6 +404,7 @@ int stm32_configgpio(uint32_t cfgset)
unsigned int pin;
unsigned int pos;
unsigned int pinmode;
irqstate_t flags;
/* Verify that this hardware supports the select GPIO port */
@ -427,6 +446,14 @@ int stm32_configgpio(uint32_t cfgset)
break;
}
/* Interrupts must be disabled from here on out so that we have mutually
* exclusive access to all of the GPIO configuration registers.
*/
flags = irqsave();
/* Now apply the configuration to the mode register */
regval = getreg32(base + STM32_GPIO_MODER_OFFSET);
regval &= ~GPIO_MODER_MASK(pin);
regval |= ((uint32_t)pinmode << GPIO_MODER_SHIFT(pin));
@ -572,6 +599,7 @@ int stm32_configgpio(uint32_t cfgset)
stm32_gpiowrite(cfgset, value);
}
irqrestore(flags);
return OK;
}
#endif

9
arch/mips/src/pic32mx/pic32mx-usbdev.c
View File

@ -5,9 +5,12 @@
* Author: Gregory Nutt <gnutt@nuttx.orgr>
*
* References:
* - This file derives from the STM32 USB device driver
* This file derives from the STM32 USB device driver with modifications
* based on additional information from:
*
* - "USB On-The-Go (OTG)", DS61126E, Microchip Technology Inc., 2009
* - Sample code provided with the Sure Electronics PIC32 board.
* - Sample code provided with the Sure Electronics PIC32 board
* (which seems to have derived from Microchip PICDEM PIC18 code).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -2010,7 +2013,7 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t status)
/* Check the current EP0 OUT buffer contains a SETUP packet */
if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == USB_SETUP_TOKEN)
if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == USB_PID_SETUP_TOKEN)
{
/* Check if the SETUP transaction data went into the priv->ctrl
* buffer. If not, then we will need to copy it.