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arm64/arm64_boot.c: Fix exception caused by accesses to ICC_SRE_EL3 when GICv3 was not implemented

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zouboan 2024-07-14 20:54:56 +08:00 committed by Xiang Xiao
parent 84f4bd6ec1
commit ae8ce535f3
1 changed files with 2 additions and 0 deletions
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2
arch/arm64/src/common/arm64_boot.c
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@ -89,6 +89,7 @@ void arm64_boot_el3_init(void)
SCR_SMD_BIT); /* Do not trap SMC */ SCR_SMD_BIT); /* Do not trap SMC */
write_sysreg(reg, scr_el3); write_sysreg(reg, scr_el3);
#if CONFIG_ARM64_GIC_VERSION > 2
reg = read_sysreg(ICC_SRE_EL3); reg = read_sysreg(ICC_SRE_EL3);
reg |= (ICC_SRE_ELX_DFB_BIT | /* Disable FIQ bypass */ reg |= (ICC_SRE_ELX_DFB_BIT | /* Disable FIQ bypass */
ICC_SRE_ELX_DIB_BIT | /* Disable IRQ bypass */ ICC_SRE_ELX_DIB_BIT | /* Disable IRQ bypass */
@ -96,6 +97,7 @@ void arm64_boot_el3_init(void)
ICC_SRE_EL3_EN_BIT); /* Enables lower Exception level access to ICC_SRE_EL3_EN_BIT); /* Enables lower Exception level access to
* ICC_SRE_EL1 */ * ICC_SRE_EL1 */
write_sysreg(reg, ICC_SRE_EL3); write_sysreg(reg, ICC_SRE_EL3);
#endif
ARM64_ISB(); ARM64_ISB();
} }