Changes necessary to start build

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1757 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/include/lm3s/irq.h

@@ -56,7 +56,7 @@
  * exceptions)
  */
 
-#ifdef CONFIG_CHIP_LM3S6918
+#ifdef CONFIG_ARCH_CHIP_LM3S6918
                                   /* Vector 0-15: Processor exceptions */
 #  define LM3S_IRQ_GPIOA      (0) /* Vector 16: GPIO Port A */
 #  define LM3S_IRQ_GPIOB      (1) /* Vector 17: GPIO Port B */

arch/arm/src/lm3s/Make.defs

@@ -0,0 +1,48 @@
+############################################################################
+# arch/arm/src/lm3s/Make.defs
+#
+#   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+HEAD_ASRC	= 
+
+CMN_ASRCS	= 
+CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
+		  up_dataabort.c up_mdelay.c up_udelay.c up_exit.c up_idle.c \
+		  up_initialize.c up_initialstate.c up_interruptcontext.c \
+		  up_prefetchabort.c up_releasepending.c up_releasestack.c \
+		  up_reprioritizertr.c up_schedulesigaction.c \
+		  up_sigdeliver.c up_syscall.c up_unblocktask.c \
+		  up_undefinedinsn.c up_usestack.c
+
+CHIP_ASRCS	= 
+CHIP_CSRCS	= 

arch/arm/src/lm3s/lm3s_memorymap.h

@@ -49,7 +49,7 @@
 
 /* Memory map ***********************************************************************/
  
-#ifdef CONFIG_CHIP_LM3S6918
+#ifdef CONFIG_ARCH_CHIP_LM3S6918
 #  define LM3S_FLASH_BASE     0x00000000 /* -0x0003ffff: On-chip FLASH */
                                          /* -0x1fffffff: Reserved */
 #  define LM3S_SRAM_BASE      0x20000000 /* -0x2000ffff: Bit-banded on-chip SRAM */
@@ -74,7 +74,7 @@
 
 /* Peripheral base addresses ********************************************************/
 
-#ifdef CONFIG_CHIP_LM3S6918
+#ifdef CONFIG_ARCH_CHIP_LM3S6918
 /* FiRM Peripheral Base Addresses */
 
 #  define LM3S_WDOG_BASE      (LM3S_FPERIPH_BASE + 0x00000) /* -0x00fff: Watchdog Timer */