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Initial lpc214x support

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@193 42af7a65-404d-4744-a932-0658087f49c3
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patacongo 2007-04-29 21:29:30 +00:00
parent 7650adc284
commit af000ee096
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arch/arm/include/lpc214x/irq.h Normal file
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/************************************************************
* arch/lpc214x/irq.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_LPC214X_IRQ_H
#define __ARCH_LPC214X_IRQ_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/* LPC214X Interrupts */
#define NR_IRQS 16
/************************************************************
* Public Types
************************************************************/
/************************************************************
* Inline functions
************************************************************/
/************************************************************
* Public Variables
************************************************************/
/************************************************************
* Public Function Prototypes
************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_LPC214X_IRQ_H */

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arch/arm/src/lpc214x/Make.defs Normal file
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############################################################################
# lpc214x/Make.defs
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
HEAD_ASRC = lpc214x_head.S
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_vectors.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
up_createstack.c up_dataabort.c up_delay.c up_exit.c \
up_idle.c up_initialize.c up_initialstate.c \
up_interruptcontext.c up_prefetchabort.c up_releasepending.c \
up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
up_sigdeliver.c up_syscall.c up_unblocktask.c \
up_undefinedinsn.c up_usestack.c
CHIP_ASRCS = lpc214x_lowputc.S
CHIP_CSRCS = lpc214x_decodeirq.c lpc214x_irq.c lpc214x_timerisr.c

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arch/arm/src/lpc214x/README.txt Normal file
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General Description
^^^^^^^^^^^^^^^^^^^
http://www.nxp.com/pip/LPC2141FBD64.html:
The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S
CPU with real-time emulation and embedded trace support, that combine
microcontroller with embedded high-speed flash memory ranging from 32 kB to
512 kB. A 128-bit wide memory interface and a unique accelerator architecture
enable 32-bit code execution at the maximum clock rate. For critical code size
applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct
with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2141/42/44/46/48 are ideal
for applications where miniaturization is a key requirement, such as access
control and point-of-sale. Serial communications interfaces ranging from a USB 2.0
Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of 8 kB
up to 40 kB, make these devices very well suited for communication gateways and
protocol converters, soft modems, voice recognition and low end imaging, providing
both large buffer size and high processing power. Various 32-bit timers, single
or dual 10-bit ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up
to nine edge or level sensitive external interrupt pins make these microcontrollers
suitable for industrial control and medical systems.
Features
^^^^^^^^
o 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
o 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory.
128-bit wide interface/accelerator enables high-speed 60 MHz operation.
o In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot
loader software. Single flash sector or full chip erase in 400 ms and programming
of 256 B in 1 ms.
o EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software and high-speed tracing of instruction execution.
o USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition,
the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA.
o One or two (LPC2141/42 vs. LPC2144/46/48) 10-bit ADCs provide a total of 6/14 analog
inputs, with conversion times as low as 2.44 us per channel.
o Single 10-bit DAC provides variable analog output (LPC2142/44/46/48 only).
o Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
o Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.
o Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400
kbit/s), SPI and SSP with buffering and variable data length capabilities.
o Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
o Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.
o Up to 21 external interrupt pins available.
o 60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 us.
o On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz.
o Power saving modes include Idle and Power-down.
o Individual enable/disable of peripheral functions as well as peripheral clock scaling
for additional power optimization.
o Processor wake-up from Power-down mode via external interrupt or BOD.
o Single power supply chip with POR and BOD circuits:
o CPU operating voltage range of 3.0 V to 3.6 V (3.3 V +- 10 pct) with 5 V tolerant
I/O pads.

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arch/arm/src/lpc214x/Startup.s Normal file
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/*
* The STARTUP.S code is executed after CPU Reset. This file may be
* translated with the following SET symbols. In uVision these SET
* symbols are entered under Options - ASM - Set.
*
* REMAP: when set the startup code initializes the register MEMMAP
* which overwrites the settings of the CPU configuration pins. The
* startup and interrupt vectors are remapped from:
* 0x00000000 default setting (not remapped)
* 0x80000000 when EXTMEM_MODE is used
* 0x40000000 when RAM_MODE is used
*
* EXTMEM_MODE: when set the device is configured for code execution
* from external memory starting at address 0x80000000. The startup
* vectors are located to 0x80000000.
*
* RAM_MODE: when set the device is configured for code execution
* from on-chip RAM starting at address 0x40000000. The startup
* vectors are located to 0x40000000.
*/
Reset_Handler:
/* Memory Mapping */
/* Setup Stack for each mode */
ldr r0, =Top_Stack
/* Enter Undefined Instruction Mode and set its Stack Pointer */
msr CPSR_c, #UND_MODE | PSR_I_BIT | PSR_F_BIT
mov SP, r0
sub r0, r0, #UND_Stack_Size
/* Enter Abort Mode and set its Stack Pointer */
msr CPSR_c, #ABT_MODE | PSR_I_BIT | PSR_F_BIT
mov SP, r0
sub r0, r0, #ABT_Stack_Size
/* Enter FIQ Mode and set its Stack Pointer */
msr CPSR_c, #FIQ_MODE | PSR_I_BIT | PSR_F_BIT
mov SP, r0
sub r0, r0, #FIQ_Stack_Size
/* Enter IRQ Mode and set its Stack Pointer */
msr CPSR_c, #IRQ_MODE | PSR_I_BIT | PSR_F_BIT
mov SP, r0
sub r0, r0, #IRQ_Stack_Size
/* Enter Supervisor Mode and set its Stack Pointer */
msr CPSR_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT
mov SP, r0
sub r0, r0, #SVC_Stack_Size
/* Enter User Mode and set its Stack Pointer */
msr CPSR_c, #USR_MODE
mov SP, r0
/* Enter the C code */
ldr r0,=?C?INIT
tst r0,#1 ; Bit-0 set: INIT is Thumb
ldreq LR,=exit?A ; ARM Mode
ldrne LR,=exit?T ; Thumb Mode
bx r0
ENDP
PUBLIC exit?A
exit?A PROC CODE32
B exit?A
ENDP
PUBLIC exit?T
exit?T PROC CODE16
exit: B exit?T
ENDP
END

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/************************************************************************************
* lpc214x/chip.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __LPC214X_CHIP_H
#define __LPC214X_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
/* Memory Map ***********************************************************************/
#define LPC214X_FLASH_BASE 0x00000000
#define LPC214X_ONCHIP_RAM_BASE 0x40000000
#define LPC214X_EXTMEM_BASE 0x80000000
/* Interrupts **********************************************************************/
/* Peripheral Registers ************************************************************/
/* Register block base addresses */
#define LPC214X_MAM_BASE 0xe01fc000 /* Memory Accelerator Module (MAM) Base Address */
#define LPC214X_MEMMAP 0xe01fc040 /* Memory Mapping Control */
#define LPC214X_PLL_BASE 0xe01fc080 /* Phase Locked Loop (PLL) Base Address */
#define LPC214X_VPBDIV 0xe01fc100 /* VPBDIV Address */
#define LPC214X_PINSEL2 0xe002c014 /* PINSEL2 Address */
#define LPC214X_EMC_BASE 0xffe00000 /* External Memory Controller (EMC) Base Address */
/* Memory Accelerator Module (MAM) Regiser Offsets */
#define LPC214X_MAMCR_OFFSET 0x00 /* MAM Control Offset*/
#define LPC214x_MAMTIM_OFFSET 0x04 /* MAM Timing Offset */
/* Phase Locked Loop (PLL) register offsets */
#define LPC214X_PLLCON_OFFSET 0x00 /* PLL Control Offset*/
#define LPC214X_PLLCFG_OFFSET 0x04 /* PLL Configuration Offset */
#define LPC214X_PLLSTAT_OFFSET 0x08 /* PLL Status Offset */
#define LPC214X_PLLFEED_OFFSET 0x0c /* PLL Feed Offset */
/* PLL Control Register Bit Settings */
#define LPC214X_PLLCON_PLLE (1<<0) /* PLL Enable */
#define LPC214X_PLLCON_PLLC (1<<1) /* PLL Connect */
/* PLL Configuration Register Bit Settings */
#define LPC214X_PLLCFG_MSEL (0x1f<<0) /* PLL Multiplier */
#define LPC214X_PLLCFG_PSEL (0x03<<5) /* PLL Divider */
#define LPC214X_PLLSTAT_PLOCK (1<<10) /* PLL Lock Status */
/* External Memory Controller (EMC) definitions */
#define LPC214X_BCFG0_OFFSET 0x00 /* BCFG0 Offset */
#define LPC214X_BCFG1_OFFSET 0x04 /* BCFG1 Offset */
#define LPC214X_BCFG2_OFFSET 0x08 /* BCFG2 Offset */
#define LPC214X_BCFG3_OFFSET 0x0c /* BCFG3 Offset */
/************************************************************************************
* Definitions
************************************************************************************/
/************************************************************************************
* Inline Functions
************************************************************************************/
/************************************************************************************
* Global Function Prototypes
************************************************************************************/
#endif /* __LPC214X_CHIP_H */

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arch/arm/src/lpc214x/lpc214x_decodeirq.c Normal file
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/********************************************************************************
* lpc214x/lpc214x_decodeirq.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************/
/********************************************************************************
* Included Files
********************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <assert.h>
#include <debug.h>
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
/********************************************************************************
* Definitions
********************************************************************************/
/********************************************************************************
* Public Data
********************************************************************************/
/********************************************************************************
* Private Data
********************************************************************************/
/********************************************************************************
* Private Functions
********************************************************************************/
/********************************************************************************
* Public Funtions
********************************************************************************/
void up_decodeirq(uint32* regs)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
lib_lowprintf("Unexpected IRQ\n");
current_regs = regs;
PANIC(OSERR_ERREXCEPTION);
#else
/* Decode the interrupt. First, fetch the interrupt id register. */
int irq = 0;
#warning "Need to decode the interrupt here"
/* Verify that the resulting IRQ number is valie */
if ((unsigned)irq < NR_IRQS)
{
/* Mask and acknowledge the interrupt */
up_maskack_irq(irq);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
*/
current_regs = regs;
/* Deliver the IRQ */
irq_dispatch(irq, regs);
/* Indicate that we are no long in an interrupt handler */
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
up_enable_irq(irq);
}
#endif
}

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/********************************************************************
* lpc214x/lpc214x_head.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************/
/********************************************************************
* Included Files
********************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "up_arch.h"
/********************************************************************
* Definitions
********************************************************************/
/* This file holds the NuttX start logic that runs when the LPC2148
* is reset. This logic must be located at address 0x0000:0000 in
* flash but may be linked to run at different locations based on
* the selected mode:
*
* default: Executes from 0x0000:0000. In non-default modes, the
* MEMAP register is set override the settings of the CPU configuration
* pins.
*
* CONFIG_EXTMEM_MODE: Code executes from external memory starting at
* address 0x8000:0000.
*
* CONFIG_RAM_MODE: Code executes from on-chip RAM at address
* 0x4000:0000.
*
* Starupt Code must be linked to run at the correct address
* corresponding to the selected mode.
*/
#if defined(CONFIG_EXTMEM_MODE)
# if CONFIG_CODE_BASE != LPC214X_EXTMEM_BASE
# error "CONFIG_CODE_BASE must be 0x80000000 in EXTMEM mode"
# endif
#elif defined(CONFIG_RAM_MODE)
# if CONFIG_CODE_BASE != LPC214X_ONCHIP_RAM_BASE
# error "CONFIG_CODE_BASE must be 0x40000000 in EXTMEM mode"
# endif
#else
# if CONFIG_CODE_BASE != LPC214X_FLASH_BASE
# error "CONFIG_CODE_BASE must be 0x00000000 in default mode"
# endif
#endif
/* Phase Locked Loop (PLL) initialization values
*
* <e> PLL Setup
* <i>
* <i> CCLK - Processor Clock
* <i> Fcco - PLL Oscillator
* <o1.0..4> MSEL: PLL Multiplier Selection
* <1-32><#-1>
* <i> PLL Multiplier "M" Value
* <i> CCLK = M * Fosc
* <o1.5..6> PSEL: PLL Divider Selection
* <0=> 1 <1=> 2 <2=> 4 <3=> 8
* <i> PLL Divider "P" Value
* <i> Fcco = CCLK * 2 * P
* <i> 156MHz <= Fcco <= 320MHz
* </e>
*/
#defin LPC214X_PLLCFG_VALUE 0x00000024
/* Memory Accelerator Module (MAM) initialization values
*
* MAM Control Register
* BIT 0:1 Mode
* 0 = Disabled
* 1 = Partially Enabled
* 2 = Fully Enabled
* MAM Timing Register
* BIT 0:2 Fetch Cycles
* 0 = Reserved
* 1 = 1
* 2 = 2
* 3 = 3
* 4 = 4
* 5 = 5
* 6 = 6
* 7 = 7
*/
#define LPC214X_MAMCR_VALUE 0x00000002
#define LPC214x_MAMTIM_VALUE 0x00000004
/* VPBDIV initialization values
*
* BITS 0:1 VPB Peripheral Bus Clock Rate
* 0 = VPB Clock = CPU Clock / 4
* 1 = VPB Clock = CPU Clock
* 2 = VPB Clock = CPU Clock / 2
* BITS 4:5 XCLKDIV: XCLK Pin
* 0 = XCLK Pin = CPU Clock / 4
* 1 = XCLK Pin = CPU Clock
* 2 = XCLK Pin = CPU Clock / 2
*/
#define LPC214X_VPBDIV_VALUE 0x00000001
/* External Memory Pins definitions
*
* CS0..3, OE, WE, BLS0..3, D0..31, A2..23, JTAG Pins
*/
#define LPC214X_PINSEL2_VALUE 0x0e6149e4
/* External Memory Controller (EMC) initialization values
*
* Bank Configuration n (BCFG0..3)
* BIT 0:3 IDCY: Idle Cycles (0-15)
* BIT 5:9 WST1: Wait States 1 (0-31)
* BIT 11:15 WST2: Wait States 2 (0-31)
* BIT 10 RBLE: Read Byte Lane Enable
* BIT 26 WP: Write Protect
* BIT 27 BM: Burst ROM
* BIT 28:29 MW: Memory Width (0=8-bit 1=16-bit 2=32-bit 3=Reserved)
*/
#define LPC214X_BCFG0_VALUE 0x0000fbef
#define LPC214X_BCFG1_VALUE 0x0000fbef
#define LPC214X_BCFG2_VALUE 0x0000fbef
#define LPC214X_BCFG3_VALUE 0x0000fbef
/********************************************************************
* Macros
********************************************************************/
/* Print a character on the UART to show boot status. This macro will
* modify r0, r1, r2 and r14
*/
.macro showprogress, code
#ifdef CONFIG_DEBUG
mov r0, #\code
bl up_lowputc
#endif
.endm
/* Configured the PINSEL2 register if EXTMEM mode is selected */
.macro configpinsel2, base, val
#ifdef CONFIG_EXTMEM_MODE
ldr \base, =LPC214X_PINSEL2
ldr \val, =LPC214X_PINSEL2_VALUE
str \val, [\base]
#endif
.endm
/* Configure the external memory controller */
.macro configemc, base, val
#ifdef CONFIG_EMC_SETUP
ldr \base, =LPC214X_EMC_BASE
#ifdef CONFIG_BCFG0_SETUP
ldr \val, =LPC214X_BCFG0_VALUE
str \val, [\base, #LPC214X_BCFG0_OFFSET]
#endif
#ifdef CONFIG_BCFG1_SETUP
ldr \val, =LPC214X_BCFG1_VALUE
str \val, [\base, #LPC214X_BCFG1_OFFSET]
#endif
#ifdef CONFIG_BCFG2_SETUP
ldr \val, =LPC214X_BCFG2_VALUE
str \val, [\base, #LPC214X_BCFG2_OFFSET]
#endif
#ifdef CONFIG_BCFG3_SETUP
ldr \val, =LPC214X_BCFG3_VALUE
str \val, [\base, #LPC214X_BCFG3_OFFSET]
#endif
#endif
.endm
/* Configure VPBDIV */
.macro configvpbdiv, base, val
#ifdef CONFIG_VPBDIV_SETUP
ldr \base, =LPC214X_VPBDIV
ldr \val, =LPC214X_VPBDIV_VALUE
str \val, [\base]
#endif
.endm
/* Configure the PLL */
.macro configpll, base, val1, val2, val3
#ifdef LPC214X_PLL_SETUP
ldr \base, =LPC214X_PLL_BASE
mov \val1, #0xaa
mov \val2, #0x55
/* Configure and Enable PLL */
mov \val3, #LPC214X_PLLCFG_VALUE
str \val3, [\base, #LPC214X_PLLCFG_OFFSET]
mov \val3, #LPC214X_PLLCON_PLLE
str \val3, [\base, #LPC214X_PLLCON_OFFSET]
str \val1, [\base, #LPC214X_PLLFEED_OFFSET]
str \val2, [\base, #LPC214X_PLLFEED_OFFSET]
/* Wait until PLL Locked */
1:
ldr \val3, [\base, #LPC214X_PLLSTAT_OFFSET]
ands \val3, \val3, #LPC214X_PLLSTAT_PLOCK
beq 1b
/* Switch to PLL Clock */
mov \val3, #(LPC214X_PLLCON_PLLE | LPC214X_PLLCON_PLLC)
str \val3, [\base, #LPC214X_PLLCON__OFFSET]
str \val1, [\base, #LPC214X_PLLFEED_OFFSET]
str \val2, [\base, #LPC214X_PLLFEED_OFFSET]
#endif
.endm
/* Configure the Memory Accelerator Module (MAM) */
.macro configmam, base, val
#ifdef CONFIG_MAM_SETUP
ldr \base, =LPC214X_MAM_BASE
mov \val, #LPC214x_MAMTIM_VALUE
str \val, [\base, #LPC214x_MAMTIM_OFFSET]
mov \val, #LPC214X_MAMCR_VALUE
str \val, [\base, #LPC214X_MAMCR_OFFSET]
#endif
.endm
/* Setup MEMMAP for the selected mode of operation */
.macro configmemmap, base, val
ldr r0, =LPC214X_MEMMAP
#if defined(CONFIG_EXTMEM_MODE)
mov r1, #3
#elif defined(CONFIG_RAM_MODE)
mov r1, #2
#else /* Setting the default should not be necessary */
mov r1, #1
#endif
str r1, [r0]
.endm
/********************************************************************
* Text
********************************************************************/
.text
/********************************************************************
* Name: _vector_table
*
* Description:
* Interrrupt vector table. This must be located at the beginning
* of the memory space (at CONFIG_CODE_BASE). The first entry in
* the vector table is the reset vector and this is the code that
* will execute whn the processor is reset.
*
********************************************************************/
.globl _vector_table
.type _vector_table, %function
_vector_table:
ldr pc, .Lresethandler /* 0x00: Reset */
ldr pc, .Lundefinedhandler /* 0x04: Undefined instruction */
ldr pc, .Lswihandler /* 0x08: Software interrupt */
ldr pc, .Lprefetchaborthandler /* 0x0c: Prefetch abort */
ldr pc, .Ldataaborthandler /* 0x10: Data abort */
ldr pc, .Laddrexcptnhandler /* 0x14: Address exception */
ldr pc, .Lirqhandler /* 0x18: IRQ */
ldr pc, .Lfiqhandler /* 0x1c: FIQ */
.globl __start
.globl up_vectorundefinsn
.globl up_vectorswi
.globl up_vectorprefetch
.globl up_vectordata
.globl up_vectoraddrexcptn
.globl up_vectorirq
.globl up_vectorfiq
.Lresethandler:
.long __start
.Lundefinedhandler:
.long up_vectorundefinsn
.Lswihandler:
.long up_vectorswi
.Lprefetchaborthandler:
.long up_vectorprefetch
.Ldataaborthandler:
.long up_vectordata
.Laddrexcptnhandler:
.long up_vectoraddrexcptn
.Lirqhandler:
.long up_vectorirq
.Lfiqhandler:
.long up_vectorfiq
.size _vector_table, . - _vector_table
.end
/********************************************************************
* Name: __start
*
* Description:
* Reset entry point. This is the first function to execute when
* the processor is reset. It initializes hardware and then gives
* control to NuttX.
*
********************************************************************/
.global __start
.type __start, #function
__start:
/* Setup the initial processor mode */
mov r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT )
msr cpsr, r0
/* Set up external memory mode (if so selected) */
configpinsel2 r0, r1
/* Setup the External Memory Controllor (EMC) as configured */
configemc r0, r1
/* Configure VPBDIV */
configvpbdiv r0, r1
/* Configure the PLL */
configpll r0, r1, r2, r3
/* Configure the Memory Accelerator Module (MAM) */
configmam r0, r1
/* Setup MEMMAP for the selected mode of operation */
configmemmap r0, r1
showprogress 'A'
/* Setup system stack (and get the BSS range) */
adr r0, LC0
ldmia r0, {r4, r5, sp}
/* Clear system BSS section */
mov r0, #0
1: cmp r4, r5
strcc r0, [r4], #4
bcc 1b
showprogress 'B'
/* Copy system .data sections to new home in RAM. */
#ifdef CONFIG_BOOT_FROM_FLASH
adr r3, LC2
ldmia r3, {r0, r1, r2}
1: ldmia r0!, {r3 - r10}
stmia r1!, {r3 - r10}
cmp r1, r2
blt 1b
#endif
/* Perform early serial initialization */
mov fp, #0
bl up_earlyserialinit
#ifdef CONFIG_DEBUG
mov r0, #'C'
bl up_putc
mov r0, #'\n'
bl up_putc
#endif
/* Initialize onboard LEDs */
#ifdef CONFIG_ARCH_LEDS
bl up_ledinit
#endif
/* Then jump to OS entry */
b os_start
/* Variables:
* _sbss is the start of the BSS region (see ld.script)
* _ebss is the end of the BSS regsion (see ld.script)
* The idle task stack starts at the end of BSS and is
* of size CONFIG_PROC_STACK_SIZE. The heap continues
* from there until the end of memory. See g_heapbase
* below.
*/
LC0: .long _sbss
.long _ebss
.long _ebss+CONFIG_PROC_STACK_SIZE-4
#ifdef CONFIG_BOOT_FROM_FLASH
LC2: .long _eronly /* Where .data defaults are stored in FLASH */
.long _sdata /* Where .data needs to reside in SDRAM */
.long _edata
#endif
.size __start, .-__start
/* This global variable is unsigned long g_heapbase and is
* exported from here only because of its coupling to LCO
* above.
*/
.data
.align 4
.globl g_heapbase
.type g_heapbase, object
g_heapbase:
.long _ebss+CONFIG_PROC_STACK_SIZE
.size g_heapbase, .-g_heapbase
.end

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/************************************************************
* lpc214x/lpc214x_irq.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Public Data
************************************************************/
uint32 *current_regs;
/************************************************************
* Private Data
************************************************************/
/************************************************************
* Private Functions
************************************************************/
/************************************************************
* Public Funtions
************************************************************/
/************************************************************
* Name: up_irqinitialize
************************************************************/
void up_irqinitialize(void)
{
#warning "Not implemented"
}
/************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
************************************************************/
void up_disable_irq(int irq)
{
#warning "Not implemented"
}
/************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
************************************************************/
void up_enable_irq(int irq)
{
#warning "Not implemented"
}
/************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
************************************************************/
void up_maskack_irq(int irq)
{
#warning "Not implemented"
}

91
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/**************************************************************************
* lpc214x/lpc214X_lowputc.S
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/**************************************************************************
* Included Files
**************************************************************************/
#include <nuttx/config.h>
#include "up_internal.h"
#include "up_arch.h"
/**************************************************************************
* Private Definitions
**************************************************************************/
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Global Variables
**************************************************************************/
/**************************************************************************
* Private Variables
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
/**************************************************************************
* Name: up_lowputc
**************************************************************************/
/* This assembly language version has the advantage that it can does not
* require a C stack and uses only r0-r1. Hence it can be used during
* early boot phases.
*/
.text
.global up_lowputc
.type up_lowputc, function
up_lowputc:
/* On entry, r0 holds the character to be printed */
#warning "Not implemented"
/* And return */
mov pc, lr
.end

94
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/************************************************************
* lpc214x/lpc214x_timerisr.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/************************************************************
* Included Files
************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "clock_internal.h"
#include "up_internal.h"
#include "up_arch.h"
/************************************************************
* Definitions
************************************************************/
/************************************************************
* Private Types
************************************************************/
/************************************************************
* Private Function Prototypes
************************************************************/
/************************************************************
* Global Functions
************************************************************/
/************************************************************
* Function: up_timerisr
*
* Description:
* The timer ISR will perform a variety of services for
* various portions of the systems.
*
************************************************************/
int up_timerisr(int irq, uint32 *regs)
{
/* Process timer interrupt */
sched_process_timer();
return 0;
}
/************************************************************
* Function: up_timerinit
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
*
************************************************************/
void up_timerinit(void)
{
#warning "Not implemented"
}