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arch/arm/src/stm32 and stm32l4: In 1wire driver, do not write useless WRITEBIT zero return value to const buffer

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This commit is contained in:
Juha Niskanen 2018-04-04 11:08:52 -06:00 committed by Gregory Nutt
parent a71aa070e7
commit af5bcc0c13
2 changed files with 8 additions and 14 deletions
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11
arch/arm/src/stm32/stm32_1wire.c
View File

@ -981,15 +981,12 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
stm32_1wire_send(priv, READ_TX);
break;
case ONEWIRETASK_WRITEBIT:
*priv->byte = 0;
priv->msgs = NULL;
priv->result = OK;
nxsem_post(&priv->sem_isr);
break;
case ONEWIRETASK_READBIT:
*priv->byte = (dr == READ_RX1) ? 1 : 0;
/* Fall through */
case ONEWIRETASK_WRITEBIT:
priv->msgs = NULL;
priv->result = OK;
nxsem_post(&priv->sem_isr);

11
arch/arm/src/stm32l4/stm32l4_1wire.c
View File

@ -906,15 +906,12 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
stm32_1wire_send(priv, READ_TX);
break;
case ONEWIRETASK_WRITEBIT:
*priv->byte = 0;
priv->msgs = NULL;
priv->result = OK;
nxsem_post(&priv->sem_isr);
break;
case ONEWIRETASK_READBIT:
*priv->byte = (dr == READ_RX1) ? 1 : 0;
/* Fall through */
case ONEWIRETASK_WRITEBIT:
priv->msgs = NULL;
priv->result = OK;
nxsem_post(&priv->sem_isr);