Squashed commit of the following:
cc1101: Changes from review of last PR. remove gpio remove cc1101 frame len remove FLAGS_RXONLY flags add cc1101 function remove some waring add cc1101 poll function add cc1101 register add cc1101 isr read data add cc1101 spi deviceId add cc1101 init2 add wait cc1101 chip ready raw init cc1101
This commit is contained in:
parent
160931ba72
commit
afe5f706f6
@ -55,6 +55,10 @@ CSRCS += stm32_io.c
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endif
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endif
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ifeq ($(CONFIG_WL_CC1101),y)
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CSRCS += stm32_cc1101.c
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endif
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ifeq ($(CONFIG_ADC),y)
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CSRCS += stm32_adc.c
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ifeq ($(CONFIG_AJOYSTICK),y)
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@ -1,7 +1,7 @@
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/************************************************************************************
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* configs/nucleo-l476rg/src/nucleo-l476rg.h
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*
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* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2014, 2016, 2018 Gregory Nutt. All rights reserved.
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* Authors: Frank Bennett
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* Gregory Nutt <gnutt@nuttx.org>
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* Sebastien Lorquet <sebastien@lorquet.fr>
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@ -166,6 +166,16 @@
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GPIO_PORTB | GPIO_PIN6)
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#endif
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#ifdef CONFIG_WL_CC1101
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# define GPIO_CC1101_PWR (GPIO_PORTC | GPIO_PIN6 | GPIO_OUTPUT_SET | \
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GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
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# define GPIO_CC1101_CS (GPIO_PORTB | GPIO_PIN12 | GPIO_OUTPUT_SET | \
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GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
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# define GPIO_CC1101_MISO (GPIO_PORTB | GPIO_PIN14)
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# define GPIO_CC1101_GDO2 (GPIO_PORTC | GPIO_PIN10 | \
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GPIO_EXTI | GPIO_SPEED_50MHz)
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#endif
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#ifdef HAVE_MMCSD
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# define GPIO_SPI_CS_SD_CARD_OFF \
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(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
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@ -387,4 +397,16 @@ int board_timer_driver_initialize(FAR const char *devpath, int timer);
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int stm32l4_qencoder_initialize(FAR const char *devpath, int timer);
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#endif
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/****************************************************************************
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* Name: stm32_cc1101_initialize
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*
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* Description:
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* Initialize and register the cc1101 radio driver
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*
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****************************************************************************/
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#ifdef CONFIG_WL_CC1101
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int stm32_cc1101_initialize(void);
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#endif
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#endif /* __CONFIGS_NUCLEO_L476RG_SRC_NUCLEO_L476RG_H */
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@ -173,7 +173,7 @@ int board_app_initialize(uintptr_t arg)
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/* Now bind the SDIO interface to the MMC/SD driver */
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ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdio);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
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@ -214,7 +214,7 @@ int board_app_initialize(uintptr_t arg)
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/* Initialize and register the joystick driver */
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ret = board_ajoy_initialize();
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the joystick driver: %d\n",
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@ -227,7 +227,7 @@ int board_app_initialize(uintptr_t arg)
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/* Initialize and register the timer driver */
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ret = board_timer_driver_initialize("/dev/timer0", 2);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the timer driver: %d\n",
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@ -237,7 +237,6 @@ int board_app_initialize(uintptr_t arg)
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#endif
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#ifdef CONFIG_SENSORS_QENCODER
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/* Initialize and register the qencoder driver */
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index = 0;
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@ -245,7 +244,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM1_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 1);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -257,7 +256,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM2_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 2);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -269,7 +268,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM3_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 3);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -281,7 +280,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM4_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 4);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -293,7 +292,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM5_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 5);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -305,7 +304,7 @@ int board_app_initialize(uintptr_t arg)
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#ifdef CONFIG_STM32L4_TIM8_QE
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sprintf(buf, "/dev/qe%d", index++);
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ret = stm32l4_qencoder_initialize(buf, 8);
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if (ret != OK)
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: Failed to register the qencoder: %d\n",
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@ -313,7 +312,19 @@ int board_app_initialize(uintptr_t arg)
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return ret;
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}
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#endif
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#endif /* CONFIG_SENSORS_QENCODER */
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#ifdef CONFIG_WL_CC1101
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/* Initialize and register the cc1101 radio */
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ret = stm32_cc1101_initialize();
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if (ret < 0)
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{
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syslog(LOG_ERR,
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"ERROR: stm32_cc1101_initialize failed: %d\n",
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ret);
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return ret;
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}
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#endif
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UNUSED(ret);
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@ -339,4 +350,3 @@ int board_uniqueid(uint8_t *uniqueid)
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return OK;
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}
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#endif
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148
configs/nucleo-l476rg/src/stm32_cc1101.c
Normal file
148
configs/nucleo-l476rg/src/stm32_cc1101.c
Normal file
@ -0,0 +1,148 @@
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/****************************************************************************
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* configs/nucleo-l476rg/src/stm32_cc1101.c
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: lihaichen <li8303@163.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/board.h>
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#include <nuttx/config.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/wqueue.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/wireless/cc1101.h>
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#include "stm32l4.h"
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#include "nucleo-l476rg.h"
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#ifdef CONFIG_WL_CC1101
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: cc1101_wait
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*
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* Description:
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*
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****************************************************************************/
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static void cc1101_wait(struct cc1101_dev_s *dev, uint32_t pin)
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{
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while (stm32l4_gpioread(pin) == true)
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{
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}
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}
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/****************************************************************************
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* Name: cc1101_irq
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*
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* Description:
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*
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****************************************************************************/
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static void cc1101_irq(FAR struct cc1101_dev_s *dev, bool enable)
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{
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if (enable)
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{
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stm32l4_gpiosetevent(dev->isr_pin, false, true, true, cc1101_isr, dev);
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}
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else
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{
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stm32l4_gpiosetevent(dev->isr_pin, false, true, true, NULL, NULL);
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}
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}
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/****************************************************************************
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* Name: cc1101_pwr
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*
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* Description:
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*
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****************************************************************************/
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static void cc1101_pwr(FAR struct cc1101_dev_s *dev, bool enable)
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{
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_cc1101_initialize
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*
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* Description:
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* Initialize and register the cc1101 radio driver
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*
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****************************************************************************/
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int stm32_cc1101_initialize(void)
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{
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FAR struct spi_dev_s *spi = NULL;
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FAR struct cc1101_dev_s *dev = NULL;
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spi = stm32l4_spibus_initialize(CONFIG_CC1101_SPIDEV);
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if (spi == NULL)
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{
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ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC1101_SPIDEV);
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return -ENODEV;
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}
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dev = kmm_malloc(sizeof(struct cc1101_dev_s));
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if (dev == NULL)
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{
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return -ENOMEM;
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}
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dev->spi = spi;
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dev->isr_pin = GPIO_CC1101_GDO2;
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dev->miso_pin = GPIO_CC1101_MISO;
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dev->gdo = CC1101_PIN_GDO2;
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dev->rfsettings = &cc1101_rfsettings_ISM2_433MHzMSK500kbps;
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dev->dev_id = SPIDEV_WIRELESS(5);
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dev->channel = 0;
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dev->power = 1;
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dev->ops.wait = cc1101_wait;
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dev->ops.pwr = cc1101_pwr;
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dev->ops.irq = cc1101_irq;
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return cc1101_register("/dev/cc1101", dev);
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}
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#endif
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@ -1,7 +1,7 @@
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/****************************************************************************
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* configs/nucleo-l476rg/src/stm32l4_spi.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -53,7 +53,8 @@
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#include "nucleo-l476rg.h"
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#if defined(CONFIG_STM32L4_SPI1) || defined(CONFIG_STM32L4_SPI2) || defined(CONFIG_STM32L4_SPI3)
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#if defined(CONFIG_STM32L4_SPI1) || defined(CONFIG_STM32L4_SPI2) || \
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defined(CONFIG_STM32L4_SPI3)
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/************************************************************************************
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* Public Data
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@ -105,13 +106,22 @@ void weak_function stm32l4_spiinitialize(void)
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g_spi2 = stm32l4_spibus_initialize(2);
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#ifdef CONFIG_WL_CC3000
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/* Setup CS, EN & IRQ line IOs */
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#ifdef CONFIG_WL_CC3000
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stm32l4_configgpio(GPIO_WIFI_CS);
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stm32l4_configgpio(GPIO_WIFI_EN);
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stm32l4_configgpio(GPIO_WIFI_INT);
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#endif
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#ifdef CONFIG_WL_CC1101
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/* Setup CS, IRQ(gdo2) line IOs */
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stm32l4_configgpio(GPIO_CC1101_PWR);
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stm32l4_configgpio(GPIO_CC1101_CS);
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stm32l4_configgpio(GPIO_CC1101_GDO2);
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#endif
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#endif
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}
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@ -177,6 +187,13 @@ void stm32l4_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected
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stm32l4_gpiowrite(GPIO_WIFI_CS, !selected);
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}
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#endif
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#ifdef CONFIG_WL_CC1101
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if (devid == SPIDEV_WIRELESS(5))
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{
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stm32l4_gpiowrite(GPIO_CC1101_CS, !selected);
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}
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#endif
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}
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uint8_t stm32l4_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
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|
133
drivers/wireless/ISM2_433MHzMSK500kbps.c
Normal file
133
drivers/wireless/ISM2_433MHzMSK500kbps.c
Normal file
@ -0,0 +1,133 @@
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/****************************************************************************
|
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* drivers/wireless/ISM2_905MHzGFSK250kbps.c
|
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*
|
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* Copyright (C) 2011 Uros Platise. All rights reserved.
|
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* Copyright (C) 2011 Ales Verbic. All rights reserved.
|
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*
|
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* Authors: Uros Platise <uros.platise@isotel.eu>
|
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* Ales Verbic <ales.verbic@isotel.eu>
|
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*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/wireless/cc1101.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
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/* Settings for 905 MHz, GFSK at 250kbps
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*
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* ISM Region 2 (America) only, Band 902–928 MHz
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||||
*
|
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* Cordless phones 1 W
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||||
* Microwave ovens 750 W
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||||
* Industrial heaters 100 kW
|
||||
* Military radar 1000 kW
|
||||
*
|
||||
* Deviation = 126.953125
|
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* Base frequency = 901.999969
|
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* Carrier frequency = 905.998993
|
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* Channel number = 20
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* Carrier frequency = 905.998993
|
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* Modulated = true
|
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* Modulation format = GFSK
|
||||
* Manchester enable = false
|
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* Sync word qualifier mode = 30/32 sync word bits detected
|
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* Preamble count = 4
|
||||
* Channel spacing = 199.951172
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* Carrier frequency = 905.998993
|
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* Data rate = 249.939
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* RX filter BW = 541.666667
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* Data format = Normal mode
|
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* Length config = Variable packet length mode. Packet length configured
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* by the first byte after sync word
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* CRC enable = true
|
||||
* Packet length = 61
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* Device address = 0
|
||||
* Address config = No address check
|
||||
* CRC autoflush = false
|
||||
* PA ramping = false
|
||||
* TX power = 0
|
||||
*/
|
||||
|
||||
const struct c1101_rfsettings_s cc1101_rfsettings_ISM2_433MHzMSK500kbps =
|
||||
{
|
||||
.FIFOTHR = 0x07, /* FIFOTHR */
|
||||
.SYNC1 = 0x9b, /* SYNC1 */
|
||||
.SYNC0 = 0xad, /* SYNC0 */
|
||||
.PKTLEN = 0xff, /* PKTLEN */
|
||||
.PKTCTRL1 = 0x04, /* Packet Automation Control */
|
||||
.PKTCTRL0 = 0x05, /* Packet Automation Control */
|
||||
.ADDR = 0xff, /* ADDR */
|
||||
.CHANNR = 0x00, /* CHANNR */
|
||||
|
||||
.FSCTRL1 = 0x0f, /* FSCTRL1 Frequency Synthesizer Control */
|
||||
.FSCTRL0 = 0x00, /* FSCTRL0 Frequency Synthesizer Control */
|
||||
|
||||
.FREQ2 = 0x10, /* FREQ2 Frequency Control Word, High Byte */
|
||||
.FREQ1 = 0xa7, /* FREQ1 Frequency Control Word, Middle Byte */
|
||||
.FREQ0 = 0x62, /* FREQ0 Frequency Control Word, Low Byte */
|
||||
|
||||
.MDMCFG4 = 0x1e, /* MDMCFG4 Modem Configuration */
|
||||
.MDMCFG3 = 0x3b, /* MDMCFG3 Modem Configuration */
|
||||
.MDMCFG2 = 0x73, /* MDMCFG2 Modem Configuration */
|
||||
.MDMCFG1 = 0x42, /* MDMCFG1 Modem Configuration */
|
||||
.MDMCFG0 = 0xf8, /* MDMCFG0 Modem Configuration */
|
||||
|
||||
.DEVIATN = 0x44, /* DEVIATN Modem Deviation Setting */
|
||||
.FOCCFG = 0x16, /* FOCCFG Frequency Offset Compensation Configuration */
|
||||
|
||||
.BSCFG = 0x6c, /* BSCFG Bit Synchronization Configuration */
|
||||
|
||||
.AGCCTRL2 = 0x45, /* AGCCTRL2 AGC Control */
|
||||
.AGCCTRL1 = 0x40, /* AGCCTRL1 AGC Control */
|
||||
.AGCCTRL0 = 0x91, /* AGCCTRL0 AGC Control */
|
||||
|
||||
.FREND1 = 0x56, /* FREND1 Front End RX Configuration */
|
||||
.FREND0 = 0x10, /* FREND0 Front End TX Configuration */
|
||||
|
||||
.FSCAL3 = 0xea, /* FSCAL3 Frequency Synthesizer Calibration */
|
||||
.FSCAL2 = 0x2A, /* FSCAL2 Frequency Synthesizer Calibration */
|
||||
.FSCAL1 = 0x00, /* FSCAL1 Frequency Synthesizer Calibration */
|
||||
.FSCAL0 = 0x1f, /* FSCAL0 Frequency Synthesizer Calibration */
|
||||
|
||||
.CHMIN = 0, /* VERIFY REGULATIONS! */
|
||||
.CHMAX = 0xff,
|
||||
|
||||
.PAMAX = 8, /* 0 means power OFF, 8 represents PA[7] */
|
||||
.PA =
|
||||
{
|
||||
0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
}
|
||||
};
|
@ -9,6 +9,19 @@ config WL_CC1101
|
||||
bool "CC1101 RF transceiver support"
|
||||
default n
|
||||
select SPI
|
||||
select SCHED_HPWORK
|
||||
select SCHED_LPWORK
|
||||
|
||||
if WL_CC1101
|
||||
|
||||
config CC1101_SPIDEV
|
||||
int "SPI bus number"
|
||||
default 2
|
||||
---help---
|
||||
Selects the SPI bus number identying that SPI interface that
|
||||
connects the CC1101 to the MCU.
|
||||
|
||||
endif
|
||||
|
||||
menuconfig WL_CC3000
|
||||
bool "CC3000 Wireless Module support"
|
||||
|
@ -51,6 +51,7 @@ endif
|
||||
|
||||
ifeq ($(CONFIG_WL_CC1101),y)
|
||||
CSRCS += cc1101.c ISM1_868MHzGFSK100kbps.c ISM2_905MHzGFSK250kbps.c
|
||||
CSRCS += ISM2_433MHzMSK500kbps.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_WL_CC3000),y)
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -41,10 +41,14 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/spi/spi.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <poll.h>
|
||||
#include <semaphore.h>
|
||||
|
||||
#include <nuttx/wqueue.h>
|
||||
#include <nuttx/spi/spi.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-Processor Declarations
|
||||
@ -55,9 +59,7 @@
|
||||
#define CC1101_PACKET_MAXTOTALLEN 63
|
||||
#define CC1101_PACKET_MAXDATALEN 61
|
||||
|
||||
/*
|
||||
* General Purpose, Test Output Pin Options
|
||||
*/
|
||||
/* General Purpose, Test Output Pin Options */
|
||||
|
||||
/* CC1101 General Purpose Pins */
|
||||
|
||||
@ -113,7 +115,9 @@
|
||||
#define CC1101_GDO_SYNC 0x06
|
||||
|
||||
/* Asserts when a packet has been received with CRC OK. De-asserts when
|
||||
* the first byte is read from the RX FIFO. */
|
||||
* the first byte is read from the RX FIFO.
|
||||
*/
|
||||
|
||||
#define CC1101_GDO_PKTRCV_CRCOK 0x07
|
||||
|
||||
/* Preamble Quality Reached. Asserts when the PQI is above the programmed
|
||||
@ -180,7 +184,7 @@
|
||||
* instead.
|
||||
*/
|
||||
|
||||
#define CC1101_GDO_PA_PD 0x1B
|
||||
#define CC1101_GDO_PA_PD 0x1b
|
||||
|
||||
/* LNA_PD. Note: LNA_PD will have the same signal level in SLEEP and RX
|
||||
* states. To control an external LNA or RX/TX switch in applications
|
||||
@ -188,13 +192,13 @@
|
||||
* instead.
|
||||
*/
|
||||
|
||||
#define CC1101_GDO_LNA_PD 0x1C
|
||||
#define CC1101_GDO_LNA_PD 0x1c
|
||||
|
||||
/* RX_SYMBOL_TICK. Can be used together with RX_HARD_DATA for alternative
|
||||
* serial RX output.
|
||||
*/
|
||||
|
||||
#define CC1101_GDO_RXSYMTICK 0x1D
|
||||
#define CC1101_GDO_RXSYMTICK 0x1d
|
||||
|
||||
#define CC1101_GDO_WOR_EVNT0 0x24
|
||||
#define CC1101_GDO_WOR_EVNT1 0x25
|
||||
@ -210,13 +214,13 @@
|
||||
|
||||
/* High impedance (3-state). */
|
||||
|
||||
#define CC1101_GDO_HIZ 0x2E
|
||||
#define CC1101_GDO_HIZ 0x2e
|
||||
|
||||
/* HW to 0 (HW1 achieved by setting GDOx_INV=1). Can be used to control
|
||||
* an external LNA/PA or RX/TX switch.
|
||||
*/
|
||||
|
||||
#define CC1101_GDO_HW 0x2F
|
||||
#define CC1101_GDO_HW 0x2f
|
||||
|
||||
/* There are 3 GDO pins, but only one CLK_XOSC/n can be selected as an
|
||||
* output at any time. If CLK_XOSC/n is to be monitored on one of the
|
||||
@ -236,12 +240,12 @@
|
||||
#define CC1101_GDO_CLK_XOSC12 0x37
|
||||
#define CC1101_GDO_CLK_XOSC16 0x38
|
||||
#define CC1101_GDO_CLK_XOSC24 0x39
|
||||
#define CC1101_GDO_CLK_XOSC32 0x3A
|
||||
#define CC1101_GDO_CLK_XOSC48 0x3B
|
||||
#define CC1101_GDO_CLK_XOSC64 0x3C
|
||||
#define CC1101_GDO_CLK_XOSC96 0x3D
|
||||
#define CC1101_GDO_CLK_XOSC128 0x3E
|
||||
#define CC1101_GDO_CLK_XOSC192 0x3F
|
||||
#define CC1101_GDO_CLK_XOSC32 0x3a
|
||||
#define CC1101_GDO_CLK_XOSC48 0x3b
|
||||
#define CC1101_GDO_CLK_XOSC64 0x3c
|
||||
#define CC1101_GDO_CLK_XOSC96 0x3d
|
||||
#define CC1101_GDO_CLK_XOSC128 0x3e
|
||||
#define CC1101_GDO_CLK_XOSC192 0x3f
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data Types
|
||||
@ -250,69 +254,127 @@
|
||||
#ifndef __ASSEMBLY__
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
# define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
# define EXTERN extern
|
||||
#endif
|
||||
|
||||
typedef int (*wait_cc1101_ready)(FAR struct cc1101_dev_s *dev, uint32_t);
|
||||
struct cc1101_dev_s;
|
||||
|
||||
struct cc1101_ops_s
|
||||
{
|
||||
CODE void (*wait)(FAR struct cc1101_dev_s *dev, uint32_t);
|
||||
CODE void (*irq)(FAR struct cc1101_dev_s *dev, bool enable);
|
||||
CODE void (*pwr)(FAR struct cc1101_dev_s *dev, bool enable);
|
||||
};
|
||||
|
||||
enum cc1101_status
|
||||
{
|
||||
CC1101_INIT,
|
||||
CC1101_IDLE,
|
||||
CC1101_SEND,
|
||||
CC1101_RECV,
|
||||
CC1101_SLEEP,
|
||||
CC1101_SXOFF
|
||||
};
|
||||
|
||||
struct cc1101_dev_s
|
||||
{
|
||||
const struct c1101_rfsettings_s *rfsettings;
|
||||
struct spi_dev_s *spi;
|
||||
struct cc1101_ops_s ops;
|
||||
enum cc1101_status status;
|
||||
uint8_t flags;
|
||||
uint8_t channel;
|
||||
uint8_t power;
|
||||
uint32_t dev_id; /*SPI device Id*/
|
||||
uint32_t gdo; /*GDO for interrupt*/
|
||||
uint32_t isr_pin; /*ISR Pin*/
|
||||
uint32_t miso_pin; /*MISO Pin*/
|
||||
struct work_s irq_work; /* Interrupt handling "bottom half" */
|
||||
uint8_t nopens; /* The number of times the device has been opened */
|
||||
sem_t devsem; /* Ensures exclusive access to this structure */
|
||||
uint8_t *rx_buffer; /* Circular RX buffer. [pipe# / pkt_len] [packet data...] */
|
||||
uint16_t fifo_len; /* Number of bytes stored in fifo */
|
||||
uint16_t nxt_read; /* Next read index */
|
||||
uint16_t nxt_write; /* Next write index */
|
||||
sem_t sem_rx_buffer; /* Protect access to rx fifo */
|
||||
sem_t sem_rx; /* Wait for availability of received data */
|
||||
sem_t sem_tx; /* Wait for availability of send data */
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
FAR struct pollfd *pfd; /* Polled file descr (or NULL if any) */
|
||||
#endif
|
||||
};
|
||||
|
||||
/* The RF Settings includes only those fields required to configure
|
||||
* the RF radio. Other configuration fields depended on this driver
|
||||
* are configured by the cc1101_init().
|
||||
*
|
||||
* REVISIT: Upper case field names violates the NuttX coding standard.
|
||||
*/
|
||||
|
||||
struct c1101_rfsettings_s
|
||||
{
|
||||
uint8_t FSCTRL1; /* Frequency synthesizer control. */
|
||||
uint8_t FSCTRL0; /* Frequency synthesizer control. */
|
||||
uint8_t FIFOTHR; /* FIFOTHR */
|
||||
uint8_t SYNC1; /* SYNC1 */
|
||||
uint8_t SYNC0; /* SYNC0 */
|
||||
|
||||
uint8_t FREQ2; /* Frequency control word, high byte. */
|
||||
uint8_t FREQ1; /* Frequency control word, middle byte. */
|
||||
uint8_t FREQ0; /* Frequency control word, low byte. */
|
||||
uint8_t PKTLEN; /* PKTLEN */
|
||||
uint8_t PKTCTRL0; /* Packet Automation Control */
|
||||
uint8_t PKTCTRL1; /* Packet Automation Control */
|
||||
|
||||
uint8_t MDMCFG4; /* Modem configuration. */
|
||||
uint8_t MDMCFG3; /* Modem configuration. */
|
||||
uint8_t MDMCFG2; /* Modem configuration. */
|
||||
uint8_t MDMCFG1; /* Modem configuration. */
|
||||
uint8_t MDMCFG0; /* Modem configuration. */
|
||||
uint8_t ADDR; /* ADDR */
|
||||
uint8_t CHANNR; /* CHANNR */
|
||||
|
||||
uint8_t DEVIATN; /* Modem deviation setting (when FSK modulation is enabled). */
|
||||
uint8_t FSCTRL1; /* Frequency synthesizer control. */
|
||||
uint8_t FSCTRL0; /* Frequency synthesizer control. */
|
||||
|
||||
uint8_t FREQ2; /* Frequency control word, high byte. */
|
||||
uint8_t FREQ1; /* Frequency control word, middle byte. */
|
||||
uint8_t FREQ0; /* Frequency control word, low byte. */
|
||||
|
||||
uint8_t MDMCFG4; /* Modem configuration. */
|
||||
uint8_t MDMCFG3; /* Modem configuration. */
|
||||
uint8_t MDMCFG2; /* Modem configuration. */
|
||||
uint8_t MDMCFG1; /* Modem configuration. */
|
||||
uint8_t MDMCFG0; /* Modem configuration. */
|
||||
uint8_t DEVIATN; /* Modem deviation setting (when FSK modulation is enabled). */
|
||||
|
||||
/* GAP */
|
||||
|
||||
uint8_t FOCCFG; /* Frequency Offset Compensation Configuration. */
|
||||
uint8_t FOCCFG; /* Frequency Offset Compensation Configuration. */
|
||||
|
||||
uint8_t BSCFG; /* Bit synchronization Configuration. */
|
||||
uint8_t BSCFG; /* Bit synchronization Configuration. */
|
||||
|
||||
uint8_t AGCCTRL2; /* AGC control. */
|
||||
uint8_t AGCCTRL1; /* AGC control. */
|
||||
uint8_t AGCCTRL0; /* AGC control. */
|
||||
uint8_t AGCCTRL2; /* AGC control. */
|
||||
uint8_t AGCCTRL1; /* AGC control. */
|
||||
uint8_t AGCCTRL0; /* AGC control. */
|
||||
|
||||
/* GAP */
|
||||
|
||||
uint8_t FREND1; /* Front end RX configuration. */
|
||||
uint8_t FREND0; /* Front end RX configuration. */
|
||||
uint8_t FREND1; /* Front end RX configuration. */
|
||||
uint8_t FREND0; /* Front end RX configuration. */
|
||||
|
||||
uint8_t FSCAL3; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL2; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL1; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL0; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL3; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL2; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL1; /* Frequency synthesizer calibration. */
|
||||
uint8_t FSCAL0; /* Frequency synthesizer calibration. */
|
||||
|
||||
/* REGULATORY LIMITS */
|
||||
|
||||
uint8_t CHMIN; /* Channel Range defintion MIN .. */
|
||||
uint8_t CHMAX; /* .. and MAX */
|
||||
uint8_t PAMAX; /* at given maximum output power */
|
||||
uint8_t CHMIN; /* Channel Range defintion MIN .. */
|
||||
uint8_t CHMAX; /* .. and MAX */
|
||||
uint8_t PAMAX; /* at given maximum output power */
|
||||
|
||||
/* Power Table, for ramp-up/down and ASK modulation defined for
|
||||
* output power values as:
|
||||
* PA = {-30, -20, -15, -10, -5, 0, 5, 10} [dBm]
|
||||
*/
|
||||
|
||||
uint8_t PA[8];
|
||||
uint8_t PA[8];
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
@ -330,9 +392,10 @@ struct c1101_rfsettings_s
|
||||
* Frequency ERP Duty Cycle Bandwidth Remarks
|
||||
* 868 – 868.6 MHz +14 dBm < 1% No limits
|
||||
* 868.7 – 869.2 MHz +14 dBm < 0.1% No limits
|
||||
* 869.3 – 869.4 MHz +10 dBm No limits < 25 kHz Appropriate access protocol required
|
||||
* 869.4 – 869.65 MHz +27 dBm < 10% < 25 kHz Channels may be combined to one high speed channel
|
||||
* 869.7 -870 MHz +7 dBm No limits No limits
|
||||
* 869.3 – 869.4 MHz +10 dBm No limits < 25 kHz Appropriate access
|
||||
* protocol required 869.4 – 869.65 MHz +27 dBm < 10% < 25 kHz
|
||||
* Channels may be combined to one high speed channel 869.7 -870 MHz +7
|
||||
* dBm No limits No limits
|
||||
*
|
||||
* Frequency Band For License-Free Specific Applications in Europe
|
||||
*
|
||||
@ -344,17 +407,18 @@ struct c1101_rfsettings_s
|
||||
* 863 – 865 MHz Radio Microphones +10 dBm No limits 200 kHz
|
||||
* 863 -865 MHz Wireless Audio Applications +10 dBm No limits 300 kHz
|
||||
*
|
||||
* Duty Cycle Limit Total On Time Maximum On Time of Minimum Off Time of
|
||||
* Within One Hour One Transmission Two Transmission
|
||||
* < 0.1% 3.6 seconds 0.72 seconds 0.72 seconds
|
||||
* < 1% 36 seconds 3.6 seconds 1.8 seconds
|
||||
* < 10% 360 seconds 36 seconds 3.6 seconds
|
||||
* Duty Cycle Limit Total On Time Maximum On Time of Minimum
|
||||
* Off Time of Within One Hour One Transmission Two Transmission <
|
||||
* 0.1% 3.6 seconds 0.72 seconds 0.72 seconds < 1% 36
|
||||
* seconds 3.6 seconds 1.8 seconds < 10% 360
|
||||
* seconds 36 seconds 3.6 seconds
|
||||
*
|
||||
* Reference: TI Application Report: swra048.pdf, May 2005
|
||||
* ISM-Band and Short Range Device Regulatory Compliance Overview
|
||||
*/
|
||||
|
||||
EXTERN const struct c1101_rfsettings_s cc1101_rfsettings_ISM1_868MHzGFSK100kbps;
|
||||
EXTERN const struct c1101_rfsettings_s
|
||||
cc1101_rfsettings_ISM1_868MHzGFSK100kbps;
|
||||
|
||||
/* 905 MHz, GFSK, 250 kbps, ISM Region 2 (America only)
|
||||
*
|
||||
@ -366,12 +430,18 @@ EXTERN const struct c1101_rfsettings_s cc1101_rfsettings_ISM1_868MHzGFSK100kbps;
|
||||
* Military radar 1000 kW
|
||||
*/
|
||||
|
||||
EXTERN const struct c1101_rfsettings_s cc1101_rfsettings_ISM2_905MHzGFSK250kbps;
|
||||
EXTERN const struct c1101_rfsettings_s
|
||||
cc1101_rfsettings_ISM2_905MHzGFSK250kbps;
|
||||
|
||||
EXTERN const struct c1101_rfsettings_s
|
||||
cc1101_rfsettings_ISM2_433MHzMSK500kbps;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
FAR int cc1101_init2(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Initialize Chipcon CC1101 Chip.
|
||||
* After initialization CC1101 is ready to listen, receive and transmit
|
||||
@ -395,8 +465,9 @@ EXTERN const struct c1101_rfsettings_s cc1101_rfsettings_ISM2_905MHzGFSK250kbps;
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct cc1101_dev_s *cc1101_init(struct spi_dev_s *spi, uint8_t isrpin,
|
||||
uint32_t pinset, const struct c1101_rfsettings_s *rfsettings);
|
||||
struct cc1101_dev_s *cc1101_init(
|
||||
FAR struct spi_dev_s *spi, uint32_t isr_pin, uint32_t miso_pin,
|
||||
FAR const struct c1101_rfsettings_s *rfsettings, wait_cc1101_ready wait);
|
||||
|
||||
/****************************************************************************
|
||||
** Deinitialize Chipcon CC1101 Chip
|
||||
@ -409,32 +480,32 @@ struct cc1101_dev_s *cc1101_init(struct spi_dev_s *spi, uint8_t isrpin,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_deinit(struct cc1101_dev_s *dev);
|
||||
int cc1101_deinit(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Power up device, start conversion. Returns zero on success.
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_powerup(struct cc1101_dev_s *dev);
|
||||
int cc1101_powerup(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Power down device, stop conversion. Returns zero on success.
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_powerdown(struct cc1101_dev_s *dev);
|
||||
int cc1101_powerdown(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Set Multi Purpose Output Function. Returns zero on success.
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_setgdo(struct cc1101_dev_s *dev, uint8_t pin, uint8_t function);
|
||||
int cc1101_setgdo(FAR struct cc1101_dev_s *dev, uint8_t pin, uint8_t function);
|
||||
|
||||
/****************************************************************************
|
||||
* Set RF settings. Use one from the database above.
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_setrf(struct cc1101_dev_s *dev,
|
||||
const struct c1101_rfsettings_s *settings);
|
||||
int cc1101_setrf(FAR struct cc1101_dev_s *dev,
|
||||
FAR const struct c1101_rfsettings_s *settings);
|
||||
|
||||
/****************************************************************************
|
||||
* Set Channel.
|
||||
@ -447,7 +518,7 @@ int cc1101_setrf(struct cc1101_dev_s *dev,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_setchannel(struct cc1101_dev_s *dev, uint8_t channel);
|
||||
int cc1101_setchannel(FAR struct cc1101_dev_s *dev, uint8_t channel);
|
||||
|
||||
/****************************************************************************
|
||||
* Set Output Power
|
||||
@ -465,10 +536,12 @@ int cc1101_setchannel(struct cc1101_dev_s *dev, uint8_t channel);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint8_t cc1101_setpower(struct cc1101_dev_s *dev, uint8_t power);
|
||||
uint8_t cc1101_setpower(FAR struct cc1101_dev_s *dev, uint8_t power);
|
||||
|
||||
/****************************************************************************
|
||||
* Convert RSSI as obtained from CC1101 to [dBm] */
|
||||
* Convert RSSI as obtained from CC1101 to [dBm]
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_calcRSSIdBm(int rssi);
|
||||
|
||||
@ -486,7 +559,7 @@ int cc1101_calcRSSIdBm(int rssi);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_receive(struct cc1101_dev_s *dev);
|
||||
int cc1101_receive(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Read received packet
|
||||
@ -508,7 +581,7 @@ int cc1101_receive(struct cc1101_dev_s *dev);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_read(struct cc1101_dev_s *dev, uint8_t *buf, size_t size);
|
||||
int cc1101_read(FAR struct cc1101_dev_s *dev, FAR uint8_t *buf, size_t size);
|
||||
|
||||
/****************************************************************************
|
||||
* Write data to be send, using the cc1101_send()
|
||||
@ -522,7 +595,8 @@ int cc1101_read(struct cc1101_dev_s *dev, uint8_t *buf, size_t size);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_write(struct cc1101_dev_s *dev, const uint8_t *buf, size_t size);
|
||||
int cc1101_write(FAR struct cc1101_dev_s *dev, FAR const uint8_t *buf,
|
||||
size_t size);
|
||||
|
||||
/****************************************************************************
|
||||
* Send data previously written using cc1101_write()
|
||||
@ -535,7 +609,7 @@ int cc1101_write(struct cc1101_dev_s *dev, const uint8_t *buf, size_t size);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_send(struct cc1101_dev_s *dev);
|
||||
int cc1101_send(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Enter idle state (after reception and transmission completes).
|
||||
@ -545,7 +619,12 @@ int cc1101_send(struct cc1101_dev_s *dev);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int cc1101_idle(struct cc1101_dev_s *dev);
|
||||
int cc1101_idle(FAR struct cc1101_dev_s *dev);
|
||||
|
||||
int cc1101_register(FAR const char *path, FAR struct cc1101_dev_s *dev);
|
||||
|
||||
void cc1101_isr_process(FAR void *arg);
|
||||
int cc1101_isr(int irq, FAR void *context, FAR void *arg);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
@ -553,4 +632,4 @@ int cc1101_idle(struct cc1101_dev_s *dev);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __INCLUDE_NUTTX_WIRELESS_CC1101_H */
|
||||
#endif /* __INCLUDE_NUTTX_WIRELESS_CC1101_H */
|
||||
|
Loading…
Reference in New Issue
Block a user