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arch: arm: a1x: nxstyle fixes for a1x arch

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nxstyle fixes for a1x arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2020-04-17 21:21:59 +02:00 committed by Xiang Xiao
parent f706f5e0e8
commit afead9c9da
11 changed files with 113 additions and 80 deletions
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3
arch/arm/include/a1x/chip.h
View File

@ -45,6 +45,7 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* A1X Family */
#if defined(CONFIG_ARCH_CHIP_A10)
@ -62,7 +63,7 @@
************************************************************************************/
/************************************************************************************
* Public Functions
* Public Functions Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_A1X_CHIP_H */

8
arch/arm/include/a1x/irq.h
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@ -47,10 +47,6 @@
#include <nuttx/config.h>
#include <arch/a1x/chip.h>
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/* Chip-Specific External interrupts */
#if defined(CONFIG_ARCH_CHIP_A10)
@ -59,6 +55,10 @@
# error Unrecognized A1X chip
#endif
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/****************************************************************************************
* Public Types
****************************************************************************************/

5
arch/arm/src/a1x/a1x_boot.c
View File

@ -59,6 +59,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The vectors are, by default, positioned at the beginning of the text
* section. They will always have to be copied to the correct location.
*
@ -247,8 +248,8 @@ static void a1x_copyvectorblock(void)
a1x_vectorpermissions(MMU_L2_VECTRWFLAGS);
#endif
/* Copy the vectors into ISRAM at the address that will be mapped to the vector
* address:
/* Copy the vectors into ISRAM at the address that will be mapped to the
* vector address:
*
* A1X_VECTOR_PADDR - Unmapped, physical address of vector table in SRAM
* A1X_VECTOR_VSRAM - Virtual address of vector table in SRAM

32
arch/arm/src/a1x/a1x_config.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/a1x/a1x_config.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@ -31,25 +31,25 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_A1X_A1X_CONFIG_H
#define __ARCH_ARM_SRC_A1X_A1X_CONFIG_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Configuration *********************************************************************/
/* Configuration ************************************************************/
/* Are any UARTs enabled? */
@ -61,8 +61,8 @@
# define HAVE_UART_DEVICE 1
#endif
/* Is there a serial console? There should be at most one defined. It could be on
* any UARTn, n=0,1,2,3,4,5
/* Is there a serial console? There should be at most one defined.
* It could be on any UARTn, n=0,1,2,3,4,5
*/
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_A1X_UART0)
@ -160,16 +160,16 @@
# undef CONFIG_UART6_FLOWCONTROL
# undef CONFIG_UART7_FLOWCONTROL
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_A1X_A1X_CONFIG_H */

8
arch/arm/src/a1x/a1x_irq.c
View File

@ -171,7 +171,9 @@ void up_irqinitialize(void)
#ifndef CONFIG_SUPPRESS_INTERRUPTS
#ifdef CONFIG_A1X_PIO_IRQ
/* Initialize logic to support a second level of interrupt decoding for PIO pins. */
/* Initialize logic to support a second level of interrupt decoding
* for PIO pins.
*/
a1x_pio_irqinitialize();
#endif
@ -212,8 +214,8 @@ uint32_t *arm_decodeirq(uint32_t *regs)
uint32_t regval;
/* During initialization, the BASE address register was set to zero.
* Therefore, when we read the VECTOR address register, we get the IRQ number
* shifted left by two.
* Therefore, when we read the VECTOR address register, we get the IRQ
* number shifted left by two.
*/
regval = getreg32(A1X_INTC_VECTOR);

26
arch/arm/src/a1x/a1x_lowputc.c
View File

@ -203,11 +203,12 @@ void up_lowputc(char ch)
#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
/* Wait for the transmitter to be available */
while ((getreg32(CONSOLE_BASE+A1X_UART_LSR_OFFSET) & UART_LSR_THRE) == 0);
while ((getreg32(CONSOLE_BASE + A1X_UART_LSR_OFFSET) &
UART_LSR_THRE) == 0);
/* Send the character */
putreg32((uint32_t)ch, CONSOLE_BASE+A1X_UART_THR_OFFSET);
putreg32((uint32_t)ch, CONSOLE_BASE + A1X_UART_THR_OFFSET);
#endif
}
@ -264,28 +265,35 @@ void a1x_lowsetup(void)
/* Clear fifos */
putreg32(UART_FCR_RFIFOR | UART_FCR_XFIFOR, CONSOLE_BASE + A1X_UART_FCR_OFFSET);
putreg32(UART_FCR_RFIFOR | UART_FCR_XFIFOR,
CONSOLE_BASE + A1X_UART_FCR_OFFSET);
/* Set trigger */
putreg32(UART_FCR_FIFOE | UART_FCR_RT_HALF, CONSOLE_BASE + A1X_UART_FCR_OFFSET);
putreg32(UART_FCR_FIFOE | UART_FCR_RT_HALF,
CONSOLE_BASE + A1X_UART_FCR_OFFSET);
/* Set up the LCR and set DLAB=1 */
putreg32(CONSOLE_LCR_VALUE | UART_LCR_DLAB, CONSOLE_BASE + A1X_UART_LCR_OFFSET);
putreg32(CONSOLE_LCR_VALUE | UART_LCR_DLAB,
CONSOLE_BASE + A1X_UART_LCR_OFFSET);
/* Set the BAUD divisor */
putreg32(CONSOLE_DL >> 8, CONSOLE_BASE+A1X_UART_DLH_OFFSET);
putreg32(CONSOLE_DL & 0xff, CONSOLE_BASE+A1X_UART_DLL_OFFSET);
putreg32(CONSOLE_DL >> 8,
CONSOLE_BASE + A1X_UART_DLH_OFFSET);
putreg32(CONSOLE_DL & 0xff,
CONSOLE_BASE + A1X_UART_DLL_OFFSET);
/* Clear DLAB */
putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE+A1X_UART_LCR_OFFSET);
putreg32(CONSOLE_LCR_VALUE,
CONSOLE_BASE + A1X_UART_LCR_OFFSET);
/* Configure the FIFOs */
putreg32(UART_FCR_RT_HALF | UART_FCR_XFIFOR | UART_FCR_RFIFOR | UART_FCR_FIFOE,
putreg32(UART_FCR_RT_HALF | UART_FCR_XFIFOR |
UART_FCR_RFIFOR | UART_FCR_FIFOE,
CONSOLE_BASE + A1X_UART_FCR_OFFSET);
#endif
#endif /* HAVE_UART_DEVICE */

17
arch/arm/src/a1x/a1x_pio.c
View File

@ -70,6 +70,7 @@
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: a1x_pio_pin
*
@ -398,13 +399,13 @@ bool a1x_pio_read(pio_pinset_t pinset)
return ((regval & PIO_DAT(pin)) != 0);
}
/************************************************************************************
/****************************************************************************
* Name: a1x_pio_irqenable
*
* Description:
* Enable the interrupt for specified PIO IRQ
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_A1X_PIO_IRQ
void a1x_pio_irqenable(int irq)
@ -419,8 +420,8 @@ void a1x_pio_irqenable(int irq)
pin = irq - A1X_PIO_EINT0
/* Un-mask the interrupt be setting the corresponding bit in the PIO INT CTL
* register.
/* Un-mask the interrupt be setting the corresponding bit in the
* PIO INT CTL register.
*/
flags = enter_critical_section();
@ -431,13 +432,13 @@ void a1x_pio_irqenable(int irq)
}
#endif
/************************************************************************************
/****************************************************************************
* Name: a1x_pio_irqdisable
*
* Description:
* Disable the interrupt for specified PIO IRQ
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_A1X_PIO_IRQ
void a1x_pio_irqdisable(int irq)
@ -452,8 +453,8 @@ void a1x_pio_irqdisable(int irq)
pin = irq - A1X_PIO_EINT0
/* Mask the interrupt be clearning the corresponding bit in the PIO INT CTL
* register.
/* Mask the interrupt be clearning the corresponding bit in the
* PIO INT CTL register.
*/
flags = enter_critical_section();

1
arch/arm/src/a1x/a1x_pio.h
View File

@ -50,6 +50,7 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Bit-encoded input to a1x_pio_config() ********************************************/
/* 32-bit Encoding:

54
arch/arm/src/a1x/a1x_serial.c
View File

@ -656,7 +656,8 @@ static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
* Name: up_serialout
****************************************************************************/
static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value)
static inline void up_serialout(struct up_dev_s *priv, int offset,
uint32_t value)
{
putreg32(value, priv->uartbase + offset);
}
@ -706,13 +707,13 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
up_serialout(priv, A1X_UART_LCR_OFFSET, lcr);
}
/************************************************************************************
/****************************************************************************
* Name: a1x_uart0config, uart1config, uart2config, ..., uart7config
*
* Description:
* Configure the UART
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_A1X_UART0
static inline void a1x_uart0config(void)
@ -882,7 +883,7 @@ static inline void a1x_uart7config(void)
};
#endif
/************************************************************************************
/****************************************************************************
* Name: a1x_uartdl
*
* Description:
@ -891,7 +892,7 @@ static inline void a1x_uart7config(void)
* BAUD = PCLK / (16 * DL), or
* DL = PCLK / BAUD / 16
*
************************************************************************************/
****************************************************************************/
static inline uint32_t a1x_uartdl(uint32_t baud)
{
@ -920,11 +921,13 @@ static int up_setup(struct uart_dev_s *dev)
/* Clear fifos */
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_RFIFOR | UART_FCR_XFIFOR));
up_serialout(priv, A1X_UART_FCR_OFFSET,
(UART_FCR_RFIFOR | UART_FCR_XFIFOR));
/* Set trigger */
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_FIFOE | UART_FCR_RT_HALF));
up_serialout(priv, A1X_UART_FCR_OFFSET,
(UART_FCR_FIFOE | UART_FCR_RT_HALF));
/* Set up the IER */
@ -1016,14 +1019,16 @@ static void up_shutdown(struct uart_dev_s *dev)
* Name: up_attach
*
* Description:
* Configure the UART to operation in interrupt driven mode. This method is
* called when the serial port is opened. Normally, this is just after the
* the setup() method is called, however, the serial console may operate in
* Configure the UART to operation in interrupt driven mode.
* This method is called when the serial port is opened.
* Normally, this is just after the the setup() method is called,
* however, the serial console may operate in
* a non-interrupt driven mode during the boot phase.
*
* RX and TX interrupts are not enabled when by the attach method (unless the
* hardware supports multiple levels of interrupt enabling). The RX and TX
* interrupts are not enabled until the txint() and rxint() methods are called.
* RX and TX interrupts are not enabled when by the attach method
* (unless the hardware supports multiple levels of interrupt enabling).
* The RX and TX interrupts are not enabled until the txint() and rxint()
* methods are called.
*
****************************************************************************/
@ -1051,8 +1056,9 @@ static int up_attach(struct uart_dev_s *dev)
* Name: up_detach
*
* Description:
* Detach UART interrupts. This method is called when the serial port is
* closed normally just before the shutdown method is called. The exception is
* Detach UART interrupts.
* This method is called when the serial port is closed normally
* just before the shutdown method is called. The exception is
* the serial console which is never shutdown.
*
****************************************************************************/
@ -1139,11 +1145,16 @@ static int uart_interrupt(int irq, void *context, void *arg)
break;
}
/* Busy detect. Just ignore. Cleared by reading the status register */
/* Busy detect.
* Just ignore.
* Cleared by reading the status register
*/
case UART_IIR_IID_BUSY:
{
/* Read from the UART status register to clear the BUSY condition */
/* Read from the UART status register
* to clear the BUSY condition
*/
status = up_serialin(priv, A1X_UART_USR_OFFSET);
break;
@ -1156,7 +1167,9 @@ static int uart_interrupt(int irq, void *context, void *arg)
return OK;
}
/* Otherwise we have received an interrupt that we cannot handle */
/* Otherwise we have received an interrupt
* that we cannot handle
*/
default:
{
@ -1266,7 +1279,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
*/
/* DLAB open latch */
/* REVISIT: Shouldn't we just call up_setup() to do all of the following? */
/* REVISIT:
* Shouldn't we just call up_setup() to do all of the following?
*/
lcr = getreg32(priv->uartbase + A1X_UART_LCR_OFFSET);
up_serialout(priv, A1X_UART_LCR_OFFSET, (lcr | UART_LCR_DLAB));

38
arch/arm/src/a1x/a1x_serial.h
View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/a1x/a1x_serial.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@ -31,14 +31,14 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_A1X_A1X_SERIAL_H
#define __ARCH_ARM_SRC_A1X_A1X_SERIAL_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
@ -48,32 +48,34 @@
#include "a1x_config.h"
#include "a1x_pio.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration *********************************************************************/
****************************************************************************/
/* We cannot allow the DLM/DLL divisor to become to small or will will lose too
* much accuracy. This following is a "fudge factor" that represents the minimum
/* Configuration ************************************************************/
/* We cannot allow the DLM/DLL divisor to become to small or will will lose
* too much accuracy.
* This following is a "fudge factor" that represents the minimum
* value of the divisor that we will permit.
*/
#define UART_MINDL 32
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_A1X_A1X_SERIAL_H */

1
arch/arm/src/a1x/a1x_timerisr.c
View File

@ -54,6 +54,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Timer 0 will run at the rate of OSC24M with no division */
#define TMR0_CLOCK (24000000)