Add ENC28J60 Interrupt
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2651 42af7a65-404d-4744-a932-0658087f49c3
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@ -1,3 +1,25 @@
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README File for the Olimex STR-P711 NuttX Port
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Contents
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^^^^^^^^
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Olimex STR-P711
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Features
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Power Supply
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GIO Usage
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Jumpers
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External Interrupts
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Development Environment
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GNU Toolchain Options
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NuttX buildroot Toolchain
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Linux OpenOCD with Wiggler JTAG
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Windows OpenOCD will Olimex JTAG
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MMC/SD Slot
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ENC28J60 Module
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Configurations
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STR71x-Specific Configuration Settings
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Olimex STR-P711
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^^^^^^^^^^^^^^^
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Features:
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@ -57,6 +79,30 @@ Olimex STR-P711
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Jumpers
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STNBY Will pull pin 23 /STDBY low
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External Interrupt (XTI) availability.
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XTI TQFP64
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LINE PIN SIGNAL * OLIMEX USAGE
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---- ------ ------------------------- - ------------------------
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2 -- P2.8 (Not available in TQFP64)
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3 -- P2.9 (Not available in TQFP64)
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4 -- P2.10 (Not available in TQFP64)
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5 25 P2.11 (Not available in TQFP64)
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6 42 P1.11/CANRX USBOP (to USB connector)
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7 47 P1.13/HCLK/I0.SCL CLK ??????????????
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8 48 P1.14/HRXD/I0.SDA BUT button (PL open, PU closed)
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9 53 P0.1/S0.MOSI/U3.RX * SPI0-3 MOSI0
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10 54 P0.2/S0.SCLK/I1.SCL * SPI0-5 SCLK0
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11 61 P0.6/S1.SCLK * SPI1-5 SCLK1 (also to MMC slot)
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12 63 P0.8/U0.RX/U0.TX U0.TX
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13 1 P0.10/U1.RX/U1.TX/SC.DATA U1.RX
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14 5 P0.13/U2.RX/T2.OCMPA BUZZ (to buzzer circult)
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15 20 P0.15/WAKEUP WAKE-UP button (PL open, PU closed)
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* Only these pins are available at a
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connector and are not dedicated to
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other board functions.
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Development Environment
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^^^^^^^^^^^^^^^^^^^^^^^
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@ -160,8 +206,8 @@ NuttX buildroot Toolchain
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8. Edit setenv.h so that the PATH variable includes the path to the
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newly built binaries.
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OpenOCD
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^^^^^^^
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Linux OpenOCD with Wiggler JTAG
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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For a debug environment, I am using OpenOCD with a Wiggler-clone JTAG interface. The
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following steps worked for me with a 20081028 OpenOCD snapshot.
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@ -228,6 +274,44 @@ GENERAL STEPS:
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The same commands from the telnet interface can now be accessed through the
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'monitor' command, e.g. 'monitor help'
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Windows OpenOCD will Olimex JTAG
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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I have been using the Olimex ARM-USB-OCD JTAG debugger with the STR-P711
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(http://www.olimex.com). The OpenOCD configuration file is here:
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scripts/oocd_ft2xx.cfg. There is also a script on the scripts/ directory that
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I used to start the OpenOCD daemon on my system called oocd.sh. That
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script would probably require some modifications to work in another
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environment:
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- possibly the value of OPENOCD_PATH
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- If you are working under Linux you will need to change any
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occurances of `cygpath -w blablabla` to just blablabla
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The setenv.sh file includes some environment varialble settings
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that are needed by oocd.sh. If you have $PATH and other environment
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variables set up, then you should be able to start the OpenOCD daemon like:
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oocd.sh
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To use the Windows Olimex USB JTAG (or 'oocd.sh pp' to use the Wriggler
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JTAG) where it is assumed that you are executing oocd.sh from the top level
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level NuttX directory.
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Once the OpenOCD daemon has been started, you can connect to it via
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GDB using the following GDB command:
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arm-elf-gdb
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(gdb) target remote localhost:3333
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And you can load the NuttX ELF file into FLASH:
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(gdb) load nuttx
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(There are also some files in the scripts/ directory that I used to
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get OpenOCD working with a Wriggler clone... I never got that stuff
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working).
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MMC/SD Slot
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^^^^^^^^^^^
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@ -253,7 +337,9 @@ ENC28J60 Module
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^^^^^^^^^^^^^^^
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The ENC28J60 module does not come on the Olimex-STR-P711, but this describes
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how I have connected it:
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how I have connected it. NOTE that the ENC28J60 requires an external interrupt
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(XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have
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both SPI0 and 1 together with this configuration.
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Module CON5 QFN ENC2860 Description
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--------------- -------------------------------------------------------
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@ -269,7 +355,7 @@ ENC28J60 Module
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6 5 NET RST 6 ~RESET Active-low device Reset input
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For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses
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P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset:
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P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset:
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Module CON5 Olimex STR-P711 Connection
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--------------- -------------------------------------------------------
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@ -280,50 +366,13 @@ ENC28J60 Module
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5 5 GND SPI0-1 GND
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10 J9-1 3V3 SPI0-6 3.3V
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9 2 WOL NC
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8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK
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8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK
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7 4 CLKOUT NC
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6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB
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6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO
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UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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interrupt conflict with TIM1.
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Using OpenOCD and GDB
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^^^^^^^^^^^^^^^^^^^^^
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I have been using the Olimex ARM-USB-OCD JTAG debugger with the STR-P711
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(http://www.olimex.com). The OpenOCD configuration file is here:
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scripts/oocd_ft2xx.cfg. There is also a script on the scripts/ directory that
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I used to start the OpenOCD daemon on my system called oocd.sh. That
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script would probably require some modifications to work in another
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environment:
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- possibly the value of OPENOCD_PATH
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- If you are working under Linux you will need to change any
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occurances of `cygpath -w blablabla` to just blablabla
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The setenv.sh file includes some environment varialble settings
|
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that are needed by oocd.sh. If you have $PATH and other environment
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variables set up, then you should be able to start the OpenOCD daemon like:
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oocd.sh
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Where it is assumed that you are executing oocd.sh from the top level
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directory where NuttX is installed.
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Once the OpenOCD daemon has been started, you can connect to it via
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GDB using the following GDB command:
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arm-elf-gdb
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(gdb) target remote localhost:3333
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And you can load the NuttX ELF file:
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(gdb) load nuttx
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(There are also some files in the scripts/ directory that I used to
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get OpenOCD working with a Wriggler clone... I never got that stuff
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working).
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Configurations:
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---------------
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@ -36,8 +36,10 @@
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/*
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* ENC28J60 Module
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*
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* The ENC28J60 module does not come on the Olimex-STR-P711, but this describes
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* how I have connected it:
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* The ENC28J60 module does not come on the Olimex-STR-P711, but this
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* describes how I have connected it. NOTE that the ENC28J60 requires an
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* external interrupt (XTI) pin. The only easily accessible XTI pins are on
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* SPI0/1 so you can't have both SPI0 and 1 together with this configuration.
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*
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* Module CON5 QFN ENC2860 Description
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* --------------- -------------------------------------------------------
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@ -53,7 +55,7 @@
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* 6 5 NET RST 6 ~RESET Active-low device Reset input
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*
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* For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses
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* P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset:
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* P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset:
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*
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* Module CON5 Olimex STR-P711 Connection
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* --------------- -------------------------------------------------------
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@ -64,14 +66,14 @@
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* 5 5 GND SPI0-1 GND
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* 10 J9-1 3V3 SPI0-6 3.3V
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* 9 2 WOL NC
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* 8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK
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* 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK
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* 7 4 CLKOUT NC
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* 6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB
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* 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO
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*
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* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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* interrupt conflict with TMR1.
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*/
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#warning "Need to select differnt interrupt pin.. XTI doesn't support this one"
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/****************************************************************************
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* Included Files
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@ -112,24 +114,41 @@
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#endif
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/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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* interrupt conflict with TIM1.
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* interrupt conflict with BSPI1.
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*/
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#ifdef CONFIG_STR71X_UART3
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# error "CONFIG_STR71X_UART3 cannot be used in this configuration"
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#endif
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#ifdef CONFIG_STR71X_TIM1
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# error "CONFIG_STR71X_TIM1 cannot be used in this configuration"
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#ifdef CONFIG_STR71X_I2C1
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# error "CONFIG_STR71X_I2C1 cannot be used in this configuration"
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#endif
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#ifdef CONFIG_STR71X_BSP1
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# error "CONFIG_STR71X_BSP1 cannot be used in this configuration"
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#endif
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/* SPI Assumptions **********************************************************/
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#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */
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#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */
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#define ENC28J60_IRQ STR71X_IRQ_FIRSTXTI /* NEEDED!!!!!!!!!!!!!!!! */
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#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */
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#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */
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#define ENC28J60_IRQ STR71X_IRQ_PORT0p6 /* XTI Line 11: P0.6 */
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#warning "Eventually need to fix XTI IRQ number!"
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/* ENC28J60 additional pins *************************************************
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*
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* NOTE: The ENC28J60 is a 3.3V part; however, it was designed to be
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* easily integrated into 5V systems. The SPI CS, SCK and SI inputs,
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* as well as the RESET pin, are all 5V tolerant. On the other hand,
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* if the host controller is operated at 5V, it quite likely will
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* not be within specifications when its SPI and interrupt inputs
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* are driven by the 3.3V CMOS outputs on the ENC28J60. A
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* unidirectional level translator would be necessary.
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*/
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# define ENC_GPIO0_CS (1 << 3) /* Chip select (P0.3) */
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# define ENC_GPIO0_NETRST (1 << 4) /* Reset (P0.4) */
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# define ENC_GPIO0_NETINT (1 << 6) /* Interrupt (P0.6) */
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/****************************************************************************
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* Private Data
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@ -150,6 +169,7 @@
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void up_netinitialize(void)
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{
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FAR struct spi_dev_s *spi;
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uint16_t reg16;
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int ret;
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/* Get the SPI port */
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@ -170,6 +190,12 @@ void up_netinitialize(void)
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return;
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}
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/* Take ENC28J60 out of reset (active low)*/
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reg16 = getreg16(STR71X_GPIO0_PD);
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reg16 &= ~ENC_GPIO0_NETRST;
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putreg16(reg16, STR71X_GPIO0_PD);
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/* Bind the SPI port to the ENC28J60 driver */
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ret = enc_initialize(spi, ENC28J60_DEVNO, ENC28J60_IRQ);
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@ -80,6 +80,14 @@
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# define CONFIG_STR714X_BSPI1_RXFIFO_DEPTH 8
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#endif
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#if defined(CONFIG_STR71X_UART3) && defined (CONFIG_STR71X_BSPI0)
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# warning "BSPI0 GPIO usage conflicts with UART3"
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#endif
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#if defined(CONFIG_STR71X_IC21) && defined (CONFIG_STR71X_BSPI0)
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# warning "BSPI0 GPIO usage conflicts with IC21"
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#endif
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#if defined(CONFIG_STR71X_HDLC) && defined (CONFIG_STR71X_BSPI1)
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# warning "BSPI1 GPIO usage conflicts with HDLC"
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#endif
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@ -129,7 +137,9 @@
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/* ENC28J60 Module
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*
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* The ENC28J60 module does not come on the Olimex-STR-P711, but this describes
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* how I have connected it:
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* how I have connected it. NOTE that the ENC28J60 requires an external interrupt
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* (XTI) pin. The only easily accessible XTI pins are on SPI0/1 so you can't have
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* both SPI0 and 1 together with this configuration.
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*
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* STR-P711 PIN PIN CONFIGURATION ENC28J60 CONNECTION
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* ----------------------- ----------------- -----------------------
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@ -140,23 +150,19 @@
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* GND GND 5 5 GND
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* 3.3V 3.3V 10 J9-1 3V3
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* NC NC 9 2 WOL
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* P1.4/T1.ICAPA/T1.EXTCLK P1.4 input 8 3 NET INT
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* P0.6/S1.SCLK P0.6 input 8 3 NET INT
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* NC NC 7 4 CLKOUT
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* P1.5/T1.ICAPB P1.5 output 6 5 NET RST
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* P0.4/S1.MISO P0.4 output 6 5 NET RST
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*/
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#ifdef CONFIG_NET_ENC28J60
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/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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* interrupt conflict with TMR1.
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* interrupt conflict with BSPI1
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*/
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# ifdef CONFIG_STR71X_UART3
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# error "CONFIG_STR71X_UART3 cannot be used in this configuration"
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# endif
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# ifdef CONFIG_STR71X_TIM3
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# error "CONFIG_STR71X_TIM3 cannot be used in this configuration"
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# ifdef CONFIG_STR71X_BSPI1
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# warning "CONFIG_STR71X_BSPI1 cannot be used in this configuration"
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# endif
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/* ENC28J60 additional pins
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@ -171,28 +177,19 @@
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*/
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# define ENC_GPIO0_CS (1 << 3)
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# define ENC_GPIO0_INTTL (0)
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# define ENC_GPIO0_INCMOS (0)
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# define ENC_GPIO0_OUTPP ENC_GPIO0_CS
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# define ENC_GPIO0_ALL ENC_GPIO0_CS
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# define ENC_GPIO0_NETRST (1 << 4)
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# define ENC_GPIO0_NETINT (1 << 6)
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# define ENC_GPIO1_NETINT ( 1 << 4)
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# define ENC_GPIO1_NETRST (1 << 5)
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# define ENC_GPIO1_INTTL (0)
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# define ENC_GPIO1_INCMOS ENC_GPIO1_NETINT
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# define ENC_GPIO1_OUTPP ENC_GPIO1_NETRST
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# define ENC_GPIO1_ALL (ENC_GPIO1_NETINT|ENC_GPIO1_NETRST)
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# define ENC_GPIO0_INTTL (0)
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# define ENC_GPIO0_INCMOS ENC_GPIO0_NETINT
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# define ENC_GPIO0_OUTPP (ENC_GPIO0_CS|ENC_GPIO0_NETRST)
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# define ENC_GPIO0_ALL (ENC_GPIO0_CS|ENC_GPIO0_NETINT|ENC_GPIO0_NETRST)
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# define BSPI0_GPIO0_INTTL ENC_GPIO0_INTTL
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# define BSPI0_GPIO0_INCMOS ENC_GPIO0_INCMOS
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# define BSPI0_GPIO0_OUTPP ENC_GPIO0_OUTPP
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# define BSPI0_GPIO0_ALL (BSPI0_GPIO0_ALT|ENC_GPIO0_ALL)
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# define BSPI0_GPIO1_INTTL ENC_GPIO1_INTTL
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# define BSPI0_GPIO1_INCMOS ENC_GPIO1_INCMOS
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# define BSPI0_GPIO1_OUTPP ENC_GPIO1_OUTPP
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# define BSPI0_GPIO1_ALL ENC_GPIO1_ALL
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#else
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# define BSPI0_GPIO0_INTTL (0)
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# define BSPI0_GPIO0_INCMOS (0)
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@ -227,7 +224,7 @@
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* P1.15/HTXD 13/15 CP P1.15 input
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*
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* Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts
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* with NTXD.
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* with HTXD.
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*/
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/* MMC/SD additional pins */
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@ -907,11 +904,13 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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reg16 |= (BSPI0_GPIO0_ALT|BSPI0_GPIO0_OUTPP);
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putreg16(reg16, STR71X_GPIO0_PC2);
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/* Start with enc28j60 disabled */
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/* Start with enc28j60 de-selected (active low) and in
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* reset (also active low)
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*/
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#ifdef CONFIG_NET_ENC28J60
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reg16 = getreg16(STR71X_GPIO0_PD);
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reg16 |= ENC_GPIO0_CS;
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reg16 |= (ENC_GPIO0_CS | ENC_GPIO0_NETRST);
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putreg16(reg16, STR71X_GPIO0_PD);
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#endif
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@ -933,6 +932,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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* PC0=1 PC1=0 PC2=1: Output, push pull
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*/
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#ifdef BSPI0_GPIO1_ALL
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reg16 = getreg16(STR71X_GPIO1_PC0);
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reg16 &= ~BSPI0_GPIO1_ALL;
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reg16 |= (BSPI0_GPIO1_INTTL|BSPI0_GPIO1_OUTPP);
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@ -947,7 +947,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
|
||||
reg16 &= ~BSPI0_GPIO1_ALL;
|
||||
reg16 |= BSPI0_GPIO0_OUTPP;
|
||||
putreg16(reg16, STR71X_GPIO1_PC2);
|
||||
|
||||
#endif
|
||||
g_spidev0.initialized = true;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user