Fixes for the STM32 quadrature encoder
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4422 42af7a65-404d-4744-a932-0658087f49c3
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@ -2,7 +2,7 @@
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* configs/stm32f4discovery/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -233,6 +233,9 @@
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#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
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#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
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#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
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#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
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/************************************************************************************
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* Public Data
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************************************************************************************/
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@ -55,21 +55,64 @@
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* Definitions
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************************************************************************************/
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/* Configuration *******************************************************************/
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/* The following checks assum that the quadrature encoder is on TIM2. Make the
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* appropriate changes if your configuration differes.
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*/
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/* Check if we have a timer configured for quadrature encoder -- assume YES. */
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#define HAVE_QENCODER 1
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/* If TIMn is not enabled (via CONFIG_STM32_TIMn), then the configuration cannot
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* specify TIMn as a quadrature encoder (via CONFIG_STM32_TIMn_QE).
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*/
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#ifndef CONFIG_STM32_TIM1
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# undef CONFIG_STM32_TIM1_QE
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#endif
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#ifndef CONFIG_STM32_TIM2
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# undef CONFIG_STM32_TIM2_QE
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#endif
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#ifndef CONFIG_STM32_TIM3
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# undef CONFIG_STM32_TIM3_QE
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#endif
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#ifndef CONFIG_STM32_TIM4
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# undef CONFIG_STM32_TIM4_QE
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#endif
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#ifndef CONFIG_STM32_TIM5
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# undef CONFIG_STM32_TIM5_QE
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#endif
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#ifndef CONFIG_STM32_TIM8
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# undef CONFIG_STM32_TIM8_QE
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#endif
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/* If the upper-half quadrature encoder driver is not enabled, then we cannot
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* support the quadrature encoder.
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*/
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#ifndef CONFIG_QENCODER
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# undef HAVE_QENCODER
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#endif
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#ifndef CONFIG_STM32_TIM2
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# undef HAVE_QENCODER
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#endif
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/* Which Timer should we use, TIMID={1,2,3,4,5,8}. If multiple timers are
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* configured as quadrature encoders, this logic will arbitrarily select
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* the lowest numbered timer.
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*
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* At least one TIMn, n={1,2,3,4,5,8}, must be both enabled and configured
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* as a quadrature encoder in order to support the lower half quadrature
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* encoder driver. The above check assures that if CONFIG_STM32_TIMn_QE
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* is defined, then the correspdonding TIMn is also enabled.
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*/
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#ifndef CONFIG_STM32_TIM2_QE
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#if defined CONFIG_STM32_TIM1_QE
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# define TIMID 1
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#elif defined CONFIG_STM32_TIM2_QE
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# define TIMID 2
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#elif defined CONFIG_STM32_TIM3_QE
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# define TIMID 3
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#elif defined CONFIG_STM32_TIM4_QE
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# define TIMID 4
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#elif defined CONFIG_STM32_TIM5_QE
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# define TIMID 5
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#elif defined CONFIG_STM32_TIM8_QE
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# define TIMID 8
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#else
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# undef HAVE_QENCODER
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#endif
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@ -128,7 +171,7 @@ int qe_devinit(void)
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/* Initialize a quadrature encoder interface. */
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qevdbg("Initializing the quadrature encoder\n");
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ret = stm32_qeinitialize("/dev/qe0", 2);
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ret = stm32_qeinitialize("/dev/qe0", TIMID);
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if (ret < 0)
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{
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qedbg("stm32_qeinitialize failed: %d\n", ret);
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