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SAML21: Add DMA descriptor management logic

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This commit is contained in:
Gregory Nutt 2015-06-14 08:48:25 -06:00
parent 19bbebd10e
commit b1154a4a42
1 changed files with 7 additions and 1 deletions
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8
configs/saml21-xplained/scripts/flash.ld
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@ -34,13 +34,15 @@
****************************************************************************/
/* The ATSAML21J18A has 256KB of FLASH beginning at address 0x0000:0000 and
* 32KB of SRAM beginning at address 0x2000:0000
* 32KB of SRAM beginning at address 0x2000:0000. There is also 8KB low-
* power SRAM at 0x30000000 that may be used by the DMAC.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
lpram (rw) : ORIGIN = 0x30000000, LENGTH = 8K
}
OUTPUT_ARCH(arm)
@ -107,6 +109,10 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sram
.lpram : {
*(.lpram)
} > lpram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }