arch/armv8-r: fix typos in config
replace ARMV7R to ARMV8R Signed-off-by: chao an <anchao@lixiang.com>
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6f0daf08eb
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@ -357,7 +357,7 @@ static inline irqstate_t up_irq_save(void)
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(
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"\tmrs %0, cpsr\n"
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"\tcpsid i\n"
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#if defined(CONFIG_ARMV7R_DECODEFIQ)
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#if defined(CONFIG_ARMV8R_DECODEFIQ)
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"\tcpsid f\n"
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#endif
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: "=r" (cpsr)
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@ -378,7 +378,7 @@ static inline irqstate_t up_irq_enable(void)
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(
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"\tmrs %0, cpsr\n"
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"\tcpsie i\n"
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#if defined(CONFIG_ARMV7R_DECODEFIQ)
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#if defined(CONFIG_ARMV8R_DECODEFIQ)
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"\tcpsie f\n"
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#endif
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: "=r" (cpsr)
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@ -6,7 +6,7 @@
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comment "ARMv8-R Configuration Options"
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config ARMV8R_HAVE_GICv3
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bool "ARMV7R_GICv3 support"
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bool "ARMV8R_GICv3 support"
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select ARCH_HAVE_IRQTRIGGER
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default y
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---help---
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@ -44,7 +44,7 @@ config ARMV8R_HAVE_DECODEFIQ
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config ARMV8R_DECODEFIQ
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bool "FIQ Handler"
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default n
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depends on ARMV7R_HAVE_DECODEFIQ
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depends on ARMV8R_HAVE_DECODEFIQ
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---help---
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Select this option if your platform supports the function
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arm_decodefiq().
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@ -18,8 +18,8 @@
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_ARMV7_R_ARM_ARCH_TIMER_H
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#define __ARCH_ARM_SRC_ARMV7_R_ARM_ARCH_TIMER_H
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#ifndef __ARCH_ARM_SRC_ARMV8_R_ARM_ARCH_TIMER_H
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#define __ARCH_ARM_SRC_ARMV8_R_ARM_ARCH_TIMER_H
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/****************************************************************************
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* Included Files
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@ -55,4 +55,4 @@
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void arm_arch_timer_secondary_init(void);
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#endif
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#endif /* __ARCH_ARM_SRC_ARMV7_R_ARM_ARCH_TIMER_H */
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#endif /* __ARCH_ARM_SRC_ARMV8_R_ARM_ARCH_TIMER_H */
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@ -131,13 +131,13 @@ void up_initial_state(struct tcb_s *tcb)
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cpsr |= (PSR_I_BIT | PSR_F_BIT);
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#else /* CONFIG_SUPPRESS_INTERRUPTS */
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/* Leave IRQs enabled (Also FIQs if CONFIG_ARMV7R_DECODEFIQ is selected) */
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/* Leave IRQs enabled (Also FIQs if CONFIG_ARMV8R_DECODEFIQ is selected) */
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#ifndef CONFIG_ARMV8R_DECODEFIQ
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cpsr |= PSR_F_BIT;
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#endif /* !CONFIG_ARMV7R_DECODEFIQ */
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#endif /* !CONFIG_ARMV8R_DECODEFIQ */
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#ifdef CONFIG_ARM_THUMB
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cpsr |= PSR_T_BIT;
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@ -755,7 +755,7 @@ g_intstacktop:
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* Name: g_fiqstackalloc/g_fiqstacktop
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****************************************************************************/
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#ifdef CONFIG_ARMV7R_DECODEFIQ
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#ifdef CONFIG_ARMV8R_DECODEFIQ
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.globl g_fiqstackalloc
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.type g_fiqstackalloc, object
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.globl g_fiqstacktop
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@ -46,8 +46,8 @@
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* ARM DDI 0406C.c (ID051414)
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*/
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#ifndef __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H
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#define __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H
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#ifndef __ARCH_ARM_SRC_ARMV8_R_CP15_CACHEOPS_H
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#define __ARCH_ARM_SRC_ARMV8_R_CP15_CACHEOPS_H
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/****************************************************************************
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* Included Files
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@ -1135,4 +1135,4 @@ uint32_t cp15_cache_linesize(void);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H */
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#endif /* __ARCH_ARM_SRC_ARMV8_R_CP15_CACHEOPS_H */
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