bad offset
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@ -77,7 +77,7 @@
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#define STM32_OTG_CID_OFFSET 0x003c /* Core ID register */
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#define STM32_OTG_HPTXFSIZ_OFFSET 0x0100 /* Host periodic transmit FIFO size register */
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#define STM32_OTG_DIEPTXF_OFFSET(n) (104+(((n)-1) << 2))
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#define STM32_OTG_DIEPTXF_OFFSET(n) (0x0104+(((n)-1) << 2))
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/* Host-mode control and status registers */
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