SAM4L: Mic fixes to get the SAM4L Xplained running. The ostest now passes.
This commit is contained in:
parent
cc8906e701
commit
b24d51c3c7
@ -140,7 +140,7 @@ config ARCH_CHIP_SAM4S
|
||||
bool
|
||||
default n
|
||||
|
||||
menu "AT91SAM3 Peripheral Support"
|
||||
menu "AT91SAM3/4 Peripheral Support"
|
||||
|
||||
config SAM_PICOCACHE
|
||||
bool "PICOCACHE"
|
||||
|
@ -156,7 +156,7 @@
|
||||
#define BSCIF_PCLKSR_BOD18SYNRDY (1 << 8) /* Bit 8 */
|
||||
#define BSCIF_PCLKSR_SSWRDY (1 << 9) /* Bit 9: Buck voltage regulator has stopped switching */
|
||||
#define BSCIF_PCLKSR_VREGOK (1 << 10) /* Bit 10 */
|
||||
#define BSCIF_PCLKSR_RC1MRDY (1 << 10) /* Bit 11 */
|
||||
#define BSCIF_PCLKSR_RC1MRDY (1 << 11) /* Bit 11 */
|
||||
#define BSCIF_PCLKSR_LPBGRDY (1 << 12) /* Bit 12 */
|
||||
|
||||
/* Unlock Register */
|
||||
|
@ -133,7 +133,7 @@
|
||||
# error BOARD_OSC0_STARTUP_US is out of range
|
||||
# endif
|
||||
|
||||
# ifdef BOARD_OSC0_IS_XTAL
|
||||
# ifdef BOARD_OSC0_ISXTAL
|
||||
# define SAM_OSC0_MODE_VALUE SCIF_OSCCTRL0_MODE
|
||||
# if BOARD_OSC0_FREQUENCY < 2000000
|
||||
# define SAM_OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(0)
|
||||
@ -188,8 +188,8 @@
|
||||
# error BOARD_OSC32_STARTUP_US is out of range
|
||||
# endif
|
||||
|
||||
# ifdef BOARD_OSC32_IS_XTAL
|
||||
# define SAM_OSC32_MODE_VALUE SCIF_OSCCTRL32_MODE_XTAL
|
||||
# ifdef BOARD_OSC32_ISXTAL
|
||||
# define SAM_OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_XTAL
|
||||
# else
|
||||
# define SAM_OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_EXTCLK
|
||||
# endif
|
||||
@ -915,6 +915,25 @@ static inline void sam_setdividers(void)
|
||||
putreg32(pbdsel, SAM_PM_PBDSEL);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_enable_fastwakeup
|
||||
*
|
||||
* Description:
|
||||
* Enable FLASH fast wakeup mode.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void sam_enable_fastwakeup(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
regval = getreg32(SAM_BPM_PMCON);
|
||||
regval |= BPM_PMCON_FASTWKUP;
|
||||
putreg32(BPM_UNLOCK_KEY(0xaa) | BPM_UNLOCK_ADDR(SAM_BPM_PMCON_OFFSET),
|
||||
SAM_BPM_UNLOCK);
|
||||
putreg32(regval, SAM_BPM_PMCON);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: set_flash_waitstate
|
||||
*
|
||||
@ -1148,7 +1167,7 @@ static inline void sam_setpsm(uint32_t psm)
|
||||
|
||||
regval = getreg32(SAM_BPM_PMCON);
|
||||
regval &= ~BPM_PMCON_PS_MASK;
|
||||
regval |= (psm | BPM_PMCON_PSCM | BPM_PMCON_PSCREQ);
|
||||
regval |= (psm | BPM_PMCON_PSCM | BPM_PMCON_PSCREQ);
|
||||
|
||||
/* Then call the RAMFUNC sam_setpsm() to set the new power scaling mode */
|
||||
|
||||
@ -1206,7 +1225,6 @@ static inline void sam_usbclock(void)
|
||||
|
||||
void sam_clockconfig(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t psm;
|
||||
bool fastwkup;
|
||||
|
||||
@ -1248,32 +1266,24 @@ void sam_clockconfig(void)
|
||||
|
||||
psm = BPM_PMCON_PS2;
|
||||
fastwkup = false;
|
||||
|
||||
#elif BOARD_CPU_FREQUENCY <= FLASH_MAXFREQ_PS1_HSDIS_FWS1
|
||||
/* Not high speed mode and frequency is below the thrshold. We can go to
|
||||
* power scaling mode 1.
|
||||
*/
|
||||
|
||||
psm = BPM_PMCON_PS1;
|
||||
|
||||
# if BOARD_CPU_FREQUENCY > FLASH_MAXFREQ_PS1_HSDIS_FWS0
|
||||
/* We need to enable fast wakeup */
|
||||
|
||||
sam_enable_fastwakeup()
|
||||
fastwkup = true;
|
||||
# endif
|
||||
#else
|
||||
/* Not high speed mode. Check if we can go to power scaling mode 1. */
|
||||
/* Power scaling mode 0, disable high speed mode, no fast wakeup */
|
||||
|
||||
if (BOARD_CPU_FREQUENCY <= FLASH_MAXFREQ_PS1_HSDIS_FWS1)
|
||||
{
|
||||
/* Yes.. Do we also need to enable fast wakeup? */
|
||||
|
||||
psm = BPM_PMCON_PS1;
|
||||
if (BOARD_CPU_FREQUENCY > FLASH_MAXFREQ_PS1_HSDIS_FWS0)
|
||||
{
|
||||
/* Yes.. enable fast wakeup */
|
||||
|
||||
regval = getreg32(SAM_BPM_PMCON);
|
||||
regval |= BPM_PMCON_FASTWKUP;
|
||||
putreg32(BPM_UNLOCK_KEY(0xaa) | BPM_UNLOCK_ADDR(SAM_BPM_PMCON_OFFSET), SAM_BPM_UNLOCK);
|
||||
putreg32(regval, SAM_BPM_PMCON);
|
||||
|
||||
/* We need to remember that we did this */
|
||||
|
||||
fastwkup = true;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
psm = BPM_PMCON_PS0;
|
||||
}
|
||||
psm = BPM_PMCON_PS0;
|
||||
#endif
|
||||
|
||||
/* Enable clock sources:
|
||||
|
@ -351,7 +351,9 @@ void sam_lowsetup(void)
|
||||
|
||||
putreg32(MR_VALUE, SAM_CONSOLE_BASE + SAM_UART_MR_OFFSET);
|
||||
|
||||
/* Configure the console baud */
|
||||
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
|
||||
* This may limit BAUD rates for lower USART clocks.
|
||||
*/
|
||||
|
||||
putreg32(((SAM_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) / (SAM_CONSOLE_BAUD << 4)),
|
||||
SAM_CONSOLE_BASE + SAM_UART_BRGR_OFFSET);
|
||||
|
@ -959,7 +959,9 @@ static int up_setup(struct uart_dev_s *dev)
|
||||
|
||||
up_serialout(priv, SAM_UART_MR_OFFSET, regval);
|
||||
|
||||
/* Configure the console baud */
|
||||
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
|
||||
* This may limit BAUD rates for lower USART clocks.
|
||||
*/
|
||||
|
||||
regval = (SAM_USART_CLOCK + (priv->baud << 3))/(priv->baud << 4);
|
||||
up_serialout(priv, SAM_UART_BRGR_OFFSET, regval);
|
||||
|
@ -15,7 +15,7 @@ Contents
|
||||
- NuttX OABI "buildroot" Toolchain
|
||||
- NXFLAT Toolchain
|
||||
- LEDs
|
||||
- Virtual COM Port
|
||||
- Serial Consoles
|
||||
- SAM4L Xplained Pro-specific Configuration Options
|
||||
- Configurations
|
||||
|
||||
@ -243,8 +243,27 @@ LEDs
|
||||
apparently, running normmally. If LED0 is flashing at approximately
|
||||
2Hz, then a fatal error has been detected and the system has halted.
|
||||
|
||||
Virtual COM Port
|
||||
^^^^^^^^^^^^^^^^
|
||||
Serial Consoles
|
||||
^^^^^^^^^^^^^^^
|
||||
|
||||
USART0
|
||||
------
|
||||
|
||||
USART is available on connectors EXT1 and EXT4
|
||||
|
||||
EXT1 TXT4 GPIO Function
|
||||
---- ---- ------ -----------
|
||||
13 13 PB00 USART0_RXD
|
||||
14 14 PB01 USART0_TXD
|
||||
19 19 GND
|
||||
20 20 VCC
|
||||
|
||||
If you have a TTL to RS-232 convertor then this is the most convenient
|
||||
serial console to use. It is the default in all of these configurations.
|
||||
An option is to use the virtual COM port.
|
||||
|
||||
Virtual COM Port
|
||||
----------------
|
||||
|
||||
The SAM4L Xplained Pro contains an Embedded Debugger (EDBG) that can be
|
||||
used to program and debug the ATSAM4LC4C using Serial Wire Debug (SWD).
|
||||
@ -278,8 +297,8 @@ SAM4L Xplained Pro-specific Configuration Options
|
||||
chip:
|
||||
|
||||
CONFIG_ARCH_CHIP_SAM34
|
||||
CONFIG_ARCH_CHIP_SAM3U
|
||||
CONFIG_ARCH_CHIP_AT91SAM3U4
|
||||
CONFIG_ARCH_CHIP_SAM4L
|
||||
CONFIG_ARCH_CHIP_ATSAM4LC4C
|
||||
|
||||
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
||||
hence, the board that supports the particular chip or SoC.
|
||||
@ -298,7 +317,7 @@ SAM4L Xplained Pro-specific Configuration Options
|
||||
|
||||
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
||||
|
||||
CONFIG_DRAM_SIZE=0x0000c000 (48Kb)
|
||||
CONFIG_DRAM_SIZE=0x00008000 (32Kb)
|
||||
|
||||
CONFIG_DRAM_START - The start address of installed DRAM
|
||||
|
||||
@ -396,7 +415,7 @@ SAM4L Xplained Pro-specific Configuration Options
|
||||
CONFIG_USART2_ISUART
|
||||
CONFIG_USART3_ISUART
|
||||
|
||||
AT91SAM3U specific device driver settings
|
||||
ST91SAM4L specific device driver settings
|
||||
|
||||
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART
|
||||
m (m=4,5) for the console and ttys0 (default is the USART1).
|
||||
@ -409,13 +428,6 @@ SAM4L Xplained Pro-specific Configuration Options
|
||||
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
||||
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
||||
|
||||
LCD Options. Other than the standard LCD configuration options
|
||||
(see configs/README.txt), the SAM4L Xplained Pro driver also supports:
|
||||
|
||||
CONFIG_LCD_PORTRAIT - Present the display in the standard 240x320
|
||||
"Portrait" orientation. Default: The display is rotated to
|
||||
support a 320x240 "Landscape" orientation.
|
||||
|
||||
Configurations
|
||||
^^^^^^^^^^^^^^
|
||||
|
||||
@ -442,3 +454,25 @@ must be is one of the following:
|
||||
ostest:
|
||||
This configuration directory, performs a simple OS test using
|
||||
examples/ostest.
|
||||
|
||||
NOTES:
|
||||
|
||||
1. This configuration provides test output on USART0 which is available
|
||||
on EXT1 or EXT4 (see the section "Serial Consoles" above). The
|
||||
virtual COM port could be used, instead, by reconfiguring to use
|
||||
USART1 instead of USART0:
|
||||
|
||||
System Type -> AT91SAM3/4 Peripheral Support
|
||||
CONFIG_SAM_USART0=y
|
||||
CONFIG_SAM_USART1=n
|
||||
|
||||
Device Drivers -> Serial Driver Support -> Serial Console
|
||||
CONFIG_USART0_SERIAL_CONSOLE=y
|
||||
|
||||
Device Drivers -> Serial Driver Support -> USART0 Configuration
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART0_BAUD=115200
|
||||
CONFIG_USART0_BITS=8
|
||||
CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART0_RXBUFSIZE=256
|
||||
CONFIG_USART0_TXBUFSIZE=256
|
||||
|
@ -84,15 +84,29 @@
|
||||
#define BOARD_RCFAST12M_FREQUENCY 12000000 /* Nominal frequency of RCFAST12M (Hz) */
|
||||
#define BOARD_RC1M_FREQUENCY 1000000 /* Nominal frequency of RC1M (Hz) */
|
||||
|
||||
/* The SAM4L Xplained Pro has two on-board crystals:
|
||||
* XC100 12MHz OSC0
|
||||
* XC101 32.768KHz OSC32
|
||||
*/
|
||||
|
||||
/* OSC0 Configuration */
|
||||
|
||||
#define BOARD_OSC0_FREQUENCY 12000000 /* 12MHz XTAL */
|
||||
|
||||
/* OSC32 Configuration */
|
||||
|
||||
#define BOARD_OSC32_FREQUENCY 32768
|
||||
#define BOARD_OSC32_FREQUENCY 32768 /* 32.768KHz XTAL */
|
||||
#define BOARD_OSC32_STARTUP_US 6100
|
||||
#define BOARD_OSC32_SELCURR BSCIF_OSCCTRL32_SELCURR_300
|
||||
#define BOARD_OSC32_ISXTAL 1 /* OSC32 is a crystal */
|
||||
|
||||
/* Digital Frequency Locked Loop configuration
|
||||
* Fdfll = (Fclk * DFLLmul) / DFLLdiv
|
||||
* = 32768 * (48000000/32760) / 1 = 48MHz
|
||||
* = 32768 * (48000000/32768) / 1 = 48MHz
|
||||
*
|
||||
* The actual frequency is 47.97MHz due to truncation of the multiplier.
|
||||
* The 48MHz target value is treated as "not-to-exceed" value). Use OSC0
|
||||
* if you need more accuracy (12MHz with a multiplier of 4).
|
||||
*
|
||||
* DFLL0 source options (select one):
|
||||
* BOARD_DFLL0_SOURCE_RCSYS - System RC oscillator
|
||||
@ -105,9 +119,10 @@
|
||||
*/
|
||||
|
||||
#define BOARD_DFLL0_SOURCE_OSC32K 1
|
||||
#define BOARD_DFLL0_FREQUENCY 48000000
|
||||
#define BOARD_DFLL0_MUL (BOARD_DFLL0_FREQUENCY / BOARD_OSC32_FREQUENCY)
|
||||
#define BOARD_DFLL0_TARGET 48000000
|
||||
#define BOARD_DFLL0_MUL (BOARD_DFLL0_TARGET / BOARD_OSC32_FREQUENCY)
|
||||
#define BOARD_DFLL0_DIV 1
|
||||
#define BOARD_DFLL0_FREQUENCY (BOARD_OSC32_FREQUENCY * BOARD_DFLL0_MUL / BOARD_DFLL0_DIV)
|
||||
|
||||
/* Phase Locked Loop configuration
|
||||
* Fdfll = (Fclk * PLLmul) / PLLdiv
|
||||
@ -134,22 +149,22 @@
|
||||
* NOTE: Nothing must be defined if the PLL0 is not used
|
||||
*/
|
||||
|
||||
/* System clock dividers: Fbus = Fsys >> BUSshift */
|
||||
/* System clock dividers: Fbus = Fmck >> BUSshift */
|
||||
|
||||
#define BOARD_CPU_SHIFT 0 /* Fcpu = Fsys = 48MHz */
|
||||
#define BOARD_PBA_SHIFT 0 /* Fpba = Fsys = 48MHz */
|
||||
#define BOARD_PBB_SHIFT 0 /* Fpbb = Fsys = 48MHz */
|
||||
#define BOARD_PBC_SHIFT 0 /* Fpbc = Fsys = 48MHz */
|
||||
#define BOARD_PBD_SHIFT 0 /* Fpbd = Fsys = 48MHz */
|
||||
#define BOARD_CPU_SHIFT 0 /* Fcpu = Fmck = 48MHz */
|
||||
#define BOARD_PBA_SHIFT 0 /* Fpba = Fmck = 48MHz */
|
||||
#define BOARD_PBB_SHIFT 0 /* Fpbb = Fmck = 48MHz */
|
||||
#define BOARD_PBC_SHIFT 0 /* Fpbc = Fmck = 48MHz */
|
||||
#define BOARD_PBD_SHIFT 0 /* Fpbd = Fmck = 48MHz */
|
||||
|
||||
/* Resulting frequencies */
|
||||
|
||||
#define BOARD_MAIN_FREQUENCY (12000000)
|
||||
#define BOARD_CPU_FREQUENCY (BOARD_MAIN_FREQUENCY >> BOARD_CPU_SHIFT)
|
||||
#define BOARD_PBA_FREQUENCY (BOARD_MAIN_FREQUENCY >> BOARD_PBA_SHIFT)
|
||||
#define BOARD_PBB_FREQUENCY (BOARD_MAIN_FREQUENCY >> BOARD_PBB_SHIFT)
|
||||
#define BOARD_PBC_FREQUENCY (BOARD_MAIN_FREQUENCY >> BOARD_PBC_SHIFT)
|
||||
#define BOARD_PBD_FREQUENCY (BOARD_MAIN_FREQUENCY >> BOARD_PBD_SHIFT)
|
||||
#define BOARD_MCK_FREQUENCY (BOARD_DFLL0_FREQUENCY)
|
||||
#define BOARD_CPU_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_CPU_SHIFT)
|
||||
#define BOARD_PBA_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBA_SHIFT)
|
||||
#define BOARD_PBB_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBB_SHIFT)
|
||||
#define BOARD_PBC_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBC_SHIFT)
|
||||
#define BOARD_PBD_FREQUENCY (BOARD_MCK_FREQUENCY >> BOARD_PBD_SHIFT)
|
||||
|
||||
/* USBC.
|
||||
*
|
||||
@ -238,10 +253,21 @@
|
||||
#define BUTTON_SW0_BIT (1 << BUTTON_SW0)
|
||||
|
||||
/* Alternate Function Disambiguation ************************************************/
|
||||
/* The SAM4L Xplained Pro contains an Embedded Debugger (EDBG) that can be
|
||||
* used to program and debug the ATSAM4LC4C using Serial Wire Debug (SWD).
|
||||
* The Embedded debugger also include a Virtual Com port interface over
|
||||
* USART1. Virtual COM port connections:
|
||||
/* USART0 is also available on connectors EXT1 and EXT4:
|
||||
*
|
||||
* EXT1 TXT4 GPIO Function
|
||||
* ---- ---- ------ -----------
|
||||
* 13 13 PB00 USART0_RXD
|
||||
* 14 14 PB01 USART0_TXD
|
||||
*/
|
||||
|
||||
#define GPIO_USART0_RXD GPIO_USART0_RXD_4
|
||||
#define GPIO_USART0_TXD GPIO_USART0_TXD_4
|
||||
|
||||
/* The SAM4L Xplained Pro contains an Embedded Debugger (EDBG) that can be used to
|
||||
* program and debug the ATSAM4LC4C using Serial Wire Debug (SWD). The Embedded
|
||||
* debugger also include a Virtual Com port interface over USART1. Virtual COM
|
||||
* port connections:
|
||||
*
|
||||
* PC26 USART1 RXD
|
||||
* PC27 USART1 TXD
|
||||
|
@ -124,7 +124,7 @@ CONFIG_ARCH_CHIP_SAM4L=y
|
||||
# CONFIG_ARCH_CHIP_SAM4S is not set
|
||||
|
||||
#
|
||||
# AT91SAM3 Peripheral Support
|
||||
# AT91SAM3/4 Peripheral Support
|
||||
#
|
||||
CONFIG_SAM_PICOCACHE=y
|
||||
# CONFIG_SAM34_OCD is not set
|
||||
@ -141,8 +141,8 @@ CONFIG_SAM_PICOCACHE=y
|
||||
# CONFIG_SAM34_TWIM2 is not set
|
||||
# CONFIG_SAM34_TWIM3 is not set
|
||||
# CONFIG_SAM34_PICOUART is not set
|
||||
# CONFIG_SAM34_USART0 is not set
|
||||
CONFIG_SAM34_USART1=y
|
||||
CONFIG_SAM34_USART0=y
|
||||
# CONFIG_SAM34_USART1 is not set
|
||||
# CONFIG_SAM34_USART2 is not set
|
||||
# CONFIG_SAM34_USART3 is not set
|
||||
# CONFIG_SAM34_ADCIFE is not set
|
||||
@ -170,7 +170,7 @@ CONFIG_SAM34_USART1=y
|
||||
#
|
||||
# AT91SAM3/4 USART Configuration
|
||||
#
|
||||
CONFIG_USART1_ISUART=y
|
||||
CONFIG_USART0_ISUART=y
|
||||
|
||||
#
|
||||
# AT91SAM3/4 GPIO Interrupt Configuration
|
||||
@ -331,22 +331,22 @@ CONFIG_DEV_NULL=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_DEV_LOWCONSOLE=y
|
||||
# CONFIG_16550_UART is not set
|
||||
CONFIG_ARCH_HAVE_USART1=y
|
||||
CONFIG_ARCH_HAVE_USART0=y
|
||||
CONFIG_MCU_SERIAL=y
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART0_SERIAL_CONSOLE=y
|
||||
# CONFIG_NO_SERIAL_CONSOLE is not set
|
||||
|
||||
#
|
||||
# USART1 Configuration
|
||||
# USART0 Configuration
|
||||
#
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
# CONFIG_USART1_IFLOWCONTROL is not set
|
||||
# CONFIG_USART1_OFLOWCONTROL is not set
|
||||
CONFIG_USART0_RXBUFSIZE=256
|
||||
CONFIG_USART0_TXBUFSIZE=256
|
||||
CONFIG_USART0_BAUD=115200
|
||||
CONFIG_USART0_BITS=8
|
||||
CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART0_2STOP=0
|
||||
# CONFIG_USART0_IFLOWCONTROL is not set
|
||||
# CONFIG_USART0_OFLOWCONTROL is not set
|
||||
# CONFIG_SERIAL_IFLOWCONTROL is not set
|
||||
# CONFIG_SERIAL_OFLOWCONTROL is not set
|
||||
# CONFIG_USBDEV is not set
|
||||
|
Loading…
Reference in New Issue
Block a user