Updated STM32 OTG FS device driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4584 42af7a65-404d-4744-a932-0658087f49c3
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@ -810,10 +810,18 @@ static void stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv)
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{
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uint32_t regval;
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/* Setup the hardware to perform the SETUP transfer */
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regval = (USB_SIZEOF_CTRLREQ * 3 << OTGFS_DOEPTSIZ0_XFRSIZ_SHIFT) |
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(OTGFS_DOEPTSIZ0_PKTCNT) |
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(3 << OTGFS_DOEPTSIZ0_STUPCNT_SHIFT);
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stm32_putreg(regval, STM32_OTGFS_DOEPTSIZ0);
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/* Then clear NAKing and enable the transfer */
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regval = stm32_getreg(STM32_OTGFS_DOEPCTL0);
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regval |= (OTGFS_DOEPCTL0_CNAK | OTGFS_DOEPCTL0_EPENA);
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stm32_putreg(regval, STM32_OTGFS_DOEPCTL0);
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}
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/****************************************************************************
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@ -2271,7 +2279,8 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
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/* Endpoint disabled interrupt (ignored because this interrrupt is
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* used in polled mode by the endpoint disable logic).
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*/
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#if 0
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#if 1
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#warning "REVISIT"
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if ((doepint & OTGFS_DOEPINT_EPDISD) != 0)
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{
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint);
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@ -2834,6 +2843,7 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv)
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*/
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stm32_req_complete(privep, -EIO);
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#warning "Will clear OTGFS_DIEPCTL_USBAEP too"
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stm32_epin_disable(privep);
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break;
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}
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@ -2915,6 +2925,7 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv)
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*/
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stm32_req_complete(privep, -EIO);
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#warning "Will clear OTGFS_DOEPCTL_USBAEP too"
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stm32_epout_disable(privep);
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break;
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}
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@ -3178,7 +3189,9 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep)
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/* First, make sure that there is no GNOAKEFF interrupt pending. */
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#if 0
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stm32_putreg(OTGFS_GINT_GONAKEFF, STM32_OTGFS_GINTSTS);
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#endif
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/* Enable Global OUT NAK mode in the core. */
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@ -3187,11 +3200,23 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep)
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stm32_putreg(regval, STM32_OTGFS_DCTL);
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/* Wait for the GONAKEFF interrupt that indicates that the OUT NAK
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* mode is in effect.
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* mode is in effect. When the interrupt handler pops the OUTNAK word
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* from the RxFIFO, the core sets the GONAKEFF interrupt.
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*/
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#if 0
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while ((stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINT_GONAKEFF) == 0);
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stm32_putreg(OTGFS_GINT_GONAKEFF, STM32_OTGFS_GINTSTS);
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/* Since we are in the interrupt handler, we cannot wait inline for the
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* GONAKEFF because it cannot occur until service th RXFLVL global interrupt
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* and pop the OUTNAK word from the RxFIFO.
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*/
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#else
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#warning "REVISIT"
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up_mdelay(50);
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#endif
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}
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/*******************************************************************************
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@ -3280,7 +3305,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
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regaddr = STM32_OTGFS_DOEPCTL(privep->epphy);
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regval = stm32_getreg(regaddr);
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if ((regval & OTGFS_DOEPCTL_USBAEP) != 0)
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if ((regval & OTGFS_DOEPCTL_USBAEP) == 0)
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{
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regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
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regval |= mpsiz;
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@ -3372,7 +3397,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
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regaddr = STM32_OTGFS_DIEPCTL(privep->epphy);
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regval = stm32_getreg(regaddr);
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if ((regval & OTGFS_DIEPCTL_USBAEP) != 0)
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if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
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{
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regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
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regval |= mpsiz;
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@ -3500,8 +3525,13 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep)
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* endpoint is completely disabled.
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*/
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regaddr = STM32_OTGFS_DOEPINT_OFFSET(privep->epphy);
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#if 0 /* Doesn't happen */
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regaddr = STM32_OTGFS_DOEPINT(privep->epphy);
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while ((stm32_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0);
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#else
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# warning "REVISIT"
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up_mdelay(50);
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#endif
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/* Then disble the Global OUT NAK mode to continue receiving data
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* from other non-disabled OUT endpoints.
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@ -3573,7 +3603,7 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep)
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* endpoint is completely disabled.
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*/
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regaddr = STM32_OTGFS_DIEPINT_OFFSET(privep->epphy);
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regaddr = STM32_OTGFS_DIEPINT(privep->epphy);
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while ((stm32_getreg(regaddr) & OTGFS_DIEPINT_EPDISD) == 0);
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/* Flush any data remaining in the TxFIFO */
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@ -3855,6 +3885,11 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
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static int stm32_epout_setstall(FAR struct stm32_ep_s *privep)
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{
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#if 0
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/* This implementation follows the requirements from the STM32 F4 reference
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* manual.
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*/
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uint32_t regaddr;
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uint32_t regval;
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@ -3863,12 +3898,11 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep)
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stm32_enablegonak(privep);
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/* Disable and STALL the OUT endpoint by setting the EPDIS and STALL bits
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* int DOECPTL register.
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* in the DOECPTL register.
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*/
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regaddr = STM32_OTGFS_DOEPCTL(privep->epphy);
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regval = stm32_getreg(regaddr);
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regval &= ~OTGFS_DOEPCTL_USBAEP;
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regval |= (OTGFS_DOEPCTL_EPDIS | OTGFS_DOEPCTL_STALL);
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stm32_putreg(regval, regaddr);
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@ -3876,8 +3910,13 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep)
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* endpoint is completely disabled.
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*/
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regaddr = STM32_OTGFS_DOEPINT_OFFSET(privep->epphy);
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#if 0 /* Doesn't happen */
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regaddr = STM32_OTGFS_DOEPINT(privep->epphy);
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while ((stm32_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0);
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#else
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# warning "REVISIT"
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up_mdelay(50);
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#endif
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/* Disable Global OUT NAK mode */
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@ -3887,6 +3926,27 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep)
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privep->stalled = true;
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return OK;
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#else
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/* This implementation follows the STMicro code example. */
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#warning "REVISIT"
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uint32_t regaddr;
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uint32_t regval;
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/* Disable and STALL the OUT endpoint by setting the STALL bit
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* int DOECPTL register.
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*/
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regaddr = STM32_OTGFS_DOEPCTL(privep->epphy);
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regval = stm32_getreg(regaddr);
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regval |= OTGFS_DOEPCTL_STALL;
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stm32_putreg(regval, regaddr);
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/* The endpoint is now stalled */
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privep->stalled = true;
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return OK;
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#endif
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}
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/*******************************************************************************
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