arch/arm/src/imxrt: added support for Tickless OS
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit is contained in:
Michal Lenc
Alan Carvalho de Assis
parent
83f7c08f65
commit
b2a9f853e8
@ -1909,6 +1909,31 @@ config IMXRT_DATA_RISING_EDGE
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endmenu # LCD Configuration
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menu "Timer Configuration"
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if SCHED_TICKLESS
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config IMXRT_TICKLESS_TIMER
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int "Tickless hardware timer"
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default 1
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range 1 2
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---help---
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If the Tickless OS feature is enabled, then one clock must be
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assigned to provided the GPT timer needed by the OS.
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config IMXRT_TICKLESS_CHANNEL
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int "Tickless timer channel"
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default 1
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range 1 3
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---help---
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If the Tickless OS feature is enabled, the one clock must be
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assigned to provided the free-running timer needed by the OS
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and one channel on that clock is needed to handle intervals.
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endif # SCHED_TICKLESS
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endmenu # Timer Configuration
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if IMXRT_USBOTG && USBHOST
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menu "USB host controller driver (HCD) options"
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@ -86,6 +86,8 @@ endif
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += imxrt_timerisr.c
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else
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CHIP_CSRCS += imxrt_tickless.c
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endif
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ifeq ($(CONFIG_IMXRT_GPIO_IRQ),y)
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603
arch/arm/src/imxrt/imxrt_tickless.c
Normal file
603
arch/arm/src/imxrt/imxrt_tickless.c
Normal file
@ -0,0 +1,603 @@
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/****************************************************************************
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* arch/arm/src/imxrt/imxrt_tickless.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Tickless OS Support.
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*
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* When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts
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* is suppressed and the platform specific code is expected to provide the
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* following custom functions.
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*
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* void up_timer_initialize(void): Initializes the timer facilities.
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* Called early in the initialization sequence (by up_initialize()).
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* int up_timer_gettime(FAR struct timespec *ts): Returns the current
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* time from the platform specific time source.
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* int up_timer_cancel(void): Cancels the interval timer.
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* int up_timer_start(FAR const struct timespec *ts): Start (or re-starts)
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* the interval timer.
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*
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* The RTOS will provide the following interfaces for use by the platform-
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* specific interval timer implementation:
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*
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* void nxsched_timer_expiration(void): Called by the platform-specific
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* logic when the interval timer expires.
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*
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* NOTE
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* Only alarm option selected by CONFIG_SCHED_TICKLESS_ALARM is currently
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* suported for iMXRT.
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*
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****************************************************************************/
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/****************************************************************************
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* iMXRT Timer Usage
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*
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* This implementation uses one timer: A free running timer to provide
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* the current time and a capture/compare channel for timed-events.
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*
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* This timer can be either General Purpose Timer (GPT) 1 or 2, which can
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* be set by CONFIG_IMXRT_TICKLESS_TIMER. CONFIG_IMXRT_TICKLESS_CHANNEL
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* selects which channel generates the interrupt for compare value.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <assert.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <debug.h>
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#include "arm_arch.h"
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#include "imxrt_periphclks.h"
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#include "hardware/imxrt_gpt.h"
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#include "imxrt_irq.h"
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#ifdef CONFIG_SCHED_TICKLESS
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Only alarm option is currently supported */
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#ifndef CONFIG_SCHED_TICKLESS_ALARM
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# error Interval timer support is not supported yet, please select alarm
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#endif
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/* The Peripheral Clock (ipg_clk) is selected as the GPT clock source.
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*
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* REVISIT: Here we assume that the Peripheral Clock is 16.6 MHz. That is:
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*
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* PRECLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER
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* where IPG_CLOCK_ROOT = 150 MHz and IMXRT_PERCLK_PODF_DIVIDER = 9
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*
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* Those clocks are set in imxrt_clockconfig.c, but makros are defined in
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* board level section (file board.h) so clock settings may actually vary
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* when using different boards.
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*
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* So, Peripheral Clock Frequency = 16.6 MHz
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*/
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#define GPT_CLOCK 16600000
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct imxrt_tickless_s
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{
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uint8_t timer; /* The timer/counter in use */
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uint8_t out_compare; /* Number of output compare channel */
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uint32_t frequency; /* Frequency of the timer */
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uint32_t overflow; /* Timer counter overflow */
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uint32_t irq; /* Interrupt number */
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volatile bool pending; /* True: pending task */
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uint32_t base; /* Base address of the timer */
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct imxrt_tickless_s g_tickless;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: imxrt_get_counter
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*
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* Description:
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* Get counter value and add it to overflow value
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Counter value
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*
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****************************************************************************/
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static uint64_t imxrt_get_counter(void)
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{
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return getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET) | \
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((uint64_t)g_tickless.overflow << 32);
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}
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/****************************************************************************
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* Name: imxrt_interval_handler
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*
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* Description:
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* Called when the timer counter matches the compare register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void imxrt_interval_handler(void)
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{
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struct timespec tv;
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uint32_t regval;
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/* Disable the compare interrupt for now */
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regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET);
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regval &= ~(1 << (g_tickless.out_compare - 1));
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putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET);
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/* And clear it */
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putreg32((1 << (g_tickless.out_compare - 1)),
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g_tickless.base + IMXRT_GPT_SR_OFFSET);
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g_tickless.pending = false;
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up_timer_gettime(&tv);
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nxsched_alarm_expiration(&tv);
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}
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/****************************************************************************
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* Name: imxrt_timing_handler
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*
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* Description:
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* Timer interrupt callback. When the freerun timer counter overflows,
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* this interrupt will occur. We will just increment an overflow count.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void imxrt_timing_handler(void)
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{
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g_tickless.overflow++;
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uint32_t regval;
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/* Clear interrupt bit */
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putreg32(GPT_SR_ROV, g_tickless.base + IMXRT_GPT_SR_OFFSET);
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}
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/****************************************************************************
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* Name: imxrt_tickless_handler
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*
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* Description:
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* Generic interrupt handler for this timer. It checks the source of the
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* interrupt and fires the appropriate handler.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static int imxrt_tickless_handler(int irq, void *context, void *arg)
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{
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uint32_t interrupt_flags;
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interrupt_flags = getreg32(g_tickless.base + IMXRT_GPT_SR_OFFSET);
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/* The free-run timer has reached its maximum value */
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if (interrupt_flags & GPT_SR_ROV)
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{
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imxrt_timing_handler();
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}
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/* Compare interrupt was generated */
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if (interrupt_flags & (1 << (g_tickless.out_compare - 1)))
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{
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imxrt_interval_handler();
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}
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return OK;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_timer_initialize
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*
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* Description:
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* Initializes all platform-specific timer facilities. This function is
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* called early in the initialization sequence by up_initialize().
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* On return, the current up-time should be available from
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* up_timer_gettime() and the interval timer is ready for use (but not
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* actively timing.
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*
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* Provided by platform-specific code and called from the architecture-
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* specific logic.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* Called early in the initialization sequence before any special
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* concurrency protections are required.
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*
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****************************************************************************/
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void up_timer_initialize(void)
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{
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uint32_t regval;
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int prescaler;
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switch (CONFIG_IMXRT_TICKLESS_TIMER)
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{
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case 1:
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g_tickless.base = IMXRT_GPT1_BASE;
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g_tickless.irq = IMXRT_IRQ_GPT1;
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imxrt_clockall_gpt_bus();
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imxrt_clockall_gpt_serial();
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break;
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case 2:
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g_tickless.base = IMXRT_GPT2_BASE;
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g_tickless.irq = IMXRT_IRQ_GPT2;
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imxrt_clockall_gpt2_bus();
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imxrt_clockall_gpt2_serial();
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break;
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default:
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tmrerr("ERROR: Timer number invalid or not configured: %d\n",
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CONFIG_IMXRT_TICKLESS_TIMER);
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break;
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}
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/* Get the TC frequency that corresponds to the requested resolution */
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up_disable_irq(g_tickless.irq);
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g_tickless.frequency = USEC_PER_SEC / (uint32_t)CONFIG_USEC_PER_TICK;
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g_tickless.timer = CONFIG_IMXRT_TICKLESS_TIMER;
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g_tickless.out_compare = CONFIG_IMXRT_TICKLESS_CHANNEL;
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g_tickless.pending = false;
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g_tickless.overflow = 0;
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tmrinfo("timer=%d channel=%d frequency=%lu Hz\n",
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g_tickless.timer, g_tickless.out_compare, g_tickless.frequency);
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/* Set clock source of the timer and enable free-run mode */
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regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET);
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regval |= GPT_CR_CLKSRC_IPG | GPT_CR_FRR;
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putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET);
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/* Set the prescaler register */
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prescaler = GPT_CLOCK / g_tickless.frequency;
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/* We need to decrement value for '1', but only, if that will not to
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* cause underflow.
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*/
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if (prescaler > 0)
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{
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prescaler--;
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}
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/* Check for overflow as well. */
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if (prescaler > 0xfff)
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{
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prescaler = 0xfff;
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}
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/* Set the prescaler value */
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putreg32(prescaler, g_tickless.base + IMXRT_GPT_PR_OFFSET);
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/* Atache the interrupt handler */
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if (irq_attach(g_tickless.irq, imxrt_tickless_handler, NULL))
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{
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/* We could not attach the ISR to the interrupt */
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tmrerr("ERROR: Failed to attach GPT timer IRQ\n");
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}
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up_enable_irq(g_tickless.irq);
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/* Initialize interval to zero */
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putreg32(0, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \
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(4 * (g_tickless.out_compare - 1)));
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/* Initialize the counter and enable interrupts */
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regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET);
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regval |= GPT_IR_ROVIE | (1 << (g_tickless.out_compare -1));
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putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET);
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regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET);
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regval |= GPT_CR_ENMOD;
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putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET);
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/* Eneable the timer */
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regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET);
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regval |= GPT_CR_EN;
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putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET);
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}
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/****************************************************************************
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* Name: up_timer_gettime
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*
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* Description:
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* Return the elapsed time since power-up (or, more correctly, since
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* up_timer_initialize() was called). This function is functionally
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* equivalent to:
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*
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* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
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*
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* when clockid is CLOCK_MONOTONIC.
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*
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* This function provides the basis for reporting the current time and
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* also is used to eliminate error build-up from small errors in interval
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* time calculations.
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*
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* Provided by platform-specific code and called from the RTOS base code.
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*
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* Input Parameters:
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* ts - Provides the location in which to return the up-time.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure.
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*
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* Assumptions:
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* Called from the normal tasking context. The implementation must
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* provide whatever mutual exclusion is necessary for correct operation.
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* This can include disabling interrupts in order to assure atomic register
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* operations.
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*
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****************************************************************************/
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int up_timer_gettime(FAR struct timespec *ts)
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{
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uint64_t usec;
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uint32_t counter;
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uint32_t verify;
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uint32_t overflow;
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uint32_t sec;
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int pending;
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irqstate_t flags;
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/* Temporarily disable the overflow counter */
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flags = enter_critical_section();
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overflow = g_tickless.overflow;
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counter = getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET);
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pending = getreg32(g_tickless.base + IMXRT_GPT_SR_OFFSET) & GPT_SR_ROV;
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verify = getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET);
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/* If an interrupt was pending before we re-enabled interrupts,
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* then the overflow needs to be incremented.
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*/
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if (pending)
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{
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/* Clear the rollover interrupt */
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putreg32(GPT_SR_ROV, g_tickless.base + IMXRT_GPT_SR_OFFSET);
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/* Increment the overflow count and use the value of the
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* guaranteed to be AFTER the overflow occurred.
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*/
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overflow++;
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counter = verify;
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/* Update tickless overflow counter. */
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g_tickless.overflow = overflow;
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}
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leave_critical_section(flags);
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/* Convert the whole thing to units of microseconds.
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*
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* frequency = ticks / second
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* seconds = ticks * frequency
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* usecs = (ticks * USEC_PER_SEC) / frequency;
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*/
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usec = ((((uint64_t)overflow << 32) + (uint64_t)counter) * \
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USEC_PER_SEC) / g_tickless.frequency;
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/* And return the value of the timer */
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sec = (uint32_t)(usec / USEC_PER_SEC);
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||||
ts->tv_sec = sec;
|
||||
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_alarm_start
|
||||
*
|
||||
* Description:
|
||||
* Start the alarm. nxsched_alarm_expiration() will be called when the
|
||||
* alarm occurs (unless up_alaram_cancel is called to stop it).
|
||||
*
|
||||
* Provided by platform-specific code and called from the RTOS base code.
|
||||
*
|
||||
* Input Parameters:
|
||||
* ts - The time in the future at the alarm is expected to occur. When
|
||||
* the alarm occurs the timer logic will call
|
||||
* nxsched_alarm_expiration().
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure.
|
||||
*
|
||||
* Assumptions:
|
||||
* May be called from interrupt level handling or from the normal tasking
|
||||
* level. Interrupts may need to be disabled internally to assure
|
||||
* non-reentrancy.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_alarm_start(FAR const struct timespec *ts)
|
||||
{
|
||||
size_t offset = 1;
|
||||
uint64_t tm = ((uint64_t)ts->tv_sec * NSEC_PER_SEC + ts->tv_nsec) /
|
||||
NSEC_PER_TICK;
|
||||
irqstate_t flags;
|
||||
uint32_t regval;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
/* Set compare value for output compare channel */
|
||||
|
||||
putreg32(tm, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \
|
||||
(4 * (g_tickless.out_compare - 1)));
|
||||
|
||||
/* Clear interrupt bits */
|
||||
|
||||
putreg32((1 << (g_tickless.out_compare - 1)) | GPT_SR_ROV,
|
||||
g_tickless.base + IMXRT_GPT_SR_OFFSET);
|
||||
|
||||
/* Enable interrupts */
|
||||
|
||||
regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET);
|
||||
regval |= GPT_IR_ROVIE | (1 << (g_tickless.out_compare - 1));
|
||||
putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET);
|
||||
|
||||
g_tickless.pending = true;
|
||||
|
||||
/* If we have already passed this time, there is a chance we didn't set the
|
||||
* compare register in time and we've missed the interrupt. If we don't
|
||||
* catch this case, we won't interrupt until a full loop of the clock.
|
||||
*
|
||||
* Since we can't make assumptions about the clock speed and tick rate,
|
||||
* we simply keep adding an offset to the current time, until we can leave
|
||||
* certain that the interrupt is going to fire as soon as we leave the
|
||||
* critical section.
|
||||
*/
|
||||
|
||||
while (tm <= imxrt_get_counter())
|
||||
{
|
||||
tm = imxrt_get_counter() + offset++;
|
||||
putreg32(tm, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \
|
||||
(4 * (g_tickless.out_compare - 1)));
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_alarm_cancel
|
||||
*
|
||||
* Description:
|
||||
* Cancel the alarm and return the time of cancellation of the alarm.
|
||||
* These two steps need to be as nearly atomic as possible.
|
||||
* nxsched_alarm_expiration() will not be called unless the alarm is
|
||||
* restarted with up_alarm_start().
|
||||
*
|
||||
* If, as a race condition, the alarm has already expired when this
|
||||
* function is called, then time returned is the current time.
|
||||
*
|
||||
* NOTE: This function may execute at a high rate with no timer running (as
|
||||
* when pre-emption is enabled and disabled).
|
||||
*
|
||||
* Provided by platform-specific code and called from the RTOS base code.
|
||||
*
|
||||
* Input Parameters:
|
||||
* ts - Location to return the expiration time. The current time should
|
||||
* returned if the alarm is not active. ts may be NULL in which
|
||||
* case the time is not returned.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success. A call to up_alarm_cancel() when
|
||||
* the timer is not active should also return success; a negated errno
|
||||
* value is returned on any failure.
|
||||
*
|
||||
* Assumptions:
|
||||
* May be called from interrupt level handling or from the normal tasking
|
||||
* level. Interrupts may need to be disabled internally to assure
|
||||
* non-reentrancy.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_alarm_cancel(FAR struct timespec *ts)
|
||||
{
|
||||
uint64_t nsecs = (((uint64_t)g_tickless.overflow << 32) | \
|
||||
getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET)) * \
|
||||
NSEC_PER_TICK;
|
||||
uint32_t regval;
|
||||
|
||||
ts->tv_sec = nsecs / NSEC_PER_SEC;
|
||||
ts->tv_nsec = nsecs - ts->tv_sec * NSEC_PER_SEC;
|
||||
|
||||
/* Disable the compare interrupt */
|
||||
|
||||
regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET);
|
||||
regval &= ~(1 << (g_tickless.out_compare - 1));
|
||||
putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SCHED_TICKLESS */
|
||||
Loading…
Reference in New Issue
Block a user