SAMV7: Add configuration logic and clock setup for USB device
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@ -2580,13 +2580,13 @@ menu "USB High Speed Device Controller driver (DCD) options"
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config SAMA5_UDPHS_SCATTERGATHER
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config SAMA5_UDPHS_SCATTERGATHER
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bool
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bool
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default n
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default n
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depends on EXPERIMENTAL
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---help---
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---help---
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Scatter gather DMA is not yet supported
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Scatter gather DMA is not yet supported
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config SAMA5_UDPHS_NDTDS
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config SAMA5_UDPHS_NDTDS
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int "Number of UDPHS DMA transfer descriptors"
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int "Number of UDPHS DMA transfer descriptors"
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default 9
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default 8
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depends on UDPHS_SCATTERGATHER
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---help---
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---help---
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DMA transfer descriptors are allocated in a pool at boot time. This
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DMA transfer descriptors are allocated in a pool at boot time. This
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setting provides the number of DMA transfer descriptors to be
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setting provides the number of DMA transfer descriptors to be
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@ -2595,7 +2595,6 @@ config SAMA5_UDPHS_NDTDS
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config SAMA5_UDPHS_PREALLOCATE
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config SAMA5_UDPHS_PREALLOCATE
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bool "Pre-allocate DMA transfer descriptors"
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bool "Pre-allocate DMA transfer descriptors"
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default y
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default y
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depends on UDPHS_SCATTERGATHER
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---help---
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---help---
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If this option is selected then DMA transfer descriptors will be
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If this option is selected then DMA transfer descriptors will be
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pre-allocated in .bss. Otherwise, the descriptors will be allocated
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pre-allocated in .bss. Otherwise, the descriptors will be allocated
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@ -408,21 +408,25 @@ config SAMV7_USBDEVFS
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bool "USB Device Full Speed (USBFS)"
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bool "USB Device Full Speed (USBFS)"
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default n
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default n
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depends on SAMV7_HAVE_USBFS
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depends on SAMV7_HAVE_USBFS
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select USBDEV
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config SAMV7_USBDEVHS
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config SAMV7_USBDEVHS
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bool "USB Device High Speed (USBHS)"
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bool "USB Device High Speed (USBHS)"
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default n
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default n
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depends on SAMV7_HAVE_USBHS
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depends on SAMV7_HAVE_USBHS
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select USBDEV
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config SAMV7_USBHOSTFS
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config SAMV7_USBHOSTFS
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bool "USB Host Full Speed (USBFS)"
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bool "USB Host Full Speed (USBFS)"
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default n
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default n
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depends on SAMV7_HAVE_USBFS
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depends on SAMV7_HAVE_USBFS
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select USBHOST
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config SAMV7_USBHOSTHS
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config SAMV7_USBHOSTHS
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bool "USB Host High Speed (USBHS)"
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bool "USB Host High Speed (USBHS)"
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default n
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default n
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depends on SAMV7_HAVE_USBHS
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depends on SAMV7_HAVE_USBHS
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select USBHOST
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config SAMV7_USART0
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config SAMV7_USART0
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bool "USART 0"
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bool "USART 0"
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@ -1236,3 +1240,37 @@ config SAMV7_EMAC_REGDEBUG
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Enable very low-level register access debug. Depends on DEBUG.
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Enable very low-level register access debug. Depends on DEBUG.
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endmenu # EMAC0 device driver options
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endmenu # EMAC0 device driver options
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menu "USB High Speed Device Controller driver (DCD) options"
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depends on SAMV7_USBDEVHS
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config SAMV7_USBHS_SCATTERGATHER
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bool
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default n
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depends on EXPERIMENTAL
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---help---
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Scatter gather DMA is not yet supported
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config SAMV7_USBHS_NDTDS
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int "Number of USBHS DMA transfer descriptors"
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default 8
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---help---
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DMA transfer descriptors are allocated in a pool at boot time. This
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setting provides the number of DMA transfer descriptors to be
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allocated.
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config SAMV7_USBHS_PREALLOCATE
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bool "Pre-allocate DMA transfer descriptors"
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default y
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---help---
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If this option is selected then DMA transfer descriptors will be
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pre-allocated in .bss. Otherwise, the descriptors will be allocated
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at start-up time with kmm_malloc(). This might be important if a larger
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memory pool is available after startup.
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config SAMV7_USBHS_REGDEBUG
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bool "Enable low-level USBHS register debug"
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default n
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depends on DEBUG
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endmenu # USB High Speed Device Controller driver (DCD) options
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@ -147,3 +147,7 @@ endif
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ifeq ($(CONFIG_SAMV7_EMAC),y)
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ifeq ($(CONFIG_SAMV7_EMAC),y)
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CHIP_CSRCS += sam_emac.c sam_ethernet.c
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CHIP_CSRCS += sam_emac.c sam_ethernet.c
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endif
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endif
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ifeq ($(CONFIG_SAMV7_USBDEVHS),y)
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#CHIP_CSRCS += sam_usbdevhs.c
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endif
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@ -209,7 +209,7 @@
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#define PMC_CKGR_UCKR_UPLLCOUNT_SHIFT (20) /* Bits 20-23: UTMI PLL Start-up Time */
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#define PMC_CKGR_UCKR_UPLLCOUNT_SHIFT (20) /* Bits 20-23: UTMI PLL Start-up Time */
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#define PMC_CKGR_UCKR_UPLLCOUNT_MASK (15 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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#define PMC_CKGR_UCKR_UPLLCOUNT_MASK (15 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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# define PMC_CKGR_UCKR_UPLLCOUNT(n) ((uint32_t)(n) << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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# define PMC_CKGR_UCKR_UPLLCOUNT(n) ((uint32_t)(n) << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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# define PMC_CKGR_UCKR_UPLLCOUNT_MAX (15 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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/* PMC Clock Generator Main Oscillator Register */
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/* PMC Clock Generator Main Oscillator Register */
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@ -72,7 +72,6 @@
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BOARD_PMC_MCKR_MDIV | BOARD_PMC_MCKR_UPLLDIV2)
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BOARD_PMC_MCKR_MDIV | BOARD_PMC_MCKR_UPLLDIV2)
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#define BOARD_PMC_MCKR (BOARD_PMC_MCKR_CSS | BOARD_PMC_MCKR_PRES | \
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#define BOARD_PMC_MCKR (BOARD_PMC_MCKR_CSS | BOARD_PMC_MCKR_PRES | \
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BOARD_PMC_MCKR_MDIV | BOARD_PMC_MCKR_UPLLDIV2)
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BOARD_PMC_MCKR_MDIV | BOARD_PMC_MCKR_UPLLDIV2)
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#define BOARD_CKGR_UCKR (BOARD_CKGR_UCKR_UPLLCOUNT | PMC_CKGR_UCKR_UPLLEN)
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/****************************************************************************
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/****************************************************************************
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* Public Data
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* Public Data
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@ -225,11 +224,22 @@ static inline void sam_pmcsetup(void)
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sam_pmcwait(PMC_INT_LOCKA);
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sam_pmcwait(PMC_INT_LOCKA);
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#ifdef CONFIG_USBDEV
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#ifdef CONFIG_USBDEV
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/* Setup UTMI for USB and wait for LOCKU */
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/* UTMI parallel mode, High/Full/Low Speed */
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/* UUSBCLK is not used in this configuration (High Speed) */
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regval = getreg32(SAM_PMC_CKGR_UCKR);
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putreg32(PMC_USBCLK, SAM_PMC_SCDR);
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regval |= BOARD_CKGR_UCKR;
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/* Select the UTMI PLL as the USB clock input with divider = 1. */
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putreg32(PMC_USB_USBS_UPLL, SAM_PMC_USB);
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/* Enable the UTMI PLL with the maximum startup time */
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regval = PMC_CKGR_UCKR_UPLLEN | PMC_CKGR_UCKR_UPLLCOUNT_MAX;
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putreg32(regval, SAM_PMC_CKGR_UCKR);
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putreg32(regval, SAM_PMC_CKGR_UCKR);
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/* Wait for LOCKU */
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sam_pmcwait(PMC_INT_LOCKU);
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sam_pmcwait(PMC_INT_LOCKU);
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#endif
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#endif
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