From b2da68028e711dc6c2f69cc27f31617ee37368ab Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Jul 2013 12:07:51 -0600 Subject: [PATCH] The last bit of a previous commit was still in the editor --- configs/sama5d3x-ek/src/nor_main.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/configs/sama5d3x-ek/src/nor_main.c b/configs/sama5d3x-ek/src/nor_main.c index 51af1372d9..d4062e4ed8 100644 --- a/configs/sama5d3x-ek/src/nor_main.c +++ b/configs/sama5d3x-ek/src/nor_main.c @@ -129,24 +129,17 @@ int nor_main(int argc, char *argv) (void)irqdisable(); - /* Set remap state 0. This is done late in the boot sequence. Any - * exceptions taken before this point in time will be handled by the - * ROM code, not by the NuttX interrupt since which was, up to this - * point, uninitialized. + /* Set remap state 1. * * Boot state: ROM is seen at address 0x00000000 * Remap State 0: SRAM is seen at address 0x00000000 (through AHB slave * interface) instead of ROM. * Remap State 1: HEBI is seen at address 0x00000000 (through AHB slave * interface) instead of ROM for external boot. - * - * Here we are assuming that vectors reside in the lower end of ISRAM. - * Hmmm... this probably does not matter since we will map a page to - * address 0x0000:0000 in that case anyway. */ putreg32(MATRIX_MRCR_RCB0, SAM_MATRIX_MRCR); /* Enable remap */ - putreg32(AXIMX_REMAP_REMAP0, SAM_AXIMX_REMAP); /* Remap SRAM */ + putreg32(AXIMX_REMAP_REMAP1, SAM_AXIMX_REMAP); /* Remap SRAM */ /* Disable the caches and the MMU. Disabling the MMU should be safe here * because there is a 1-to-1 identity mapping between the physical and