Added SDMMC to Nucleo-144

This commit is contained in:
David Sidrane 2016-06-23 14:41:51 -10:00
parent 3e2a620f8c
commit b31e5e3c9d
5 changed files with 122 additions and 14 deletions

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@ -127,8 +127,8 @@
#define CONFIG_STM32F7_PLLSAI 1
#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192)
#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2)
#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2)
#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(8)
#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(4)
#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2)
/* Configure Dedicated Clock Configuration Register */
@ -167,7 +167,7 @@
#define STM32_RCC_DCKCFGR2_I2C4SRC RCC_DCKCFGR2_I2C4SEL_HSI
#define STM32_RCC_DCKCFGR2_LPTIM1SRC RCC_DCKCFGR2_LPTIM1SEL_APB
#define STM32_RCC_DCKCFGR2_CECSRC RCC_DCKCFGR2_CECSEL_HSI
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLL
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
@ -216,6 +216,61 @@
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* SDMMC dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(118+2)=400 KHz
*/
#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
* DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz
* DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
#if defined(CONFIG_STM32F7_SDMMC2)
# define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_1
# define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_1
# define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1
# define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1
#endif
/* DMA Channl/Stream Selections *****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
*
* SDMMC DMA is on DMA2
*
* SDMMC1 DMA
* DMAMAP_SDMMC1_1 = Channel 4, Stream 3
* DMAMAP_SDMMC1_2 = Channel 4, Stream 6
*
* SDMMC2 DMA
* DMAMAP_SDMMC2_1 = Channel 11, Stream 0
* DMAMAP_SDMMC3_2 = Channel 11, Stream 5
*/
#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1
#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1
/* FLASH wait states
*
* --------- ---------- -----------

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@ -60,7 +60,7 @@ ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
ifeq ($(HAVE_SDIO),y)
ifeq ($(CONFIG_MMCSD),y)
CSRCS += stm32_sdio.c
endif

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@ -128,8 +128,45 @@
#define NUCLEO_SPI_BUS3_CS2 10
#define NUCLEO_SPI_BUS3_CS3 11
#if defined(CONFIG_STM32_SDIO)
#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTB | GPIO_PIN15)
#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
# define HAVE_SDIO
#endif
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
# undef HAVE_SDIO
#endif
#define SDIO_SLOTNO 0 /* Only one slot */
#ifdef HAVE_SDIO
# if defined(CONFIG_STM32F7_SDMMC1)
# define GPIO_SDMMC1_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTC | GPIO_PIN11)
# endif
# if defined(CONFIG_NSH_MMCSDSLOTNO) && (CONFIG_NSH_MMCSDSLOTNO != 0)
# warning "Only one MMC/SD slot, slot 0"
# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
# endif
# if defined(CONFIG_NSH_MMCSDMINOR)
# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define SDIO_MINOR 0
# endif
/* SD card bringup does not work if performed on the IDLE thread because it
* will cause waiting. Use either:
*
* CONFIG_LIB_BOARDCTL=y, OR
* CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y
*/
# if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \
!defined(CONFIG_BOARD_INITTHREAD)
# warning SDIO initialization cannot be perfomed on the IDLE thread
# undef HAVE_SDIO
# endif
#endif
/************************************************************************************
@ -196,5 +233,17 @@ int stm32_dma_alloc_init(void);
int board_adc_initialize(void);
#endif
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Called at application startup time to initialize the SCMMC functionality.
*
****************************************************************************/
#ifdef CONFIG_MMCSD
int stm32_sdio_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */

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@ -42,6 +42,7 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <syslog.h>
#include "nucleo-144.h"

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@ -47,10 +47,13 @@
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32.h"
#include "chip.h"
#include "nucleo-144.h"
#include "stm32_gpio.h"
#include "stm32_sdmmc.h"
#ifdef CONFIG_MMCSD
#ifdef HAVE_SDIO
/****************************************************************************
* Pre-processor Definitions
@ -61,7 +64,7 @@
/* Card detections requires card support and a card detection GPIO */
#define HAVE_NCD 1
#if !defined(CONFIG_STM32_SDIO) || !defined(GPIO_SDIO_NCD)
#if !defined(GPIO_SDMMC1_NCD)
# undef HAVE_NCD
#endif
@ -91,8 +94,8 @@ static int stm32_ncd_interrupt(int irq, FAR void *context)
{
bool present;
present = !stm32_gpioread(GPIO_SDIO_NCD);
if (present != g_sd_inserted)
present = !stm32_gpioread(GPIO_SDMMC1_NCD);
if (g_sdio_dev && present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
@ -125,11 +128,11 @@ int stm32_sdio_initialize(void)
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDIO_NCD);
stm32_configgpio(GPIO_SDMMC1_NCD);
/* Register an interrupt handler for the card detect pin */
stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt);
stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true, stm32_ncd_interrupt);
#endif
/* Mount the SDIO-based MMC/SD block driver */
@ -160,7 +163,7 @@ int stm32_sdio_initialize(void)
#ifdef HAVE_NCD
/* Use SD card detect pin to check if a card is g_sd_inserted */
cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
finfo("Card detect : %d\n", cd_status);
sdio_mediachange(g_sdio_dev, cd_status);