Refresh SAMV71-Xult configurations
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@ -108,18 +108,20 @@
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/* Peripheral endpoint characteristics.
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*
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* PERIPH_TXTRIG - The TX ID of the peripheral that provides the DMA trigger. This
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* is one of the DMA_TRIGSRC_*_TX definitions.
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* is one of the DMA_TRIGSRC_*[_TX] definitions. This trigger source
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* is selected when sam_dmatxsetup() is called.
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* PERIPH_RXTRIG - The RX ID of the peripheral that provides the DMA trigger. This
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* is one of the DMA_TRIGSRC_*_RX definitions.
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* is one of the DMA_TRIGSRC_*[_RX] definitions. This trigger source
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* is selected when sam_dmarxsetup() is called.
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* PERIPH_INCREMENT - Indicates the that peripheral address should be incremented on
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* each "beat"
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* PERIPH_QOS - Quality of service for peripheral accesses
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*/
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#define DMACH_FLAG_PERIPH_TXTRIG_SHIFT (9) /* Bits 9-14: See DMAC_TRIGSRC_*_TX */
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#define DMACH_FLAG_PERIPH_TXTRIG_SHIFT (9) /* Bits 9-14: See DMAC_TRIGSRC_*[_TX] */
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#define DMACH_FLAG_PERIPH_TXTRIG_MASK (0x3f << DMACH_FLAG_PERIPH_TXTRIG_SHIFT)
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# define DMACH_FLAG_PERIPH_TXTRIG(n) ((uint32_t)(n) << DMACH_FLAG_PERIPH_TXTRIG_SHIFT)
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#define DMACH_FLAG_PERIPH_RXTRIG_SHIFT (15) /* Bits 15-20: See DMAC_TRIGSRC_*_RX */
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#define DMACH_FLAG_PERIPH_RXTRIG_SHIFT (15) /* Bits 15-20: See DMAC_TRIGSRC_*[_RX] */
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#define DMACH_FLAG_PERIPH_RXTRIG_MASK (0x3f << DMACH_FLAG_PERIPH_RXTRIG_SHIFT)
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# define DMACH_FLAG_PERIPH_RXTRIG(n) ((uint32_t)(n) << DMACH_FLAG_PERIPH_RXTRIG_SHIFT)
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#define DMACH_FLAG_PERIPH_INCREMENT (1 << 21) /* Bit 21: Autoincrement peripheral address */
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