arch/arm/src/stm32/stm32_adc.c: cosmetics
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@ -484,7 +484,7 @@ static void adc_modifyreg(FAR struct stm32_dev_s *priv, int offset,
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#ifdef HAVE_ADC_CMN_REGS
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static uint32_t adccmn_base_get(FAR struct stm32_dev_s *priv);
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static void adccmn_modifyreg(FAR struct stm32_dev_s *priv, uint32_t offset,
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uint32_t clrbits, uint32_t setbits);
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uint32_t clrbits, uint32_t setbits);
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# ifdef CONFIG_DEBUG_ANALOG_INFO
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static uint32_t adccmn_getreg(FAR struct stm32_dev_s *priv, uint32_t offset);
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# endif
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@ -495,8 +495,7 @@ static void tim_putreg(FAR struct stm32_dev_s *priv, int offset,
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uint16_t value);
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static void tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
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uint16_t clrbits, uint16_t setbits);
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static void tim_dumpregs(FAR struct stm32_dev_s *priv,
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FAR const char *msg);
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static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg);
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#endif
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#ifdef HAVE_ADC_CMN_DATA
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@ -1078,7 +1077,7 @@ static uint32_t adccmn_base_get(FAR struct stm32_dev_s *priv)
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****************************************************************************/
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static void adccmn_modifyreg(FAR struct stm32_dev_s *priv, uint32_t offset,
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uint32_t clrbits, uint32_t setbits)
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uint32_t clrbits, uint32_t setbits)
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{
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uint32_t base = 0;
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@ -3189,7 +3188,7 @@ errout:
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#endif
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/****************************************************************************
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* Name: adc_extsel_set
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* Name: adc_extcfg_set
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****************************************************************************/
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#ifdef ADC_HAVE_EXTCFG
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@ -3230,7 +3229,7 @@ static int adc_extcfg_set(FAR struct stm32_dev_s *priv, uint32_t extcfg)
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#endif
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/****************************************************************************
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* Name: adc_jextsel_set
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* Name: adc_jextcfg_set
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****************************************************************************/
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#ifdef ADC_HAVE_JEXTCFG
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@ -3302,12 +3301,12 @@ static void adc_dumpregs(FAR struct stm32_dev_s *priv)
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#if defined(STM32_ADC_SQR4_OFFSET)
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ainfo("SQR4: 0x%08x\n",
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adc_getreg(priv, STM32_ADC_SQR5_OFFSET));
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adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
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#endif
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#if defined(STM32_ADC_SQR5_OFFSET)
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ainfo("SQR5: 0x%08x\n",
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adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
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adc_getreg(priv, STM32_ADC_SQR5_OFFSET));
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#endif
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#ifdef ADC_HAVE_INJECTED
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@ -3373,8 +3372,8 @@ static void adc_enable_vbat_channel(FAR struct adc_dev_s *dev, bool enable)
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static int adc_ioc_change_sleep_between_opers(FAR struct adc_dev_s *dev,
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int cmd, bool arg)
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{
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int ret = OK;
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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int ret = OK;
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adc_enable(priv, false);
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@ -3530,8 +3529,8 @@ static void adc_ioc_enable_ovr_int(FAR struct stm32_dev_s *priv, bool enable)
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static int adc_ioc_change_ints(FAR struct adc_dev_s *dev, int cmd, bool arg)
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{
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int ret = OK;
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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int ret = OK;
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switch (cmd)
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{
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@ -4475,7 +4474,7 @@ static void adc_sampletime_write(FAR struct stm32_adc_dev_s *dev)
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}
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/****************************************************************************
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* Name: adc_change_sample_time
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* Name: adc_sampletime_set
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*
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* Description:
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* Changes sample times for specified channels. This method
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@ -2265,14 +2265,6 @@ struct adc_dev_s;
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struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
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int channels);
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/************************************************************************************
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* Name: stm32_adc_llops_get
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************************************************************************************/
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#ifdef CONFIG_STM32_ADC_LL_OPS
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FAR const struct stm32_adc_ops_s *stm32_adc_llops_get(FAR struct adc_dev_s *dev);
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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