From b3e300f8e61b1572349bb253d5c5a55fe0d63570 Mon Sep 17 00:00:00 2001 From: Masayuki Ishikawa Date: Sun, 2 Oct 2022 19:15:00 +0900 Subject: [PATCH] arch: qemu-rv: Fix qemu_rv_start_s() for S-mode Summary: - I found inappropriate SET_CSR() usage in the function. - This PR fixes this issue. Impact: - None Testing: - tested with rv-virt:knsh64 Signed-off-by: Masayuki Ishikawa --- arch/risc-v/src/qemu-rv/qemu_rv_start.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_start.c b/arch/risc-v/src/qemu-rv/qemu_rv_start.c index be831f6904..d9aacda827 100644 --- a/arch/risc-v/src/qemu-rv/qemu_rv_start.c +++ b/arch/risc-v/src/qemu-rv/qemu_rv_start.c @@ -131,14 +131,14 @@ void qemu_rv_start_s(int mhartid) { /* Disable MMU and enable PMP */ - SET_CSR(satp, 0x0); - SET_CSR(pmpaddr0, 0x3fffffffffffffull); - SET_CSR(pmpcfg0, 0xf); + WRITE_CSR(satp, 0x0); + WRITE_CSR(pmpaddr0, 0x3fffffffffffffull); + WRITE_CSR(pmpcfg0, 0xf); /* Set exception and interrupt delegation for S-mode */ - SET_CSR(medeleg, 0xffff); - SET_CSR(mideleg, 0xffff); + WRITE_CSR(medeleg, 0xffff); + WRITE_CSR(mideleg, 0xffff); /* Allow to write satp from S-mode */ @@ -152,11 +152,11 @@ void qemu_rv_start_s(int mhartid) /* Set the trap vector for S-mode */ extern void __trap_vec(void); - SET_CSR(stvec, (uintptr_t)__trap_vec); + WRITE_CSR(stvec, (uintptr_t)__trap_vec); /* Set mepc to the entry */ - SET_CSR(mepc, (uintptr_t)qemu_rv_start); + WRITE_CSR(mepc, (uintptr_t)qemu_rv_start); asm volatile("mret"); } #endif