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stm32f10xxx_dma.h: fix DAC names and remove STM32F33 section

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This commit is contained in:
raiden00pl 2017-08-21 18:45:14 +02:00
parent 104ff2b5d8
commit b460f2bca1
1 changed files with 7 additions and 76 deletions
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83
arch/arm/src/stm32/chip/stm32f10xxx_dma.h
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@ -306,14 +306,14 @@
# define DMACHAN_TIM2_UP STM32_DMA1_CHAN2
# define DMACHAN_TIM3_CH3 STM32_DMA1_CHAN2
# define DMACHAN_TIM6_UP STM32_DMA1_CHAN2
# define DMACHAN_DAC_CHAN1 STM32_DMA1_CHAN2
# define DMACHAN_DAC1_CH1 STM32_DMA1_CHAN2
# define DMACHAN_SPI1_TX STM32_DMA1_CHAN3
# define DMACHAN_USART3_RX STM32_DMA1_CHAN3
# define DMACHAN_TIM3_CH4 STM32_DMA1_CHAN3
# define DMACHAN_TIM3_UP STM32_DMA1_CHAN3
# define DMACHAN_TIM7_UP STM32_DMA1_CHAN3
# define DMACHAN_DAC_CHAN2 STM32_DMA1_CHAN3
# define DMACHAN_DAC1_CH2 STM32_DMA1_CHAN3
# define DMACHAN_SPI2_RX STM32_DMA1_CHAN4
# define DMACHAN_USART1_TX STM32_DMA1_CHAN4
@ -421,13 +421,13 @@
# define DMACHAN_UART4_RX STM32_DMA2_CHAN3
# define DMACHAN_TIM6_UP STM32_DMA2_CHAN3
# define DMACHAN_DAC_CHAN1 STM32_DMA2_CHAN3
# define DMACHAN_DAC1_CH1 STM32_DMA2_CHAN3
# define DMACHAN_TIM8_CH1 STM32_DMA2_CHAN3
# define DMACHAN_SDIO STM32_DMA2_CHAN4
# define DMACHAN_TIM5_CH2 STM32_DMA2_CHAN4
# define DMACHAN_TIM7_UP STM32_DMA2_CHAN4
# define DMACHAN_DAC_CHAN2 STM32_DMA2_CHAN4
# define DMACHAN_DAC1_CH2 STM32_DMA2_CHAN4
# define DMACHAN_ADC3 STM32_DMA2_CHAN5
# define DMACHAN_UART4_TX STM32_DMA2_CHAN5
@ -509,86 +509,17 @@
# define DMACHAN_ADC2_2 STM32_DMA2_CHAN3
# define DMACHAN_UART4_RX STM32_DMA2_CHAN3
# define DMACHAN_TIM6_UP STM32_DMA2_CHAN3
# define DMACHAN_DAC_CHAN1 STM32_DMA2_CHAN3
# define DMACHAN_DAC1_CH1 STM32_DMA2_CHAN3
# define DMACHAN_TIM8_CH1 STM32_DMA2_CHAN3
# define DMACHAN_ADC4_2 STM32_DMA2_CHAN4
# define DMACHAN_TIM7_UP_2 STM32_DMA2_CHAN4
# define DMACHAN_DAC_CHAN2 STM32_DMA2_CHAN4
# define DMACHAN_DAC1_CH2 STM32_DMA2_CHAN4
# define DMACHAN_ADC3 STM32_DMA2_CHAN5
# define DMACHAN_UART4_TX STM32_DMA2_CHAN5
# define DMACHAN_TIM8_CH2 STM32_DMA2_CHAN5
#elif defined(CONFIG_STM32_STM32F33XX)
# define DMACHAN_ADC1 STM32_DMA1_CHAN1
# define DMACHAN_TIM2_CH3 STM32_DMA1_CHAN1
# define DMACHAN_TIM17_CH1_1 STM32_DMA1_CHAN1
# define DMACHAN_TIM17_UP_1 STM32_DMA1_CHAN1
# define DMACHAN_ADC2_1 STM32_DMA1_CHAN2
# define DMACHAN_SPI1_RX_1 STM32_DMA1_CHAN2
# define DMACHAN_USART3_TX STM32_DMA1_CHAN2
# define DMACHAN_I2C1_TX_3 STM32_DMA1_CHAN4
# define DMACHAN_TIM1_CH1 STM32_DMA1_CHAN2
# define DMACHAN_TIM2_UP STM32_DMA1_CHAN2
# define DMACHAN_TIM3_CH3 STM32_DMA1_CHAN2
# define DMACHAN_HRTIM1_M STM32_DMA1_CHAN2
# define DMACHAN_SPI1_TX_1 STM32_DMA1_CHAN3
# define DMACHAN_USART3_RX STM32_DMA1_CHAN3
# define DMACHAN_I2C1_RX_2 STM32_DMA1_CHAN3
# define DMACHAN_TIM3_CH4 STM32_DMA1_CHAN3
# define DMACHAN_TIM3_UP STM32_DMA1_CHAN3
# define DMACHAN_TIM6_UP STM32_DMA1_CHAN3
# define DMACHAN_DAC1_CH1 STM32_DMA1_CHAN3
# define DMACHAN_DAC16_CH1_1 STM32_DMA1_CHAN3
# define DMACHAN_DAC16_UP_1 STM32_DMA1_CHAN3
# define DMACHAN_HRTIM1_A STM32_DMA1_CHAN3
# define DMACHAN_ADC2_2 STM32_DMA1_CHAN4
# define DMACHAN_SPI1_RX_2 STM32_DMA1_CHAN4
# define DMACHAN_USART1_TX STM32_DMA1_CHAN4
# define DMACHAN_I2C1_TX_3 STM32_DMA1_CHAN4
# define DMACHAN_TIM1_CH4 STM32_DMA1_CHAN4
# define DMACHAN_TIM1_TRIG STM32_DMA1_CHAN4
# define DMACHAN_TIM1_COM STM32_DMA1_CHAN4
# define DMACHAN_TIM7_UP STM32_DMA1_CHAN4
# define DMACHAN_DAC2_CH2 STM32_DMA1_CHAN4
# define DMACHAN_HRTIM1_B STM32_DMA1_CHAN4
# define DMACHAN_SPI1_TX_2 STM32_DMA1_CHAN5
# define DMACHAN_USART1_RX STM32_DMA1_CHAN5
# define DMACHAN_I2C1_RX_3 STM32_DMA1_CHAN5
# define DMACHAN_TIM1_UP STM32_DMA1_CHAN5
# define DMACHAN_TIM2_CH1 STM32_DMA1_CHAN5
# define DMACHAN_DAC2_CH1 STM32_DMA1_CHAN5
# define DMACHAN_TIM15_CH1 STM32_DMA1_CHAN5
# define DMACHAN_TIM15_UP STM32_DMA1_CHAN5
# define DMACHAN_TIM15_TRIG STM32_DMA1_CHAN5
# define DMACHAN_TIM15_COM STM32_DMA1_CHAN5
# define DMACHAN_HRTIM1_C STM32_DMA1_CHAN5
# define DMACHAN_SPI1_RX_3 STM32_DMA1_CHAN6
# define DMACHAN_USART2_RX STM32_DMA1_CHAN6
# define DMACHAN_I2C1_TX_1 STM32_DMA1_CHAN6
# define DMACHAN_TIM1_CH3 STM32_DMA1_CHAN6
# define DMACHAN_TIM3_CH1 STM32_DMA1_CHAN6
# define DMACHAN_TIM3_TRIG STM32_DMA1_CHAN6
# define DMACHAN_TIM16_CH1_2 STM32_DMA1_CHAN6
# define DMACHAN_TIM16_UP_2 STM32_DMA1_CHAN6
# define DMACHAN_HRTIM1_D STM32_DMA1_CHAN6
# define DMACHAN_SPI1_TX_3 STM32_DMA1_CHAN7
# define DMACHAN_USART2_TX STM32_DMA1_CHAN7
# define DMACHAN_I2C1_RX_1 STM32_DMA1_CHAN7
# define DMACHAN_TIM2_CH2 STM32_DMA1_CHAN7
# define DMACHAN_TIM2_CH4 STM32_DMA1_CHAN7
# define DMACHAN_TIM17_CH1_2 STM32_DMA1_CHAN7
# define DMACHAN_TIM17_UP_2 STM32_DMA1_CHAN7
# define DMACHAN_HRTIM1_E STM32_DMA1_CHAN7
#elif defined(CONFIG_STM32_STM32F37XX)
# define DMACHAN_ADC1 STM32_DMA1_CHAN1
@ -667,7 +598,7 @@
# define DMACHAN_SDADC3 STM32_DMA2_CHAN5
# define DMACHAN_TIM5_CH1 STM32_DMA2_CHAN5
# define DMACHAN_TIM18_UP_2 STM32_DMA2_CHAN5
# define DMACHAN_TIM18_UP_2 STM32_DMA2_CHAN5
# define DMACHAN_DAC2_CH1_2 STM32_DMA2_CHAN5
#else