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Completes coding of the PWM module

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4200 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-19 19:24:09 +00:00
parent 7faf5646a1
commit b4889c86d8
2 changed files with 19 additions and 5 deletions
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13
configs/stm3210e-eval/README.txt
View File

@ -492,8 +492,6 @@ STM3210E-EVAL-specific Configuration Options
CONFIG_STM32_TIM3_PWM
CONFIG_STM32_TIM4_PWM
CONFIG_STM32_TIM5_PWM
CONFIG_STM32_TIM6_PWM
CONFIG_STM32_TIM7_PWM
CONFIG_STM32_TIM8_PWM
CONFIG_STM32_TIM1_ADC
@ -514,7 +512,16 @@ STM3210E-EVAL-specific Configuration Options
CONFIG_STM32_TIM7_DAC
CONFIG_STM32_TIM8_DAC
Alternate pin mappings (should not be used with the STM3210E-EVAL board):
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
Alternate pin mappings (should not be used with the STM3210E-EVAL board):
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP

11
configs/stm3240g-eval/README.txt
View File

@ -371,8 +371,6 @@ STM3240G-EVAL-specific Configuration Options
CONFIG_STM32_TIM3_PWM
CONFIG_STM32_TIM4_PWM
CONFIG_STM32_TIM5_PWM
CONFIG_STM32_TIM6_PWM
CONFIG_STM32_TIM7_PWM
CONFIG_STM32_TIM8_PWM
CONFIG_STM32_TIM9_PWM
CONFIG_STM32_TIM10_PWM
@ -399,6 +397,15 @@ STM3240G-EVAL-specific Configuration Options
CONFIG_STM32_TIM7_DAC
CONFIG_STM32_TIM8_DAC
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)