diff --git a/configs/Kconfig b/configs/Kconfig index 27c0f68182..a50b03d9b9 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -308,6 +308,14 @@ config ARCH_BOARD_LPC4357_EVB NXP Technologies LPC4357 EVB board. This board is based on the LPC4357FET256. +config ARCH_BOARD_LPC4370_LINK2 + bool "NXP LPC4370-Link2" + depends on ARCH_CHIP_LPC4370FET100 + select ARCH_HAVE_LEDS + ---help--- + NXP LPC4370 Link2 board. This board is based on the + LPC4370FET100. The Code Red toolchain is used by default. + config ARCH_BOARD_MBED bool "mbed LCP1768" depends on ARCH_CHIP_LPC1768 @@ -788,7 +796,6 @@ config ARCH_BOARD_SAMV71_XULT select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS - select ARCH_PHY_INTERRUPT if NETDEVICES ---help--- The port of NuttX to the Atmel SAMV71 Xplained Ultra evalutation board. @@ -1254,6 +1261,7 @@ config ARCH_BOARD default "lm4f120-launchpad" if ARCH_BOARD_LM4F120_LAUNCHPAD default "lpc4330-xplorer" if ARCH_BOARD_LPC4330_XPLORER default "lpc4357-evb" if ARCH_BOARD_LPC4357_EVB + default "lpc4370-link2" if ARCH_BOARD_LPC4370_LINK2 default "lpcxpresso-lpc1115" if ARCH_BOARD_LPCXPRESSO_LPC1115 default "lpcxpresso-lpc1768" if ARCH_BOARD_LPCXPRESSO default "maple" if ARCH_BOARD_MAPLE @@ -1487,6 +1495,9 @@ endif if ARCH_BOARD_LPC4357_EVB source "configs/lpc4357-evb/Kconfig" endif +if ARCH_BOARD_LPC4370_LINK2 +source "configs/lpc4370-link2/Kconfig" +endif if ARCH_BOARD_LPCXPRESSO source "configs/lpcxpresso-lpc1768/Kconfig" endif diff --git a/configs/lpc4370-link2/Kconfig b/configs/lpc4370-link2/Kconfig new file mode 100644 index 0000000000..e9e028dcf6 --- /dev/null +++ b/configs/lpc4370-link2/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_LPC4370_LINK2 +endif diff --git a/configs/lpc4370-link2/README.txt b/configs/lpc4370-link2/README.txt new file mode 100644 index 0000000000..b9bbb50b5d --- /dev/null +++ b/configs/lpc4370-link2/README.txt @@ -0,0 +1,1021 @@ +README +====== + +README for NuttX port to the LPC4370-Link2 board featuring the NXP +LPC4370FET100 MCU - The port was derived from the LPC4370-Link2 board NuttX +port. + +Contents +======== + + - LPC4370-Link2 development board + - Status + - Development Environment + - GNU Toolchain Options + - IDEs + - Code Red IDE/Tools + Booting the LPCLink + Using GDB + Troubleshooting + Command Line Flash Programming + Executing from SPIFI + USB DFU Booting + - NuttX EABI "buildroot" Toolchain + - NuttX OABI "buildroot" Toolchain + - NXFLAT Toolchain + - LED and Pushbuttons + - Serial Console + - FPU + - LPC4370-Link2 Configuration Options + - Configurations + - STATUS + +LPC4370-Link2 board +================= + + Memory Map + ---------- + + Block Start Length + Name Address + --------------------- ---------- ------ + RAM 0x10000000 128K + RAM2 0x10080000 72K + RAMAHB 0x20000000 32K + RAMAHB2 0x20008000 16K + RAMAHB3 0x2000c000 16K + RAMM0 0x18000000 16K + RAMM01 0x18004000 2K + SPIFI flash 0x14000000 1024K + + Console + ------- + + The LPC4370-Link2 default console is the USART0. + +Status +====== + + This is the current status of the LPC43xx port: + + - The basic OS test configuration and the basic NSH configurations + are present and fully verified. This includes: SYSTICK system time, + pin and GPIO configuration, and serial console support. A SPIFI + MTD driver is also in place but requires further verification. + + - The following drivers have been copied from the LPC17xx port, but + require integration into the LPC43xx. This integration should + consist of: + + - Remove LPC17xx power, clocking, and pin configuration logic. + - Adding of clock source and frequency to the board.h file. + - Adding of LPC43 clock connection and pin configuration logic. + + Within any luck, these drivers should come up very quickly: + + - lpc43_adc.c, + - lpc43_dac.c, + - lpc43_gpdma.c, + - lpc43_i2c.c, + - lpc43_spi.c, and + - lpc43_ssp.c + + These LPC17xx drivers were not brought into the LPC43xx port because + it appears the these peripherals have been completely redesigned: + + - CAN, + - Ethernet, + - USB device, and + - USB host. + + The following LPC43xx peripherals are unsupported. Some may be + compatible with the LPC17xx, but there is no LPC17xx driver to be + ported: + + - SD/MMC, + - EMC, + - USB0, + - USB1, + - Ethernet, + - LCD, + - SCT, + - Timers 0-3 + - MCPWM, + - QEI, + - Alarm timer, + - WWDT, + - RTC, + - Event monitor, and + - CAN, + + For the missing drivers some of these can be leveraged from other + MCUs that appear to support the same peripheral IP. + + - USB0 appears to be the same as the USB OTG peripheral for the + LPC31xx. It should be possible to drop in the LPC31xx driver + with a small porting effort. + + - The Ethernet block looks to be based on the same IP as the + STM32 Ethernet and, as a result, it should be possible to leverage + the STM32 Ethernet driver with a little more effort. + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. Testing was performed using the Cygwin + environment. + +GNU Toolchain Options +===================== + + The NuttX make system has been modified to support the following different + toolchain options. + + 1. The Code Red GNU toolchain, + 2. The CodeSourcery GNU toolchain, + 3. The Atollic Toolchain, + 4. The devkitARM GNU toolchain, + 5. The NuttX buildroot Toolchain (see below). + + All testing has been conducted using the NuttX buildroot toolchain. However, + the make system is setup to default to use the devkitARM toolchain. To use + the CodeSourcery or devkitARM toolchain, you simply need add one of the + following configuration options to your .config (or defconfig) file: + + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red "RedSuite" under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows + CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows + CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) + + If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify + the PATH in the setenv.h file if your make cannot find the tools. + + NOTE: the Code Red, CodeSourcery (for Windows), Atollic and devkitARM toolchains + are Windows native toolchains. The CodeSourcery (for Linux) and NuttX buildroot + toolchains are Cygwin and/or Linux native toolchains. There are several limitations + to using a Windows based toolchain in a Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + 3. Dependencies are not made when using Windows versions of the GCC. This is + because the dependencies are generated using Windows pathes which do not + work with the Cygwin make. + + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + + The CodeSourcery Toolchain (2009q1) + ----------------------------------- + The CodeSourcery toolchain (2009q1) does not work with default optimization + level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with + -Os. + + The Atollic "Pro" and "Lite" Toolchain + -------------------------------------- + One problem that I had with the Atollic toolchains is that the provide a gcc.exe + and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path + appears in your PATH variable before /usr/bin, then you will get the wrong gcc + when you try to build host executables. This will cause to strange, uninterpretable + errors build some host binaries in tools/ when you first make. + + Also, the Atollic toolchains are the only toolchains that have built-in support for + the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will + need to use the Atollic toolchain for now. See the FPU section below for more + information. + + The Atollic "Lite" Toolchain + ---------------------------- + The free, "Lite" version of the Atollic toolchain does not support C++ nor + does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite" + toolchain, you will have to set: + + CONFIG_HAVE_CXX=n + + In order to compile successfully. Otherwise, you will get errors like: + + "C++ Compiler only available in TrueSTUDIO Professional" + + The make may then fail in some of the post link processing because of some of + the other missing tools. The Make.defs file replaces the ar and nm with + the default system x86 tool versions and these seem to work okay. Disable all + of the following to avoid using objcopy: + + CONFIG_RRLOAD_BINARY=n + CONFIG_INTELHEX_BINARY=n + CONFIG_MOTOROLA_SREC=n + CONFIG_RAW_BINARY=n + + devkitARM + --------- + The devkitARM toolchain includes a version of MSYS make. Make sure that the + the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM + path or will get the wrong version of make. + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project . + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + Native Build + ------------ + Here are a few tips before you start that effort: + + 1) Select the toolchain that you will be using in your .config file + 2) Start the NuttX build at least one time from the Cygwin command line + before trying to create your project. This is necessary to create + certain auto-generated files and directories that will be needed. + 3) Set up include pathes: You will need include/, arch/arm/src/lpc43xx, + arch/arm/src/common, arch/arm/src/armv7-m, and sched/. + 4) All assembly files need to have the definition option -D __ASSEMBLY__ + on the command line. + + Startup files will probably cause you some headaches. The NuttX startup file + is arch/arm/src/common/up_vectors.S. + +Code Red IDE/Tools +^^^^^^^^^^^^^^^^^^ + + Booting the LPCLink + ------------------- + + The first step is to activate the LPCLink's boot mode. Some general + instructions to do this are provided here: + + http://support.code-red-tech.com/CodeRedWiki/BootingLPCLink + + For my RedSuite installation path, that can be done using the following + steps in a Cygwin bash shell: + + $ /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/Scripts/bootLPCXpresso.cmd winusb + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + The same file logic can be found the less restrictive LPCXpresso package at: + + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin + + (The "free" RedSuite version has a download limit of 8K; the "free" LPCXpresso + version has a download limit of 128K). + + NOTE that the following alias is defined in the setenv.sh file and + can be used to enter the boot mode with a simpler command: + + alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' + + Be default, the setenv.sh scripts uses the LPCXpresso path shown above. + Once setenv.sh has been sources, then entering boot mode becomes simply: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + Using GDB + --------- + + The underlying debugger within Red Suite/LPCXpresso is GDB. That GDB + used from the command line. The GDB configuration details for command + line use are on Code Red Wiki: + + http://support.code-red-tech.com/CodeRedWiki/UsingGDB + + and is also summarized here (see the full Wiki for additional details + and options). + + The Code Red Debug Driver implements the GDB "remote" protocol to allow + connection to debug targets. To start a debug session using GDB, use + following steps: + + arm-none-eabi-gdb executable.axf : Start GDB and name the debug image + target extended-remote | : Start debug driver, connect to target + load : Load image and download to target + + The where is crt_emu_lpc18_43_nxp for LPC18xx and LPC43xx. + Your PATH variable should be set up so that the debug driver executable + can be found. For my installation, the driver for the LPC18xx and LPC43xx + is located at: + + /cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin/crt_emu_lpc18_43_nxp.exe, OR + /cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin/crt_emu_lpc18_43_nxp.exe + + And are: + + -n set information level for the debug driver. n should be 2, 3 or 4. + 2 should be sufficient in most circumstances + + -p is the target device to connect to and you should use + =LPC4370. + + -wire= specifies the debug probe. For LPCLink on Windows 7 use + =winusb. The 128K free version only supports the LPC-Link + and RedProbe debug probes. Other JTAG interfaces are supported in + the full version. + + Thus the correct invocation for the LPC4370 under Windows7 would be: + + target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4370 -wire=winusb + + DDD. This command can be used to start GDB under the graphics front-end + DDD: + + $ ddd --debugger arm-none-eabi-gdb nuttx & + + NOTE 1: Don't forget to put the LPCLink in boot mode as described above + before starting GDB. So a typical session might look like this: + + $ lpc43xx + Booting LPC-Link with LPCXpressoWIN.enc + Press any key to continue . . . + + $ arm-none-eabi-gdb nuttx + (gdb) target extended-remote | crt_emu_lpc18_43_nxp -2 -pLPC4370 -wire=winusb + (gdb) load + (gdb) r + (gdb) c + + NOTE 2: Don't forget to enable CONFIG_DEBUG_SYMBOLS=y in your NuttX + configuration file when you build NuttX. That option is necessary to build + in debugging symbols. + + NOTE 3: There are few things that NuttX has to do differently if you + are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing + also is needed and no debug output will be generated; but NuttX will + use CONFIG_DEBUG=y to mean that a debugger is attached and will deal + with certain resets and debug controls appropriately. + + So you should have: + + CONFIG_DEBUG=y + CONFIG_DEBUG_SYMBOLS=y + + NOTE 4: Every time that you control-C out of the command line GDB, you + leave a copy of the Code Red debugger (crt_emu_lpc18_43_nxp) running. I + have found that if you have these old copies of the debugger running, + hen strange things can happen when start yet another copy of the + debugger (I suspect that GDB may be talking with the wrong debugger). + + If you exit GDB with quit (not control-C), it seems to clean-up okay. + But I have taken to keeping a Process Explorer window open all of the + time to keep track of how many of these bad processes have been created. + + NOTE 5: There is also a certain function that is causing some problems. + The very first thing that the start-up logic does is call a function + called lpc43_softreset() which resets most of the peripherals. But it + also causes some crashes... I think because the resets are causing some + interrupts. + + I put a big delay in the soft reset logic between resetting and clearing + pending interrupts and that seems to help some but I am not confident + that that is a fix. I think that the real fix might be to just eliminated + this lpc43_softreset() function if we determine that it is not needed. + + If you step over lpc43_softreset() after loading the coding (using the 'n' + command), then everything seems work okay. + + Troubleshooting + --------------- + + This page provides some troubleshooting information that you can use to + verify that the LPCLink is working correctly: + + http://support.code-red-tech.com/CodeRedWiki/LPCLinkDiagnostics + + Command Line Flash Programming + ------------------------------ + + The LPC18xx/LPC43xx debug driver can also be used to program the LPC43xx + flash directly from the command line. The script flash.sh that may be + found in the configs/LPC4370-Link2/scripts directory can do that with + a single command line command. + + Executing from SPIFI + -------------------- + + By default, the configurations here assume that you are executing directly + from SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + To boot the LPC4370-Link2 from SPIFI the DIP switches should be 1-OFF, + 2-ON, 3-ON, 4-ON (LOW LOW LOW HIGH in Table 19, MSB to LSB). + + If the code in flash hard faults after reset and crt_emu_lpc18_43_nxp + can't reset the MCU, an alternative is to temporarily change switch 1 + to ON and press the reset button so it enters UART boot mode. Then + change it back to OFF and reset to boot again from flash. + + # Use -wire to specify the debug probe in use: + # (empty) Red Probe+ + # -wire=winusb LPC-Link on Windows XP + # -wire=hid LPC-Link on Windows Vista/ Windows 7 + # Add -g -4 for verbose output + + crt_emu_lpc18_43_nxp -wire=hid -pLPC4370 -load-base=0x14000000 + -flash-load-exec=nuttx.bin -flash-driver=LPC1850A_4350A_SPIFI.cfx + + USB DFU Booting + --------------- + + To be provided. + +NuttX EABI "buildroot" Toolchain +================================ + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX + Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh LPC4370-xplorer/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you + are building a Cortex-M3 toolchain for Cygwin under Windows. + + NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the + the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for + more information about this problem. If you plan to use NXFLAT, please do not + use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. + See instructions below. + +NuttX OABI "buildroot" Toolchain +================================ + + The older, OABI buildroot toolchain is also available. To use the OABI + toolchain: + + 1. When building the buildroot toolchain, either (1) modify the cortexm3-eabi-defconfig-4.6.3 + configuration to use EABI (using 'make menuconfig'), or (2) use an exising OABI + configuration such as cortexm3-defconfig-4.3.3 + + 2. Modify the Make.defs file to use the OABI conventions: + + +CROSSDEV = arm-nuttx-elf- + +ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft + +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections + -CROSSDEV = arm-nuttx-eabi- + -ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections + +NXFLAT Toolchain +================ + + If you are *not* using the NuttX buildroot toolchain and you want to use + the NXFLAT tools, then you will still have to build a portion of the buildroot + tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can + be downloaded from the NuttX Bitbucket download site + (https://bitbucket.org/patacongo/nuttx/downloads/). + + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh lpcxpresso-lpc1768/ + + 2. Download the latest buildroot package into + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename /buildroot-x.y.z to /buildroot. + + 4. cd /buildroot + + 5. cp configs/cortexm3-defconfig-nxflat .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly builtNXFLAT binaries. + +LED and Pushbuttons +=================== + + LED + --- + The LPC4370-Link2 has one user-controllable LED labelled D6 controlled + by the signal LED_3V3: + + LED SIGNAL MCU + D6 LED_3V3 PE_& GPIO7[7] + + A low output illuminates the LED. + + If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows + for NuttX debug functionality (where NC means "No Change"). + + -------------------------- --------- + LED + -------------------------- --------- + LED_STARTED OFF + LED_HEAPALLOCATE OFF + LED_IRQSENABLED OFF + LED_STACKCREATED ON + LED_INIRQ NC + LED_SIGNAL NC + LED_ASSERTION NC + LED_PANIC Flashing + -------------------------- --------- + + If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + control of the application. The following interfaces are then available + for application control of the LEDs: + + void lpc43_ledinit(void); + void lpc43_setled(int led, bool ledon); + void lpc43_setleds(uint8_t ledset); + + Pushbuttons + ----------- + To be provided + +Serial Console +============== + +The LPC4370-Link2 does not have RS-232 drivers or serial connectors on board. +USART, USART2 and USART3 are available on J12 as follows: + + ------ ------ ----------------------- + SIGNAL J12 PIN LPC4370FET256 PIN + (TFBGA256 package) + ------ ------ ----------------------- + U0_TXD pin 3 F6 P9_5 U0_TXD=Alt 4 + U0_RXD pin 4 F9 P9_6 U0_RXD=Alt 4 + U2_TXD pin 5 H8 P1_13 U1_TXD=Alt 1 + U2_RXD pin 6 J8 P1_14 U1_RXD=Alt 1 + U3_TXD pin 7 H8 P1_13 U1_TXD=Alt 1 + U3_RXD pin 8 J8 P1_14 U1_RXD=Alt 1 + ------ ------ ----------------------- + + GND is available on J12 pins 29 and 30 + 5V is available on J12 pin 2 + 3.3v id available on J12 pin 1 + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the most NuttX Cortex-M4 +ports. The current LPC43xx port support only one of these options, the "Non- +Lazy Floating Point Register Save". As a consequence, CONFIG_ARMV7M_CMNVECTOR +must be defined in *all* LPC43xx configuration files. + +1. Lazy Floating Point Register Save. + + This is an untested implementation that saves and restores FPU registers + only on context switches. This means: (1) floating point registers are + not stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + +2. Non-Lazy Floating Point Register Save + + Mike Smith has contributed an extensive re-write of the ARMv7-M exception + handling logic. This includes verified support for the FPU. These changes + have not yet been incorporated into the mainline and are still considered + experimental. These FPU logic can be enabled with: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_CMNVECTOR=y + + You will probably also changes to the ld.script in if this option is selected. + This should work: + + -ENTRY(_stext) + +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ + +EXTERN(_vectors) /* Force the vectors to be included in the output */ + +CFLAGS +------ + +Only the recent toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +Configuration Changes +--------------------- + +Below are all of the configuration changes that I had to make to configs/stm3240g-eval/nsh2 +in order to successfully build NuttX using the Atollic toolchain WITH FPU support: + + -CONFIG_ARCH_FPU=n : Enable FPU support + +CONFIG_ARCH_FPU=y + + -CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : Disable the CodeSourcery toolchain + +CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n + + -CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=n : Enable the Atollic toolchains + +CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : + + -CONFIG_INTELHEX_BINARY=y : Suppress generation FLASH download formats + +CONFIG_INTELHEX_BINARY=n : (Only necessary with the "Lite" version) + + -CONFIG_HAVE_CXX=y : Suppress generation of C++ code + +CONFIG_HAVE_CXX=n : (Only necessary with the "Lite" version) + +See the section above on Toolchains, NOTE 2, for explanations for some of +the configuration settings. Some of the usual settings are just not supported +by the "Lite" version of the Atollic toolchain. + +LPC4370-Link2 Configuration Options +===================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM3=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=lpc43xx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_LPC4370=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=LPC4370-Link2 (for the LPC4370-Link2 board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_LPC4370Link2=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_RAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_RAM_START - The start address of installed DRAM + + CONFIG_RAM_START=0x10000000 + + CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running + from internal FLASH, external FLASH, SPIFI, or SRAM in order to + initialize properly. Note that a boot device is not specified for + cases where the code is copied into SRAM; those cases are all covered + by CONFIG_LPC43_BOOT_SRAM. + + CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000) + CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000) + CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000) + CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000) + CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000) + CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000) + CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000) + CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000) + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + Individual subsystems can be enabled: + + CONFIG_LPC43_ADC0=y + CONFIG_LPC43_ADC1=y + CONFIG_LPC43_ATIMER=y + CONFIG_LPC43_CAN1=y + CONFIG_LPC43_CAN2=y + CONFIG_LPC43_DAC=y + CONFIG_LPC43_EMC=y + CONFIG_LPC43_ETHERNET=y + CONFIG_LPC43_EVNTMNTR=y + CONFIG_LPC43_GPDMA=y + CONFIG_LPC43_I2C0=y + CONFIG_LPC43_I2C1=y + CONFIG_LPC43_I2S0=y + CONFIG_LPC43_I2S1=y + CONFIG_LPC43_LCD=y + CONFIG_LPC43_MCPWM=y + CONFIG_LPC43_QEI=y + CONFIG_LPC43_RIT=y + CONFIG_LPC43_RTC=y + CONFIG_LPC43_SCT=y + CONFIG_LPC43_SDMMC=y + CONFIG_LPC43_SPI=y + CONFIG_LPC43_SPIFI=y + CONFIG_LPC43_SSP0=y + CONFIG_LPC43_SSP1=y + CONFIG_LPC43_TMR0=y + CONFIG_LPC43_TMR1=y + CONFIG_LPC43_TMR2=y + CONFIG_LPC43_TMR3=y + CONFIG_LPC43_USART0=y + CONFIG_LPC43_UART1=y + CONFIG_LPC43_USART2=y + CONFIG_LPC43_USART3=y + CONFIG_LPC43_USB0=y + CONFIG_LPC43_USB1=y + CONFIG_LPC43_USB1_ULPI=y + CONFIG_LPC43_WWDT=y + + LPC43xx specific U[S]ART device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the USART0). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode + ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable + RS-485 mode. + + LPC43xx specific CAN device driver settings. These settings all + require CONFIG_CAN: + + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined. + CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined. + CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number. + (the CCLK frequency is divided by this number to get the CAN clock). + Options = {1,2,4,6}. Default: 4. + CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7 + + LPC43xx specific PHY/Ethernet device driver settings. These setting + also require CONFIG_NET and CONFIG_LPC43_ETHERNET. + + CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY + CONFIG_PHY_AUTONEG - Enable auto-negotion + CONFIG_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. + CONFIG_PHY_FDUPLEX - Select full (vs. half) duplex + + CONFIG_NET_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb + CONFIG_NET_NTXDESC - Configured number of Tx descriptors. Default: 18 + CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18 + CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented). + CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs + CONFIG_DEBUG. + CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets. + Also needs CONFIG_DEBUG. + CONFIG_NET_HASH - Enable receipt of near-perfect match frames. + CONFIG_NET_MULTICAST - Enable receipt of multicast (and unicast) frames. + Automatically set if CONFIG_NET_IGMP is selected. + + LPC43xx USB Device Configuration + + CONFIG_LPC43_USBDEV_FRAME_INTERRUPT + Handle USB Start-Of-Frame events. + Enable reading SOF from interrupt handler vs. simply reading on demand. + Probably a bad idea... Unless there is some issue with sampling the SOF + from hardware asynchronously. + CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT + Enable high priority interrupts. I have no idea why you might want to + do that + CONFIG_LPC43_USBDEV_NDMADESCRIPTORS + Number of DMA descriptors to allocate in SRAM. + CONFIG_LPC43_USBDEV_DMA + Enable lpc17xx-specific DMA support + CONFIG_LPC43_USBDEV_NOVBUS + Define if the hardware implementation does not support the VBUS signal + CONFIG_LPC43_USBDEV_NOLED + Define if the hardware implementation does not support the LED output + + LPC43xx USB Host Configuration + + CONFIG_USBHOST_OHCIRAM_SIZE + Total size of OHCI RAM (in AHB SRAM Bank 1) + CONFIG_USBHOST_NEDS + Number of endpoint descriptors + CONFIG_USBHOST_NTDS + Number of transfer descriptors + CONFIG_USBHOST_TDBUFFERS + Number of transfer descriptor buffers + CONFIG_USBHOST_TDBUFSIZE + Size of one transfer descriptor buffer + CONFIG_USBHOST_IOBUFSIZE + Size of one end-user I/O buffer. This can be zero if the + application can guarantee that all end-user I/O buffers + reside in AHB SRAM. + +Configurations +============== + +Each LPC4370-Link2 configuration is maintained in a sub-directory and can be selected +as follow: + + cd tools + ./configure.sh LPC4370-Link2/ + cd - + . ./setenv.sh + +Where is one of the following: + + nsh: + ---- + This configuration is the NuttShell (NSH) example at examples/nsh/. + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configurations using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. The project can exucute directly from SRAM with NuttX loaded by a debugger + by setting the following configuration options. + + CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM + CONFIG_ARMV7M_TOOLCHAIN_CODEREDW=y : Code Red under Windows + + 3. To execute from SPIFI, you would need to set: + + CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI + CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size + CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address + CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset + + CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks + to the memory pool. + + 4. This configuration an also be used create a block device on the SPIFI + FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup + support: + + SPIFI device geometry: + + CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many + bytes into the device address space. This offset must be an exact + multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0. + CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + then the driver will try to determine the correct erase block size by + examining that data returned from spifi_initialize (which sometimes + seems bad). + + Other SPIFI options + + CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more + FAT friendly 512 byte sector size and will manage the read-modify-write + operations on the larger erase block. + CONFIG_SPIFI_READONLY - Define to support only read-only operations. + CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead, + use an external library implementation of the SPIFI interface. + CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading + from the SPI address space after each write. + CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You + probably do not want to enable this unless you want to dig through a + *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, + and CONFIG_DEBUG_FS, + + 5. In my experience, there were some missing function pointers in the LPC43xx + SPIFI ROM routines and the SPIFI configuration could only be built with + CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be + provided within NuttX open source repository; SPIFI library binaries can + be found on the lpcware.com website. In this build sceneario, you must + also provide the patch to the external SPIFI library be defining the make + variable EXTRA_LIBS in the top-level Make.defs file. Good luck! + + 6. By default the LPC4370-Link2 port is configured to run from the onboard flash + bank A at 0x1a000000. In order to achieve this, the resulting NuttX binary + will need to have a checksum computed over the vector table and then be + converted to a hex file which can then be flashed using a debugger such as + the ULINK2 through Keil. + + The checksum can be computed using the checksum binary provided with the + LPCXpresso IDE software suite as follows: + + ./checksum nuttx.bin -p LPC4370 -v + + This will modify the binary file, appending the checksum to the correct place + at the end of the vector table. + + The binary must now be converted to a hex file, which can be achieved using + the srec_cat utility, which is part of the SRecord package (srecord.sourceforge.net) + as follows: + + srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44 + + Now the hex file can be loaded using a debugger, and the code will execute from + flash. + +STATUS +====== + + 1. This configuration derives from the LPC4330 Xplorer configuration. In + many cases there have been global substitutions for naming to the + LPC4370 Link2 without corresponding updates to the technical description. + Thus all technical details should be taken with a grain of salt. GPIO + definitions may actually are remnants of the LPC4330-Xplorer that still + need clean-up. + diff --git a/configs/lpc4370-link2/include/board.h b/configs/lpc4370-link2/include/board.h new file mode 100644 index 0000000000..900db25684 --- /dev/null +++ b/configs/lpc4370-link2/include/board.h @@ -0,0 +1,329 @@ +#ifndef __ARCH_BOARD_BOARD_H +#define __ARCH_BOARD_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking ****************************************************************/ +/* NOTE: The following definitions require lpc43_cgu.h. It is not included + * here because the including C file may not have that file in its include + * path. + * + * The Xplorer board has four crystals on board: + * + * Y1 - RTC 32.768 MHz oscillator input, + * Y2 - 24.576 MHz input to the UDA 1380 audio codec, + * Y3 - 12.000 MHz LPC43xx crystal oscillator input + * Y4 - 50 MHz input for Ethernet + */ + +#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */ +#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */ +#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ + +/* Integer and direct modes are supported: + * + * In integer mode (Fclkout < 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = 2 * Psel * Fclkout + * In direct mode (Fclkout > 156000000): + * Fclkin = BOARD_XTAL_FREQUENCY + * Fclkout = Msel * FClkin / Nsel + * Fcco = Fclkout + */ + +#ifdef CONFIG_LPC43_72MHz + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=7191 + * + * executing from SRAM. + */ + +/* Final clocking (Integer mode with no ramp-up) + * + * Fclkout = 6 * 12MHz / 1 = 72MHz + * Fcco = 2 * 2 * 72MHz = 216MHz + */ + +# define BOARD_PLL_MSEL (6) /* Msel = 6 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_PSEL (2) /* Psel = 2 */ + +# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */ + +#else + +/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was + * determined to be: + * + * CONFIG_BOARD_LOOPSPERMSEC=18535 + * + * executing from SRAM. + */ + +/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL + * is not defined, there will be no ramp-up. + * + * Fclkout = 9 * 12MHz / 1 = 108MHz + * Fcco = 2 * 1 * 108MHz = 216MHz + */ + +# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */ +# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */ +# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */ + +# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */ +# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */ + +/* Final clocking (Direct mode). + * + * Fclkout = 17 * 12MHz / 1 = 204MHz + * Fcco = Fclockout = 204MHz + */ + +# define BOARD_PLL_MSEL (17) /* Msel = 17 */ +# define BOARD_PLL_NSEL (1) /* Nsel = 1 */ + +# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */ +# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */ + +#endif + + + +#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_MCPWM) || defined(CONFIG_LPC43_I2C0) || defined(CONFIG_LPC43_I2S0) || defined(CONFIG_LPC43_I2S1) || defined(CONFIG_LPC43_CAN1) +#define BOARD_ABP1_CLKSRC BASE_APB1_CLKSEL_XTAL +#define BOARD_ABP1_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + +#if defined(CONFIG_LPC43_BUS) || defined(CONFIG_LPC43_I2C1) || defined(CONFIG_LPC43_DAC) || defined(CONFIG_LPC43_ADC0) || defined(CONFIG_LPC43_ADC1) || defined(CONFIG_LPC43_CAN0) +#define BOARD_ABP3_CLKSRC BASE_APB3_CLKSEL_XTAL +#define BOARD_ABP3_FREQUENCY BOARD_XTAL_FREQUENCY +#endif + + + +#define BOARD_IDIVA_DIVIDER (2) +#define BOARD_IDIVA_CLKSRC IDIVA_CLKSEL_PLL1 +#define BOARD_IDIVA_FREQUENCY (BOARD_FCLKOUT_FREQUENCY/BOARD_IDIVA_DIVIDER) + + +/* USB0 ********************************************************************/ +/* Settings needed in lpc43_cpu.c */ + +#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL +#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */ +#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */ + +/* SPIFI clocking **********************************************************/ +/* The SPIFI will receive clocking from a divider per the settings provided + * in this file. The NuttX code will configure PLL1 as the input clock + * for the selected divider + */ + +#undef BOARD_SPIFI_PLL1 /* No division */ +#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */ +#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */ +#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */ +#else +# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */ +#endif + + +/* We need to configure the divider so that its output is as close to the + * desired SCLK value. The peak data transfer rate will be about half of + * this frequency in bytes per second. + */ + +#if BOARD_FCLKOUT_FREQUENCY < 20000000 +# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */ +#else +# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */ +# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */ +#endif + +/* UART clocking ***********************************************************/ +/* Configure all U[S]ARTs to use the XTAL input frequency */ + +#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL +#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL +#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL +#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY + +#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL +#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY + + +/* SSP clocking *********************************************************** + * + * BOARD_SSPX_BASEFREQ may be further divided by 2-254 to get the SSP clock. If we + * want a usable range of 400KHz to 25MHz for the SSP, then: + * + * 1. SSPCLK must be greater than (2*25MHz) = 50MHz, and + * 2. SSPCLK must be less than (254*400Khz) = 101.6MHz. + * + */ + + +#define BOARD_SSP0_CLKSRC BASE_SSP0_CLKSEL_IDIVA +#define BOARD_SSP0_BASEFREQ BOARD_IDIVA_FREQUENCY + +#define BOARD_SSP1_CLKSRC BASE_SSP1_CLKSEL_IDIVA +#define BOARD_SSP1_BASEFREQ BOARD_IDIVA_FREQUENCY + + + +/* LED definitions *********************************************************/ + +/* + * LED1 K2 GPIO0[8] + * + * LED index values for use with lpc43_setled() + */ + +#define BOARD_LED 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with lpc43_setleds() */ + +#define BOARD_LED_BIT (1 << BOARD_LED) + +/* If CONFIG_ARCH_LEDS is defined, the LEDs will be controlled as follows + * for NuttX debug functionality (where NC means "No Change"). If + * CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under + * control of the application. The following interfaces are then available + * for application control of the LEDs: + * + * void lpc43_ledinit(void); + * void lpc43_setled(int led, bool ledon); + * void lpc43_setleds(uint8_t ledset); + */ + /* LED */ +#define LED_STARTED 0 /* OFF */ +#define LED_HEAPALLOCATE 0 /* OFF */ +#define LED_IRQSENABLED 0 /* OFF */ +#define LED_STACKCREATED 1 /* ON */ +#define LED_INIRQ 2 /* NC */ +#define LED_SIGNAL 2 /* NC */ +#define LED_ASSERTION 2 /* NC */ +#define LED_PANIC 3 /* Flashing */ + +/* UART Pins ****************************************************************/ +/* + * The following definitions must be provided so that the LPC43 serial + * driver can set up the U[S]ART for the serial console properly (see the + * file arch/arc/src/lpc43xx/lpc43*_pinconf.h for more info). + */ + +#define PINCONF_U0_TXD PINCONF_U0_TXD_3 +#define PINCONF_U0_RXD PINCONF_U0_RXD_3 +#define PINCONF_U0_DIR PINCONF_U0_DIR_3 + +#define PINCONF_U1_TXD PINCONF_U1_TXD_1 +#define PINCONF_U1_RXD PINCONF_U1_RXD_1 + +#define PINCONF_U2_TXD PINCONF_U2_TXD_2 +#define PINCONF_U2_RXD PINCONF_U2_RXD_2 +#define PINCONF_U2_DIR PINCONF_U2_DIR_2 + +#define PINCONF_U3_TXD PINCONF_U3_TXD_2 +#define PINCONF_U3_RXD PINCONF_U3_RXD_2 +#define PINCONF_U3_DIR PINCONF_U3_DIR_2 + +//I2C1 pins, not really accessible on the board +#define PINCONF_I2C1_SCL PINCONF_I2C1_SCL_1 +#define PINCONF_I2C1_SDA PINCONF_I2C1_SDA_1 + +//SSP1 pins +#define PINCONF_SSP1_MISO PINCONF_SSP1_MISO_3 +#define PINCONF_SSP1_MOSI PINCONF_SSP1_MOSI_3 +#define PINCONF_SSP1_SCK PINCONF_SSP1_SCK_1 +#define PINCONF_SSP1_SSEL PINCONF_SSP1_SSEL_1 + + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ****************************************************************************/ + +EXTERN void lpc43_boardinitialize(void); + +/***************************************************************************** + * Name: lpc43_ledinit, lpc43_setled, and lpc43_setleds + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the following interfaces + * are available to control the LEDs from user applications. + * + ****************************************************************************/ + +#ifndef CONFIG_ARCH_LEDS +EXTERN void lpc43_ledinit(void); +EXTERN void lpc43_setled(int led, bool ledon); +EXTERN void lpc43_setleds(uint8_t ledset); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/lpc4370-link2/nsh/Make.defs b/configs/lpc4370-link2/nsh/Make.defs new file mode 100644 index 0000000000..a72563c67e --- /dev/null +++ b/configs/lpc4370-link2/nsh/Make.defs @@ -0,0 +1,131 @@ +############################################################################ +# configs/lpc4357-evb/nsh/Make.defs +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +# Setup for the kind of memory that we are executing from + +ifeq ($(CONFIG_LPC43_BOOT_SRAM),y) + LDSCRIPT = ramconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_SPIFI),y) + LDSCRIPT = spificonfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHA),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_FLASHB),y) + LDSCRIPT = flashaconfig.ld +endif +ifeq ($(CONFIG_LPC43_BOOT_CS0FLASH),y) + LDSCRIPT = cs0flash.ld +endif + +# Setup for Windows vs Linux/Cygwin/OSX environments + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps.sh + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig new file mode 100644 index 0000000000..cb118243a4 --- /dev/null +++ b/configs/lpc4370-link2/nsh/defconfig @@ -0,0 +1,931 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +CONFIG_ARCH_STDARG_H=y + +# +# Debug Options +# +CONFIG_DEBUG=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_USB=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +CONFIG_ARCH_CHIP_LPC43XX=y +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="lpc43xx" +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARMV7M_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# LPC43xx Configuration Options +# +CONFIG_ARCH_CHIP_LPC4370FET100=y +CONFIG_ARCH_FAMILY_LPC4370=y +# CONFIG_LPC43_BOOT_SRAM is not set +CONFIG_LPC43_BOOT_SPIFI=y +# CONFIG_LPC43_BOOT_FLASHA is not set +# CONFIG_LPC43_BOOT_FLASHB is not set +# CONFIG_LPC43_BOOT_CS0FLASH is not set +# CONFIG_LPC43_BOOT_CS1FLASH is not set +# CONFIG_LPC43_BOOT_CS2FLASH is not set +# CONFIG_LPC43_BOOT_CS3FLASH is not set + +# +# LPC43xx Peripheral Support +# +# CONFIG_LPC43_ADC0 is not set +# CONFIG_LPC43_ADC1 is not set +# CONFIG_LPC43_ATIMER is not set +# CONFIG_LPC43_CAN1 is not set +# CONFIG_LPC43_CAN2 is not set +# CONFIG_LPC43_DAC is not set +# CONFIG_LPC43_EMC is not set +# CONFIG_LPC43_ETHERNET is not set +# CONFIG_LPC43_EVNTMNTR is not set +# CONFIG_LPC43_GPDMA is not set +CONFIG_LPC43_I2C0=y +# CONFIG_LPC43_I2C1 is not set +# CONFIG_LPC43_I2S0 is not set +# CONFIG_LPC43_I2S1 is not set +# CONFIG_LPC43_LCD is not set +# CONFIG_LPC43_MCPWM is not set +# CONFIG_LPC43_QEI is not set +# CONFIG_LPC43_RIT is not set +# CONFIG_LPC43_RTC is not set +# CONFIG_LPC43_SCT is not set +# CONFIG_LPC43_SDMMC is not set +# CONFIG_LPC43_SPI is not set +# CONFIG_LPC43_SPIFI is not set +# CONFIG_LPC43_SSP0 is not set +CONFIG_LPC43_SSP1=y +# CONFIG_LPC43_TMR0 is not set +# CONFIG_LPC43_TMR1 is not set +# CONFIG_LPC43_TMR2 is not set +# CONFIG_LPC43_TMR3 is not set +# CONFIG_LPC43_USART0 is not set +# CONFIG_LPC43_UART1 is not set +CONFIG_LPC43_USART2=y +# CONFIG_LPC43_USART3 is not set +CONFIG_LPC43_USB0=y +# CONFIG_LPC43_USB1 is not set +# CONFIG_LPC43_WWDT is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=18535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_SIZE=0x20000 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_LPC4370_LINK2=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="lpc4370-link2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=11 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 + +# +# Work Queue Support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +CONFIG_I2C=y +CONFIG_SPI=y +# CONFIG_I2S is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_TIMER is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_LCD is not set +# CONFIG_MMCSD is not set +# CONFIG_MTD is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +CONFIG_ARCH_HAVE_USART2=y +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +# CONFIG_ARCH_HAVE_USART6 is not set +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART2_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_SERIAL_TERMIOS is not set +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_USBDEV=y +# CONFIG_USBHOST is not set +# CONFIG_WIRELESS is not set + + +# +# I2C0 Configuration +# +CONFIG_I2C0_FREQ=100000 +CONFIG_I2C_TRANSFER=y + + +# +# USB Device Controller Driver Options +# +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=512 +CONFIG_CDCACM_TXBUFSIZE=2048 +CONFIG_CDCACM_VENDORID=0x03EB +CONFIG_CDCACM_PRODUCTID=0x2044 +CONFIG_CDCACM_VENDORSTR="nuttx" +CONFIG_CDCACM_PRODUCTSTR="lpc4370-link2" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# + +# +# Examples +# +CONFIG_EXAMPLES_CDCACM=y +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXFLAT is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# Network Utilities +# + +# +# Networking Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_NETLIB is not set +# CONFIG_NETUTILS_WEBCLIENT is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +CONFIG_LIB_BOARDCTL=y + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# + +# +# Custom Free Memory Command +# +# CONFIG_SYSTEM_FREE is not set + +# +# EMACS-like Command Line Editor +# +# CONFIG_SYSTEM_CLE is not set + +# +# FLASH Program Installation +# +# CONFIG_SYSTEM_INSTALL is not set + +# +# FLASH Erase-all Command +# + +# +# Intel HEX to binary conversion +# +# CONFIG_SYSTEM_HEX2BIN is not set + +# +# I2C tool +# + +# +# INI File Parser +# +# CONFIG_SYSTEM_INIFILE is not set + +# +# NxPlayer media player library / command Line +# + +# +# RAM test +# +# CONFIG_SYSTEM_RAMTEST is not set + +# +# readline() +# +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y + +# +# P-Code Support +# + +# +# PHY Tool +# + +# +# Power Off +# +# CONFIG_SYSTEM_POWEROFF is not set + +# +# RAMTRON +# +# CONFIG_SYSTEM_RAMTRON is not set + +# +# SD Card +# +# CONFIG_SYSTEM_SDCARD is not set + +# +# Sudoku +# +# CONFIG_SYSTEM_SUDOKU is not set + +# +# Sysinfo +# + +# +# VI Work-Alike Editor +# +# CONFIG_SYSTEM_VI is not set + +# +# Stack Monitor +# + +# +# USB CDC/ACM Device Commands +# + +# +# USB Composite Device Commands +# + +# +# USB Mass Storage Device Commands +# + +# +# USB Monitor +# + +# +# Zmodem Commands +# +# CONFIG_SYSTEM_ZMODEM is not set + + + +# extended debug options + +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_SYSTEM_I2CTOOL=y + +#i2c tool +CONFIG_I2CTOOL_MINBUS=0 +CONFIG_I2CTOOL_MAXBUS=1 +CONFIG_I2CTOOL_DEFFREQ=100000 diff --git a/configs/lpc4370-link2/nsh/setenv.sh b/configs/lpc4370-link2/nsh/setenv.sh new file mode 100644 index 0000000000..d6fe9c64b7 --- /dev/null +++ b/configs/lpc4370-link2/nsh/setenv.sh @@ -0,0 +1,92 @@ +#!/bin/bash +# configs/lpc4357-evb/nsh/setenv.sh +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Code Red +# toolchain under windows. You will have to edit this if you install the +# Code Red toolchain in any other location or if you install a different +# version +export TOOLCHAIN_BIN="/cygdrive/c/Users/Public/tools/bin" +#export SCRIPT_BIN="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" +export SCRIPT_BIN="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export SCRIPT_BIN= + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" +#export SCRIPT_BIN= + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" +#export SCRIPT_BIN= + +# And add the selected toolchain path[s] to the PATH variable + +export PATH="/sbin:/usr/sbin:${PATH_ORIG}" + +if [ ! -z ${SCRIPT_BIN} ]; then + export PATH="${SCRIPT_BIN}:${PATH}" +fi + +export PATH="${TOOLCHAIN_BIN}:${PATH}" +echo "PATH : ${PATH}" + +# Set an alias that can be used to put the LPC43xx in boot mode + +alias lpc43xx='${SCRIPT_BIN}/Scripts/bootLPCXpresso.cmd winusb' diff --git a/configs/lpc4370-link2/scripts/flash.bat b/configs/lpc4370-link2/scripts/flash.bat new file mode 100644 index 0000000000..e8055218f2 --- /dev/null +++ b/configs/lpc4370-link2/scripts/flash.bat @@ -0,0 +1,7 @@ +set LPCScrypt=C:\NXP\LPCScrypt\bin + +call %LPCScrypt%\..\scripts\boot_lpcscrypt.cmd + +%LPCScrypt%\lpcscrypt.exe erase SPIFI +%LPCScrypt%\lpcscrypt.exe program ..\..\..\nuttx.bin SPIFI + \ No newline at end of file diff --git a/configs/lpc4370-link2/scripts/flash.sh b/configs/lpc4370-link2/scripts/flash.sh new file mode 100644 index 0000000000..a239e9b5dc --- /dev/null +++ b/configs/lpc4370-link2/scripts/flash.sh @@ -0,0 +1,153 @@ +#!/bin/bash +#################################################################################### +# flash.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +#################################################################################### +set -x + +USAGE="$0 " + +# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6" +BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin" + +# RedSuite with LPC4330 support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 " +#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin" + +TARGET=LPC4330 + +echo "############################################################################" +echo "# Assumptions:" +echo "#" +echo "# - Windows 7" +echo "# - Binaries installed at ${BINDIR}" +echo "# - AXF image built with Code Red" +echo "# - ${TARGET}" +echo "#" +echo "# You will need to edit this is any of the above are false" +echo "#" +echo "############################################################################" +echo "" + +# This is the default install location for binaries on Windows (note that this +# path could change with the Code Red version number) + +if [ ! -d "${BINDIR}" ]; then + echo "Directory ${BINDIR} does not exist" + exit 1 +fi + +# This is the relative path to the booLPCXpresso utility. + +BOOTLPC="Scripts/bootLPCXpresso.cmd" +if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then + echo "No executable at ${BINDIR}/${BOOTLPC}" + exit 1 +fi + +# bootLPCXpresso arguments + +BOOTLPC_ARG=winusb # Win7 + +# Use the LPC18xx/LPC43xx flash utility + +FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts + +if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then + echo "No executable file at ${BINDIR}/${FLASHUTIL}" + exit 1 +fi + +# FLUSHUTIL arguements + +WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7) + +# The nuttx directory must be provided as an argument + +NUTTX=$1 +if [ -z "${NUTTX}" ]; then + echo "Missing argument" + echo $USAGE + exit 1 +fi + +if [ ! -d "${NUTTX}" ]; then + echo "Directory ${NUTTX} does not exist" + echo $USAGE + exit 1 +fi + +# The binary to download: + +if [ ! -f "${NUTTX}/nuttx.axf" ]; then + if [ -f "${NUTTX}/nuttx" ]; then + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +else + if [ -f "${NUTTX}/nuttx" ]; then + echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.." + echo " Deleting ${NUTTX}/nuttx.axf" + rm -f ${NUTTX}/nuttx.axf + echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf" + mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf + fi +fi +NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"` + +# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC} + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${BOOTLPC} ${BOOTLPC_ARG} || \ + { echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; } + +echo "" +echo "Wait a bit" +echo "5..." +sleep 1 +echo "4..." +sleep 1 +echo "3..." +sleep 1 +echo "2..." +sleep 1 +echo "1..." +sleep 1 +echo "0..." +echo "" + +# Then program the FLASH + +cd ${BINDIR} || \ + { echo "Failed to CD to ${BINDIR}"; exit 1; } +./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}" diff --git a/configs/lpc4370-link2/scripts/ramconfig.ld b/configs/lpc4370-link2/scripts/ramconfig.ld new file mode 100644 index 0000000000..4449dc1195 --- /dev/null +++ b/configs/lpc4370-link2/scripts/ramconfig.ld @@ -0,0 +1,150 @@ +/**************************************************************************** + * configs/lpc4370-link2/scripts/ramconfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * However, using JTAG the executable image can be also loaded directly into + * and executed from SRAM. + */ + +/* The LPC4330 on the LPC4330-Xplorer has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SRAM at 0x1000:0000, and + * 2. All .data and .bss will all fit into the 72KB SRAM block. + * + * NOTE: That initialized data is kept in the program memory SRAM and copied + * to .data SRAM. This is wasteful and unnecessary but provides a good test + * for future, FLASH-resident code. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K + datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4370-link2/scripts/spificonfig.ld b/configs/lpc4370-link2/scripts/spificonfig.ld new file mode 100644 index 0000000000..9cdbb2ba4f --- /dev/null +++ b/configs/lpc4370-link2/scripts/spificonfig.ld @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/lpc4370-link2/scripts/spificonfig.ld + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * Power-Up Reset Overview + * ----------------------- + * + * The ARM core starts executing code on reset with the program counter set + * to 0x0000 0000. The LPC43xx contains a shadow pointer register that + * allows areas of memory to be mapped to address 0x0000 0000. The default, + * reset value of the shadow pointer is 0x1040 0000 so that on reset code in + * the boot ROM is always executed first. + * + * The boot starts after reset is released. The IRC is selected as CPU clock + * and the Cortex-M4 starts the boot loader. By default the JTAG access to the + * chip is disabled at reset. The boot ROM determines the boot mode based on + * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part + * boots from internal flash by default. Otherwse, the boot ROM copies the + * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow + * pointer to 0x1000 0000, and jumps to that location. + * + * Of course, using JTAG the executable image can be also loaded directly + * into and executed from SRAM. + */ + +/* The LPC4370 on the LPC4370-Link2 has the following memory resources: + * + * 1. 4096Kb of SPIFI FLASH beginning at address 0x1400:0000 + * 2. 264KB of total SRAM: + * a. 128KB of SRAM in the CPU block beginning at address 0x1000:0000 + * b. 72KB beginning at address 0x1008:0000 and + * c. 64KB of AHB SRAM in three banks beginning at addresses 0x2000:0000, + * 0x2000:8000 and 0x2000:C000. + * 3. No internal FLASH + * + * Here we assume that: + * + * 1. We will be running out of SPIFI flash at 0x1400:0000, and + * 2. All .data and .bss will all fit into the 128KB CPU SRAM block. + */ + +MEMORY +{ + progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K + datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +ENTRY(__start) /* Treat __start as the anchor for dead code stripping */ +EXTERN(_vectors) /* Force the vectors to be included in the output */ +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > progmem + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > progmem + + .ARM.extab : { + *(.ARM.extab*) + } > progmem + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > progmem + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > datamem AT > progmem + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > datamem + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/lpc4370-link2/src/.gitignore b/configs/lpc4370-link2/src/.gitignore new file mode 100644 index 0000000000..726d936e1e --- /dev/null +++ b/configs/lpc4370-link2/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/lpc4370-link2/src/Makefile b/configs/lpc4370-link2/src/Makefile new file mode 100644 index 0000000000..76b7e5331e --- /dev/null +++ b/configs/lpc4370-link2/src/Makefile @@ -0,0 +1,77 @@ +############################################################################ +# configs/lpc4330-xplorer/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = lpc43_boot.c + +ifeq ($(CONFIG_NSH_ARCHINIT),y) +CSRCS += lpc43_nsh.c +endif + +ifeq ($(CONFIG_ARCH_FPU),y) +CSRCS += lpc43_ostest.c +endif + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += lpc43_autoleds.c +else +CSRCS += lpc43_userleds.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += lpc43_usbmsc.c +endif + +ifeq ($(CONFIG_SPIFI_LIBRARY),y) +CFLAGS += -DEUROBIRD +SPIFI_LIB = spifi_lib +CSRCS += $(SPIFI_LIB)/spifi_rom_api.c +#CSRCS += $(SPIFI_LIB)/amic.c +#CSRCS += $(SPIFI_LIB)/atmel.c +#CSRCS += $(SPIFI_LIB)/chi.c +#CSRCS += $(SPIFI_LIB)/eon.c +#CSRCS += $(SPIFI_LIB)/esmt.c +#CSRCS += $(SPIFI_LIB)/esmt.c +#CSRCS += $(SPIFI_LIB)/giga.c +#CSRCS += $(SPIFI_LIB)/macronix.c +#CSRCS += $(SPIFI_LIB)/numonyx.c +CSRCS += $(SPIFI_LIB)/spansion.c +#CSRCS += $(SPIFI_LIB)/sst.c +CSRCS += $(SPIFI_LIB)/winbond.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/lpc4370-link2/src/lpc4370-link2.h b/configs/lpc4370-link2/src/lpc4370-link2.h new file mode 100644 index 0000000000..3f752356da --- /dev/null +++ b/configs/lpc4370-link2/src/lpc4370-link2.h @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/lpc4370-LINK2/src/lpc4370-LINK2.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H +#define _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "lpc43_pinconfig.h" +#include "lpc43_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ +/* The LPC4370-LINK2 has one user-controllable LED labelled D6 controlled by + * the signal LED_3V3: + * + * ---- ------- ------------- + * LED SIGNAL MCU + * ---- ------- ------------- + * D6 LED_3V3 PE_7 GPIO0[8] + * ---- ------- ------------- + * + * A low output illuminates the LED. + * + * Definitions to configure LED pins as GPIOs: + * + * - Floating + * - Normal drive + * - No buffering, glitch filtering, slew=slow + */ + +#define PINCONFIG_LED PINCONF_GPIO0p8 + +/* Definitions to configure LED GPIO as outputs */ + +#define GPIO_LED (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN8) + +/* Button definitions *******************************************************/ +/* to be provided */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* _CONFIGS_LPC4370_LINK2_SRC_LPC3257_LINK2_H */ diff --git a/configs/lpc4370-link2/src/lpc43_autoleds.c b/configs/lpc4370-link2/src/lpc43_autoleds.c new file mode 100644 index 0000000000..365123a1d9 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_autoleds.c @@ -0,0 +1,176 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/lpc43_autoleds.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_led_initialize + ****************************************************************************/ + +void board_led_initialize(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("board_led_initialize() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("board_led_initialize() Exit"); +} + +/**************************************************************************** + * Name: board_led_on + ****************************************************************************/ + +void board_led_on(int led) +{ + bool ledon = true; /* OFF. Low illuminates */ + + switch (led) + { + default: + case 0: + break; /* LED OFF until state 1 */ + + case 2: + return; /* LED no change */ + + case 1: + case 3: + ledon = false; /* LED ON. Low illuminates */ + break; + } + + /* Turn LED on or off, depending on state */ + + lpc43_gpio_write(GPIO_LED, ledon); +} + +/**************************************************************************** + * Name: board_led_off + ****************************************************************************/ + +void board_led_off(int led) +{ + switch (led) + { + default: + case 0: + case 1: + case 3: + break; /* LED OFF */ + + case 2: + return; /* LED no change */ + } + + /* LED OFF, Low illuminates */ + + lpc43_gpio_write(GPIO_LED, true); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/lpc4370-link2/src/lpc43_boot.c b/configs/lpc4370-link2/src/lpc43_boot.c new file mode 100644 index 0000000000..579e31c952 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_boot.c @@ -0,0 +1,81 @@ +/************************************************************************************ + * configs/lpc4357-evb/src/lpc43_boot.c + * + * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lpc43_boardinitialize + * + * Description: + * All LPC43xx architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lpc43_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_led_initialize(); +#endif +} diff --git a/configs/lpc4370-link2/src/lpc43_nsh.c b/configs/lpc4370-link2/src/lpc43_nsh.c new file mode 100644 index 0000000000..dbb0873da9 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_nsh.c @@ -0,0 +1,149 @@ +/**************************************************************************** + * config/lpc4357-evb/src/lpc43_nsh.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" + +#ifdef CONFIG_LPC43_SPIFI +# include +# include "lpc43_spifi.h" + +# ifdef CONFIG_SPFI_NXFFS +# include +# include +# endif +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifndef CONFIG_SPIFI_DEVNO +# define CONFIG_SPIFI_DEVNO 0 +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nsh_spifi_initialize + * + * Description: + * Make the SPIFI (or part of it) into a block driver that can hold a + * file system. + * + ****************************************************************************/ + +#ifdef CONFIG_LPC43_SPIFI +static int nsh_spifi_initialize(void) +{ + FAR struct mtd_dev_s *mtd; + int ret; + + /* Initialize the SPIFI interface and create the MTD driver instance */ + + mtd = lpc43_spifi_initialize(); + if (!mtd) + { + fdbg("ERROR: lpc43_spifi_initialize failed\n"); + return -ENODEV; + } + +#ifndef CONFIG_SPFI_NXFFS + /* And finally, use the FTL layer to wrap the MTD driver as a block driver */ + + ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd); + if (ret < 0) + { + fdbg("ERROR: Initializing the FTL layer: %d\n", ret); + return ret; + } +#else + /* Initialize to provide NXFFS on the MTD interface */ + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + fdbg("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; + } + + /* Mount the file system at /mnt/spifi */ + + ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL); + if (ret < 0) + { + fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; + } +#endif + + return OK; +} +#else +# define nsh_spifi_initialize() (OK) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + ****************************************************************************/ + +int board_app_initialize(void) +{ + /* Initialize the SPIFI block device */ + + return nsh_spifi_initialize(); +} diff --git a/configs/lpc4370-link2/src/lpc43_ostest.c b/configs/lpc4370-link2/src/lpc43_ostest.c new file mode 100644 index 0000000000..5ee0ed2f56 --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_ostest.c @@ -0,0 +1,113 @@ +/************************************************************************************ + * configs/lpc4357-evb/src/lpc43_ostest.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "lpc4370-link2.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && \ + defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_DISABLE_SIGNALS) && \ + !defined(CONFIG_ARMV7M_CMNVECTOR) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = irqsave(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + irqrestore(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/configs/lpc4370-link2/src/lpc43_userleds.c b/configs/lpc4370-link2/src/lpc43_userleds.c new file mode 100644 index 0000000000..142f1d28cf --- /dev/null +++ b/configs/lpc4370-link2/src/lpc43_userleds.c @@ -0,0 +1,147 @@ +/**************************************************************************** + * configs/lpc4357-evb/src/lpc43_userleds.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "lpc4370-link2.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* LED definitions **********************************************************/ + + +/* Debug definitions ********************************************************/ +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define LED_VERBOSE 1 +# define ledvdbg lldbg +# else +# undef LED_VERBOSE +# define ledvdbg(x...) +# endif +#else +# undef LED_VERBOSE +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_dumppins + ****************************************************************************/ + +#ifdef LED_VERBOSE +static void led_dumppins(FAR const char *msg) +{ + lpc43_pin_dump(PINCONFIG_LED, msg); + lpc43_gpio_dump(GPIO_LED, msg); +} +#else +# define led_dumppins(m) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_ledinit + ****************************************************************************/ + +void lpc43_ledinit(void) +{ + /* Configure LED pin as a GPIO outputs */ + + led_dumppins("lpc43_ledinit() Entry)"); + + /* Configure LED pin as a GPIO, then configure GPIO as an outputs */ + + lpc43_pin_config(PINCONFIG_LED); + lpc43_gpio_config(GPIO_LED); + + led_dumppins("lpc43_ledinit() Exit"); +} + +/**************************************************************************** + * Name: lpc43_setled + ****************************************************************************/ + +void lpc43_setled(int led, bool ledon) +{ + if (led == BOARD_LED) + { + lpc43_gpio_write(GPIO_LED, !ledon); + } +} + +/**************************************************************************** + * Name: lpc43_setleds + ****************************************************************************/ + +void lpc43_setleds(uint8_t ledset) +{ + lpc43_gpio_write(GPIO_LED, (ledset & BOARD_LED_BIT) == 0); +} + +#endif /* !CONFIG_ARCH_LEDS */