Update README
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@ -172,6 +172,9 @@ Serial Console
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UART0 is, by default, the serial console. It connects to the on-board
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UART0 is, by default, the serial console. It connects to the on-board
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CP2102 converter and is available on the USB connector USB CON8 (J1).
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CP2102 converter and is available on the USB connector USB CON8 (J1).
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It will show up as /dev/ttypUSB[n] where [n] will probably be 0 (is it 1
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on my PC because I have a another device at ttyUSB0).
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Buttons and LEDs
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Buttons and LEDs
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================
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================
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@ -223,7 +226,8 @@ SMP
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3. Assertions. On a fatal assertions, other CPUs need to be stopped.
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3. Assertions. On a fatal assertions, other CPUs need to be stopped.
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OpenOCD for the ESP32
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for the ESP32
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=====================
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=====================
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First you in need some debug environment which would be a JTAG emulator
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First you in need some debug environment which would be a JTAG emulator
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@ -506,6 +510,56 @@ OpenOCD for the ESP32
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would I be able to run directly out of IRAM without a bootloader? That
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would I be able to run directly out of IRAM without a bootloader? That
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might be a simpler bring-up.
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might be a simpler bring-up.
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Sample Debug Steps
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------------------
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I did the initial bring-up using the IRAM configuration and OpenOCD. Here
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is a synopsis of my debug steps:
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configs/esp32-core/nsh with
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CONFIG_DEBUG_ASSERTIONS=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_ESP32CORE_RUN_IRAM=y
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I also made this change which will eliminate all attempts to re-configure serial. It will just use the serial settings as they were left by the bootloader:
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diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
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index 422ec0b..8707d7c 100644
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--- a/arch/xtensa/src/common/xtensa.h
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+++ b/arch/xtensa/src/common/xtensa.h
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@@ -60,7 +60,7 @@
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#undef CONFIG_SUPPRESS_INTERRUPTS /* DEFINED: Do not enable interrupts */
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#undef CONFIG_SUPPRESS_TIMER_INTS /* DEFINED: No timer */
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#undef CONFIG_SUPPRESS_SERIAL_INTS /* DEFINED: Console will poll */
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-#undef CONFIG_SUPPRESS_UART_CONFIG /* DEFINED: Do not reconfigure UART */
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+#define CONFIG_SUPPRESS_UART_CONFIG 1 /* DEFINED: Do not reconfigure UART */
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#define CONFIG_SUPPRESS_CLOCK_CONFIG 1 /* DEFINED: Do not reconfigure clocking */
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#undef CONFIG_DUMP_ON_EXIT /* DEFINED: Dump task state on exit */
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Start OpenOCD:
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cd ../openocde-esp32
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cp ../nuttx/configs/esp32-core/scripts/esp32.cfg .
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sudo ./src/openocd -s ./tcl/ -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./esp32.cfg
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Start GDB and load code:
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cd ../nuttx
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xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' nuttx
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(gdb) load nuttx
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(gdb) mon reg pc [value report by load for entry point]
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(gdb) s
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Single stepping works fine for me as do breakpoints. I get quite a way through initialization, into os_start() and into up_initialize(), and through up_irqinitialize() but it fails in xtensa_timer_initialize() immediatly upon enabling interrupts:
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Breakpoint 1, xtensa_timer_initialize () at chip/esp32_timerisr.c:172
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72 {
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(gdb) n
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esp32.cpu0: Target halted, pc=0x400835BF
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187 g_tick_divisor = divisor;
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(gdb) ...
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Configurations
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Configurations
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==============
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==============
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