diff --git a/arch/arm/src/stm32/stm32_pwr.c b/arch/arm/src/stm32/stm32_pwr.c
index 8fb749f767..7973f2494d 100644
--- a/arch/arm/src/stm32/stm32_pwr.c
+++ b/arch/arm/src/stm32/stm32_pwr.c
@@ -83,9 +83,9 @@ static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint1
  *   Enables access to the backup domain (RTC registers, RTC backup data registers
  *   and backup SRAM).
  *
- *   NOTE: Reference counting is used in order to supported nested calles to this
+ *   NOTE: Reference counting is used in order to supported nested calls to this
  *   function.  As a consequence, every call to stm32_pwr_enablebkp(true) must
- *   be followed by a call to stm32_pwr_enablebkp(false).
+ *   be followed by a matching call to stm32_pwr_enablebkp(false).
  *
  * Input Parameters:
  *   writable - True: enable ability to write to backup domain registers
@@ -97,7 +97,7 @@ static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint1
 
 void stm32_pwr_enablebkp(bool writable)
 {
-  static uint32_t writable_counter = 0;
+  static uint16_t writable_counter = 0;
   irqstate_t flags;
   uint16_t regval;
   bool waswritable;
@@ -112,6 +112,7 @@ void stm32_pwr_enablebkp(bool writable)
 
   if (writable)
     {
+      DEBUGASSERT(writable_counter < UINT16_MAX);
       writable_counter++;
     }
   else if (writable_counter > 0)