diff --git a/arch/arm/src/a1x/Make.defs b/arch/arm/src/a1x/Make.defs index d7d5dfbc45..939ab357df 100644 --- a/arch/arm/src/a1x/Make.defs +++ b/arch/arm/src/a1x/Make.defs @@ -87,7 +87,7 @@ CMN_CSRCS += arm_va2pte.c endif ifeq ($(CONFIG_BUILD_KERNEL),y) -CMN_CSRCS += up_task_start.c up_pthread_start.c up_signal_dispatch.c +CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c endif ifeq ($(CONFIG_ARCH_ADDRENV),y) @@ -100,6 +100,10 @@ CMN_CSRCS += arm_addrenv_kstack.c endif endif +ifeq ($(CONFIG_MM_PGALLOC),y) +CMN_CSRCS += arm_physpgaddr.c +endif + ifeq ($(CONFIG_ELF),y) CMN_CSRCS += arm_elf.c arm_coherent_dcache.c endif diff --git a/arch/arm/src/armv7-a/arm_physpgaddr.c b/arch/arm/src/armv7-a/arm_physpgaddr.c new file mode 100644 index 0000000000..d3fecd1fc1 --- /dev/null +++ b/arch/arm/src/armv7-a/arm_physpgaddr.c @@ -0,0 +1,159 @@ +/**************************************************************************** + * arch/arm/src/armv7-a/arm_phypgaddr.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "mmu.h" +#include "cache.h" + +#include "pgalloc.h" + +#ifdef CONFIG_MM_PGALLOC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_physpgaddr + * + * Description: + * Check if the virtual address lies in the user data area and, if so + * get the mapping to the physical address in the page pool. + * + ****************************************************************************/ + +uintptr_t arm_physpgaddr(uintptr_t vaddr) +{ + FAR uint32_t *l2table; + uintptr_t paddr; + uint32_t l1entry; +#ifndef CONFIG_ARCH_PGPOOL_MAPPING + uint32_t l1save; +#endif + int index; + + /* Check if this address is within the range of one of the virtualized user + * address regions. + */ + + if (arm_uservaddr(vaddr)) + { + /* Yes.. Get Level 1 page table entry corresponding to this virtual + * address. + */ + + l1entry = mmu_l1_getentry(vaddr); + if ((l1entry & PMD_TYPE_MASK) == PMD_TYPE_PTE) + { + /* Get the physical address of the level 2 page table from the + * level 1 page table entry. + */ + + paddr = ((uintptr_t)l1entry & PMD_PTE_PADDR_MASK); + +#ifdef CONFIG_ARCH_PGPOOL_MAPPING + /* Get the virtual address of the base of level 2 page table */ + + l2table = (FAR uint32_t *)arm_pgvaddr(paddr); +#else + /* Temporarily map the page into the virtual address space */ + + l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE); + mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS); + l2table = (FAR uint32_t *)(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK)); +#endif + if (l2table) + { + /* Invalidate D-Cache line containing this virtual address so that + * we re-read from physical memory + */ + + index = (vaddr & SECTION_MASK) >> MM_PGSHIFT; + arch_invalidate_dcache((uintptr_t)&l2table[index], + (uintptr_t)&l2table[index] + sizeof(uint32_t)); + + /* Get the Level 2 page table entry corresponding to this virtual + * address. Extract the physical address of the page containing + * the mapping of the virtual address. + */ + + paddr = ((uintptr_t)l2table[index] & PTE_SMALL_PADDR_MASK); + +#ifndef CONFIG_ARCH_PGPOOL_MAPPING + /* Restore the scratch section L1 page table entry */ + + mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); +#endif + + /* Add the correct offset and return the physical address + * corresponding to the virtual address. + */ + + return paddr + (vaddr & MM_PGMASK); + } + } + } + + /* No mapping available */ + + return 0; +} + +#endif /* CONFIG_MM_PGALLOC */ diff --git a/arch/arm/src/armv7-a/pgalloc.h b/arch/arm/src/armv7-a/pgalloc.h new file mode 100644 index 0000000000..ee39f100f5 --- /dev/null +++ b/arch/arm/src/armv7-a/pgalloc.h @@ -0,0 +1,158 @@ +/**************************************************************************** + * arch/arm/src/armv7-a/pgalloc.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_ARMV7_A_PGALLOC_H +#define __ARCH_ARM_SRC_ARMV7_A_PGALLOC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "mmu.h" + +#ifdef CONFIG_MM_PGALLOC + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_pgmap + * + * Description: + * Map one page to a temporary, scratch virtual memory address + * + ****************************************************************************/ + +#if !defined(CONFIG_ARCH_PGPOOL_MAPPING) && defined(CONFIG_ARCH_USE_MMU) +static inline uintptr_t arm_tmpmap(uintptr_t paddr, FAR uint32_t *l1save) +{ + *l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE); + mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS); + return ((uintptr_t)ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK)); +} +#endif + +/**************************************************************************** + * Name: arm_pgrestore + * + * Description: + * Restore any previous L1 page table mapping that was in place when + * arm_tmpmap() was called + * + ****************************************************************************/ + +#if !defined(CONFIG_ARCH_PGPOOL_MAPPING) && defined(CONFIG_ARCH_USE_MMU) +static inline void arm_tmprestore(uint32_t l1save) +{ + mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save); +} +#endif + +/**************************************************************************** + * Name: arm_pgvaddr + * + * Description: + * If the page memory pool is statically mapped, then we do not have to + * go through the the temporary mapping. We simply have to perform a + * physical to virtual memory address mapping. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_PGPOOL_MAPPING +static inline uintptr_t arm_pgvaddr(uintptr_t paddr) +{ + DEBUGASSERT(paddr >= CONFIG_ARCH_PGPOOL_PBASE && + paddr < CONFIG_ARCH_PGPOOL_PEND); + + return paddr - CONFIG_ARCH_PGPOOL_PBASE + CONFIG_ARCH_PGPOOL_VBASE; +} +#endif + +/**************************************************************************** + * Name: arm_uservaddr + * + * Description: + * Return true if the virtual address, vaddr, lies in the user address + * space. + * + ****************************************************************************/ + +static inline bool arm_uservaddr(uintptr_t vaddr) +{ + /* Check if this address is within the range of the virtualized .bss/.data, + * heap, or stack regions. + */ + + return ((vaddr >= CONFIG_ARCH_TEXT_VBASE && vaddr < ARCH_TEXT_VEND) || + (vaddr >= CONFIG_ARCH_DATA_VBASE && vaddr < ARCH_DATA_VEND) || + (vaddr >= CONFIG_ARCH_HEAP_VBASE && vaddr < ARCH_HEAP_VEND) +#ifdef CONFIG_ARCH_STACK_DYNAMIC + || (vaddr >= CONFIG_ARCH_STACK_VBASE && vaddr < ARCH_STACK_VEND) +#endif + ); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_physpgaddr + * + * Description: + * Check if the virtual address lies in the user data area and, if so + * get the mapping to the physical address in the page pool. + * + ****************************************************************************/ + +uintptr_t arm_physpgaddr(uintptr_t vaddr); + +#endif /* CONFIG_MM_PGALLOC */ +#endif /* __ARCH_ARM_SRC_ARMV7_A_PGALLOC_H */ diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs index 748ebf9870..6feae083d2 100644 --- a/arch/arm/src/sama5/Make.defs +++ b/arch/arm/src/sama5/Make.defs @@ -89,7 +89,7 @@ CMN_CSRCS += arm_va2pte.c endif ifeq ($(CONFIG_BUILD_KERNEL),y) -CMN_CSRCS += up_task_start.c up_pthread_start.c up_signal_dispatch.c +CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c endif ifeq ($(CONFIG_ARCH_ADDRENV),y) @@ -102,6 +102,10 @@ CMN_CSRCS += arm_addrenv_kstack.c endif endif +ifeq ($(CONFIG_MM_PGALLOC),y) +CMN_CSRCS += arm_physpgaddr.c +endif + ifeq ($(CONFIG_ELF),y) CMN_CSRCS += arm_elf.c arm_coherent_dcache.c endif diff --git a/arch/arm/src/sama5/sam_pgalloc.c b/arch/arm/src/sama5/sam_pgalloc.c index b3f5c5f87b..a90582cb36 100644 --- a/arch/arm/src/sama5/sam_pgalloc.c +++ b/arch/arm/src/sama5/sam_pgalloc.c @@ -115,81 +115,6 @@ void up_allocate_pgheap(FAR void **heap_start, size_t *heap_size) *heap_size = CONFIG_SAMA5_DDRCS_PGHEAP_SIZE; } -/**************************************************************************** - * Name: sam_physpgaddr - * - * Description: - * Check if the virtual address lies in the user data area and, if so - * get the mapping to the physical address in the page pool. - * - ****************************************************************************/ - -uintptr_t sam_physpgaddr(uintptr_t vaddr) -{ - FAR uint32_t *l2table; - uint32_t l1entry; - uintptr_t paddr; - int index; - - /* Check if this address is within the range of the virtualized .bss/.data, - * heap, or stack regions. - */ - - if ((vaddr >= CONFIG_ARCH_TEXT_VBASE && vaddr < ARCH_TEXT_VEND) || - (vaddr >= CONFIG_ARCH_DATA_VBASE && vaddr < ARCH_DATA_VEND) || - (vaddr >= CONFIG_ARCH_HEAP_VBASE && vaddr < ARCH_HEAP_VEND) -#ifdef CONFIG_ARCH_STACK_DYNAMIC - || (vaddr >= CONFIG_ARCH_STACK_VBASE && vaddr < ARCH_STACK_VEND) -#endif - ) - { - /* Yes.. Get Level 1 page table entry corresponding to this virtual - * address. - */ - - l1entry = mmu_l1_getentry(vaddr); - if ((l1entry & PMD_TYPE_MASK) == PMD_TYPE_PTE) - { - /* Get the physical address of the level 2 page table from level 1 - * page table entry. - */ - - paddr = ((uintptr_t)l1entry & PMD_PTE_PADDR_MASK); - - /* Extract the virtual address of the base of level 2 page table */ - - l2table = (FAR uint32_t *)sam_virtpgaddr(paddr); - if (l2table) - { - /* Invalidate D-Cache line containing this virtual address so that - * we re-read from physical memory - */ - - index = (vaddr & SECTION_MASK) >> MM_PGSHIFT; - arch_invalidate_dcache((uintptr_t)&l2table[index], - (uintptr_t)&l2table[index] + sizeof(uint32_t)); - - /* Get the Level 2 page table entry corresponding to this virtual - * address. Extract the physical address of the page containing - * the mapping of the virtual address. - */ - - paddr = ((uintptr_t)l2table[index] & PTE_SMALL_PADDR_MASK); - - /* Add the correct offset and return the physical address - * corresponding to the virtual address. - */ - - return paddr + (vaddr & MM_PGMASK); - } - } - } - - /* No mapping available */ - - return 0; -} - /**************************************************************************** * Name: sam_virtpgaddr * diff --git a/arch/arm/src/sama5/sam_pgalloc.h b/arch/arm/src/sama5/sam_pgalloc.h index 5d43568eb9..b79ba1a854 100644 --- a/arch/arm/src/sama5/sam_pgalloc.h +++ b/arch/arm/src/sama5/sam_pgalloc.h @@ -43,6 +43,8 @@ #include #include +#include "pgalloc.h" + #ifdef CONFIG_MM_PGALLOC /**************************************************************************** @@ -75,7 +77,7 @@ extern "C" * ****************************************************************************/ -uintptr_t sam_physpgaddr(uintptr_t vaddr); +#define sam_physpgaddr(vaddr) arm_physpgaddr(vaddr) /**************************************************************************** * Name: sam_virtpgaddr