arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c: Fix some errors I made in reviewing last patch
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@ -693,7 +693,7 @@ int tiva_gpioirqattach(pinconfig_t pinconfig, xcpt_t isr, void *arg)
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void tiva_gpioirqenable(pinconfig_t pinconfig)
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{
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uint8_t port = (pinconfig & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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uint8_t pin = 1 << (pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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uint8_t pin = 1 << ((pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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uintptr_t base = tiva_gpiobaseaddress(port);
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/* Enable the GPIO interrupt. "The GPIO IM register is the interrupt
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@ -717,7 +717,7 @@ void tiva_gpioirqenable(pinconfig_t pinconfig)
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void tiva_gpioirqdisable(pinconfig_t pinconfig)
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{
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uint8_t port = (pinconfig & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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uint8_t pin = 1 << (pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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uint8_t pin = 1 << ((pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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uintptr_t base = tiva_gpiobaseaddress(port);
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/* Disable the GPIO interrupt. "The GPIO IM register is the interrupt
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@ -741,7 +741,7 @@ void tiva_gpioirqdisable(pinconfig_t pinconfig)
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void tiva_gpioirqclear(pinconfig_t pinconfig)
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{
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uint8_t port = (pinconfig & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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uint8_t pin = 1 << (pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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uint8_t pin = 1 << ((pinconfig & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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uintptr_t base = tiva_gpiobaseaddress(port);
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/* "The GPIOICR register is the interrupt clear register. Writing a 1 to a bit
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