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Remove CONFIG_SPI_OWNBUS: Now it is not just a good idea, it is the law

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This commit is contained in:
Gregory Nutt 2016-01-23 18:10:21 -06:00
parent 00aaceaf2f
commit b7cbbab761
23 changed files with 33 additions and 584 deletions
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9
arch/arm/src/calypso/calypso_spi.c
View File

@ -60,20 +60,15 @@ struct calypso_spidev_s
{
struct spi_dev_s spidev; /* External driver interface */
int nbits; /* Number of transfered bits */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Mutual exclusion of devices */
#endif
};
/* STUBS! */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
return -ENOSYS;
}
#endif
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected)
@ -117,9 +112,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -129,7 +122,7 @@ static const struct spi_ops_s g_spiops =
#endif
.status = 0,
#ifdef CONFIG_SPI_CMDDATA
.cmddata = ,
.cmddata = 0,
#endif
.send = spi_send,
#ifdef CONFIG_SPI_EXCHANGE

23
arch/arm/src/efm32/efm32_spi.c
View File

@ -152,13 +152,10 @@ struct efm32_spidev_s
sem_t txdmasem; /* Wait for TX DMA to complete */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Supports mutually exclusive access */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
uint8_t nbits; /* Width of word in bits (4-16) */
bool lsbfirst; /* True: Bit order is LSB first */
bool initialized; /* True: Already initialized */
@ -200,9 +197,7 @@ static inline void spi_dmatxstart(FAR struct efm32_spidev_s *priv);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock);
#endif
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev,
@ -236,9 +231,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv);
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -761,7 +754,6 @@ static inline void spi_dmatxstart(FAR struct efm32_spidev_s *priv)
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct efm32_spidev_s *priv = (struct efm32_spidev_s *)dev;
@ -786,7 +778,6 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_select
@ -846,7 +837,6 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Has the frequency changed? */
#ifndef CONFIG_SPI_OWNBUS
if (frequency == priv->frequency)
{
/* No... just return the actual frequency from the last calcualtion */
@ -854,7 +844,6 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
actual = priv->actual;
}
else
#endif
{
/* We want to use integer division to avoid forcing in float division
* utils, and yet keep rounding effect errors to a minimum.
@ -909,14 +898,12 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
actual = (BOARD_HFPERCLK_FREQUENCY << 7) / (256 + clkdiv);
spivdbg("frequency=%u actual=%u\n", frequency, actual);
#ifndef CONFIG_SPI_OWNBUS
/* Save the frequency selection so that subsequent reconfigurations
* will be faster.
*/
priv->frequency = frequency;
priv->actual = actual;
#endif
}
return actual;
@ -951,10 +938,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
setting = 0;
switch (mode)
{
@ -983,12 +968,10 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
regval |= setting;
spi_putreg(config, EFM32_USART_CTRL_OFFSET, regval);
#ifndef CONFIG_SPI_OWNBUS
/* Save the mode so that subsequent re-configurations will be faster */
priv->mode = mode;
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -1585,10 +1568,8 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
regval |= USART_FRAME_DATABITS_EIGHT | USART_CTRL_MSBF;
spi_putreg(config, EFM32_USART_CTRL_OFFSET, regval);
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->mode = SPIDEV_MODE0;
#endif
priv->nbits = 8;
priv->lsbfirst = false;
@ -1602,9 +1583,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
#ifdef CONFIG_EFM32_SPI_DMA
/* Allocate two DMA channels... one for the RX and one for the TX side of

6
arch/arm/src/imx/imx_spi.c
View File

@ -166,9 +166,7 @@ static int spi_interrupt(int irq, void *context);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -189,9 +187,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = imx_spiselect, /* Provided externally by board logic */
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -704,14 +700,12 @@ static int spi_interrupt(int irq, void *context)
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
/* Not implemented */
return -ENOSYS;
}
#endif
/****************************************************************************
* Name: spi_setfrequency

22
arch/arm/src/kl/kl_spi.c
View File

@ -90,13 +90,11 @@ struct kl_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t spibase; /* Base address of SPI registers */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/************************************************************************************
@ -111,9 +109,7 @@ static inline void spi_putreg(FAR struct kl_spidev_s *priv, uint8_t offset,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -134,9 +130,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
#ifdef CONFIG_KL_SPI0
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = kl_spi0select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -168,9 +162,7 @@ static struct kl_spidev_s g_spi0dev =
#ifdef CONFIG_KL_SPI1
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = kl_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -263,7 +255,6 @@ static inline void spi_putreg(FAR struct kl_spidev_s *priv, uint8_t offset,
*
************************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct kl_spidev_s *priv = (FAR struct kl_spidev_s *)dev;
@ -287,7 +278,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/************************************************************************************
* Name: spi_setfrequency
@ -314,14 +304,12 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequence is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* The clock source for the SPI baud rate generator is the bus clock. We
* need to pick a prescaler value 1, 2, 3, 4, 5, 6, 7, or 8 and then a
@ -373,10 +361,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -406,10 +392,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set C1 appropriately */
regval = spi_getreg(priv, KL_SPI_C1_OFFSET);
@ -441,10 +425,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/************************************************************************************
@ -721,10 +703,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -732,9 +712,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
return &priv->spidev;
}

26
arch/arm/src/lpc11xx/lpc11_spi.c
View File

@ -115,13 +115,11 @@
struct lpc11_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -130,9 +128,7 @@ struct lpc11_spidev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev,
@ -150,9 +146,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = lpc11_spiselect,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -208,7 +202,6 @@ static struct lpc11_spidev_s g_spidev =
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc11_spidev_s *priv = (FAR struct lpc11_spidev_s *)dev;
@ -232,7 +225,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -259,14 +251,13 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
/* Check if the requested frequence is the same as the frequency selection */
DEBUGASSERT(priv && frequency <= SPI_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* frequency = SPI_CLOCK / divisor, or divisor = SPI_CLOCK / frequency */
@ -297,10 +288,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -328,10 +317,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC11_SPI_CR);
@ -363,10 +350,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -392,10 +377,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 7 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC11_SPI_CR);
@ -406,10 +390,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -606,11 +588,9 @@ FAR struct spi_dev_s *lpc11_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -618,9 +598,7 @@ FAR struct spi_dev_s *lpc11_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
return &priv->spidev;
}

30
arch/arm/src/lpc11xx/lpc11_ssp.c
View File

@ -134,13 +134,11 @@ struct lpc11_sspdev_s
#ifdef CONFIG_LPC11_SSP_INTERRUPTS
uint8_t sspirq; /* SPI IRQ number */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -156,9 +154,7 @@ static inline void ssp_putreg(FAR struct lpc11_sspdev_s *priv,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev,
uint32_t frequency);
static void ssp_setmode(FAR struct spi_dev_s *dev,
@ -186,9 +182,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp1initialize(void);
#ifdef CONFIG_LPC11_SSP0
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc11_ssp0select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -223,9 +217,7 @@ static struct lpc11_sspdev_s g_ssp0dev =
#ifdef CONFIG_LPC11_SSP1
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc11_ssp1select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -257,9 +249,7 @@ static struct lpc11_sspdev_s g_ssp1dev =
#ifdef CONFIG_LPC11_SSP2
static const struct spi_ops_s g_spi2ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc11_ssp2select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -360,7 +350,6 @@ static inline void ssp_putreg(FAR struct lpc11_sspdev_s *priv,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc11_sspdev_s *priv = (FAR struct lpc11_sspdev_s *)dev;
@ -384,7 +373,6 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: ssp_setfrequency
@ -412,14 +400,13 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
DEBUGASSERT(priv && frequency <= SSP_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* The SSP bit frequency is given by:
*
@ -483,10 +470,8 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
sspdbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -514,10 +499,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR0 appropriately */
regval = ssp_getreg(priv, LPC11_SSP_CR0_OFFSET);
@ -550,10 +533,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -579,10 +560,9 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 3 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR1 appropriately */
regval = ssp_getreg(priv, LPC11_SSP_CR0_OFFSET);
@ -592,10 +572,8 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -1024,11 +1002,9 @@ FAR struct spi_dev_s *lpc11_sspinitialize(int port)
/* Set the initial SSP configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -1036,9 +1012,7 @@ FAR struct spi_dev_s *lpc11_sspinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Enable the SPI */

26
arch/arm/src/lpc17xx/lpc17_spi.c
View File

@ -115,13 +115,11 @@
struct lpc17_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -130,9 +128,7 @@ struct lpc17_spidev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -146,9 +142,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = lpc17_spiselect,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -204,7 +198,6 @@ static struct lpc17_spidev_s g_spidev =
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc17_spidev_s *priv = (FAR struct lpc17_spidev_s *)dev;
@ -228,7 +221,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -254,14 +246,13 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequence is the same as the frequency selection */
DEBUGASSERT(priv && frequency <= SPI_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* frequency = SPI_CLOCK / divisor, or divisor = SPI_CLOCK / frequency */
@ -292,10 +283,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -323,10 +312,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC17_SPI_CR);
@ -358,10 +345,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -387,10 +372,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 7 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC17_SPI_CR);
@ -401,10 +385,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -597,11 +579,9 @@ FAR struct spi_dev_s *lpc17_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -609,9 +589,7 @@ FAR struct spi_dev_s *lpc17_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
return &priv->spidev;
}

30
arch/arm/src/lpc17xx/lpc17_ssp.c
View File

@ -134,13 +134,11 @@ struct lpc17_sspdev_s
#ifdef CONFIG_LPC17_SSP_INTERRUPTS
uint8_t sspirq; /* SPI IRQ number */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -155,9 +153,7 @@ static inline void ssp_putreg(FAR struct lpc17_sspdev_s *priv, uint8_t offset,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -184,9 +180,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp2initialize(void);
#ifdef CONFIG_LPC17_SSP0
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc17_ssp0select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -221,9 +215,7 @@ static struct lpc17_sspdev_s g_ssp0dev =
#ifdef CONFIG_LPC17_SSP1
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc17_ssp1select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -255,9 +247,7 @@ static struct lpc17_sspdev_s g_ssp1dev =
#ifdef CONFIG_LPC17_SSP2
static const struct spi_ops_s g_spi2ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc17_ssp2select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -356,7 +346,6 @@ static inline void ssp_putreg(FAR struct lpc17_sspdev_s *priv, uint8_t offset, u
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc17_sspdev_s *priv = (FAR struct lpc17_sspdev_s *)dev;
@ -380,7 +369,6 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: ssp_setfrequency
@ -408,14 +396,13 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
DEBUGASSERT(priv && frequency <= SSP_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* The SSP bit frequency is given by:
*
@ -479,10 +466,8 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
sspdbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -510,10 +495,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR0 appropriately */
regval = ssp_getreg(priv, LPC17_SSP_CR0_OFFSET);
@ -546,10 +529,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -575,10 +556,9 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 3 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR1 appropriately */
regval = ssp_getreg(priv, LPC17_SSP_CR0_OFFSET);
@ -588,10 +568,8 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -1013,11 +991,9 @@ FAR struct spi_dev_s *lpc17_sspinitialize(int port)
/* Set the initial SSP configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -1025,9 +1001,7 @@ FAR struct spi_dev_s *lpc17_sspinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Enable the SPI */

36
arch/arm/src/lpc2378/lpc23xx_spi.c
View File

@ -117,13 +117,11 @@
struct lpc23xx_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -132,9 +130,7 @@ struct lpc23xx_spidev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -148,9 +144,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = lpc23xx_spiselect, /* Provided externally */
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -206,7 +200,6 @@ static struct lpc23xx_spidev_s g_spidev =
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
@ -231,7 +224,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -250,25 +242,21 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
{
#ifndef CONFIG_SPI_OWNBUS
FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
#endif
uint32_t divisor;
uint32_t actual;
DEBUGASSERT(frequency <= SPI_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
/* Check if the requested frequency is the same as the frequency selection */
DEBUGASSERT(priv);
DEBUGASSERT(priv != NULL);
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* frequency = SPI_CLOCK / divisor, or divisor = SPI_CLOCK / frequency */
@ -297,10 +285,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -323,18 +309,14 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
{
#ifndef CONFIG_SPI_OWNBUS
FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
#endif
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
/* Has the mode changed? */
DEBUGASSERT(priv);
DEBUGASSERT(priv != NULL);
if (mode != priv->mode)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(SPI_CR);
@ -366,10 +348,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -389,20 +369,16 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
{
#ifndef CONFIG_SPI_OWNBUS
FAR struct lpc23xx_spidev_s *priv = (FAR struct lpc23xx_spidev_s *)dev;
#endif
uint32_t regval;
DEBUGASSERT(nbits > 7 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
/* Has the number of bits changed? */
DEBUGASSERT(priv);
DEBUGASSERT(priv != NULL);
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(SPI_CR);
@ -413,10 +389,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -612,11 +586,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -624,9 +596,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
return &priv->spidev;
}

27
arch/arm/src/lpc43xx/lpc43_spi.c
View File

@ -104,13 +104,11 @@
struct lpc43_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -119,9 +117,7 @@ struct lpc43_spidev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
@ -136,9 +132,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = lpc43_spiselect,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -194,7 +188,6 @@ static struct lpc43_spidev_s g_spidev =
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc43_spidev_s *priv = (FAR struct lpc43_spidev_s *)dev;
@ -218,7 +211,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -244,14 +236,13 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequence is the same as the frequency selection */
DEBUGASSERT(priv && frequency <= SPI_CLOCK / 2);
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* frequency = SPI_CLOCK / divisor, or divisor = SPI_CLOCK / frequency */
@ -280,10 +271,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -311,10 +300,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC43_SPI_CR);
@ -346,10 +333,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -375,10 +360,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 7 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR appropriately */
regval = getreg32(LPC43_SPI_CR);
@ -389,10 +373,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -567,11 +549,9 @@ FAR struct spi_dev_s *lpc43_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -579,12 +559,9 @@ FAR struct spi_dev_s *lpc43_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
return &priv->spidev;
}
#endif /* CONFIG_LPC43_SPI */
/****************************************************************************

27
arch/arm/src/lpc43xx/lpc43_ssp.c
View File

@ -103,13 +103,11 @@ struct lpc43_sspdev_s
#ifdef CONFIG_LPC43_SSP_INTERRUPTS
uint8_t sspirq; /* SPI IRQ number */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -124,9 +122,7 @@ static inline void ssp_putreg(FAR struct lpc43_sspdev_s *priv, uint8_t offset,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -154,9 +150,7 @@ static inline FAR struct lpc43_sspdev_s *lpc43_ssp1initialize(void);
#ifdef CONFIG_LPC43_SSP0
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc43_ssp0select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -196,9 +190,7 @@ static struct lpc43_sspdev_s g_ssp0dev =
#ifdef CONFIG_LPC43_SSP1
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssp_lock,
#endif
.select = lpc43_ssp1select, /* Provided externally */
.setfrequency = ssp_setfrequency,
.setmode = ssp_setmode,
@ -302,7 +294,6 @@ static inline void ssp_putreg(FAR struct lpc43_sspdev_s *priv, uint8_t offset, u
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lpc43_sspdev_s *priv = (FAR struct lpc43_sspdev_s *)dev;
@ -327,7 +318,6 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: ssp_setfrequency
@ -350,14 +340,12 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t divisor;
uint32_t actual;
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* frequency = SSP_CLOCK / divisor, or divisor = SSP_CLOCK / frequency */
@ -386,10 +374,8 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
sspdbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -417,10 +403,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR0 appropriately */
regval = ssp_getreg(priv, LPC43_SSP_CR0_OFFSET);
@ -453,10 +437,8 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -482,10 +464,9 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 3 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR1 appropriately */
regval = ssp_getreg(priv, LPC43_SSP_CR0_OFFSET);
@ -495,10 +476,8 @@ static void ssp_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -855,11 +834,9 @@ FAR struct spi_dev_s *lpc43_sspinitialize(int port)
/* Set the initial SSP configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -867,9 +844,7 @@ FAR struct spi_dev_s *lpc43_sspinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Enable the SPI */

31
arch/arm/src/sam34/sam_spi.c
View File

@ -176,11 +176,9 @@ struct sam_spics_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
uint8_t nbits; /* Width of word in bits (8 to 16) */
#if defined(CONFIG_SAM34_SPI0) || defined(CONFIG_SAM34_SPI1)
@ -288,9 +286,7 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock);
#endif
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
@ -327,9 +323,7 @@ static const uint8_t g_csroffset[4] =
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -369,9 +363,7 @@ static struct sam_spidev_s g_spi0dev =
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -895,7 +887,6 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
@ -922,7 +913,6 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_select
@ -1012,14 +1002,12 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (spics->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return spics->actual;
}
#endif
/* Configure SPI to a frequency as close as possible to the requested frequency.
*
@ -1084,10 +1072,8 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
spics->frequency = frequency;
spics->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -1119,10 +1105,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != spics->mode)
{
#endif
/* Yes... Set the mode appropriately:
*
* SPI CPOL NCPHA
@ -1164,10 +1148,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
spics->mode = mode;
}
#endif
}
/****************************************************************************
@ -1197,9 +1179,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
#ifndef CONFIG_SPI_OWNBUS
if (nbits != spics->nbits)
#endif
{
/* Yes... Set number of bits appropriately */
@ -1759,10 +1739,8 @@ struct spi_dev_s *up_spiinitialize(int port)
int csno = (port & __SPI_CS_MASK) >> __SPI_CS_SHIFT;
int spino = (port & __SPI_SPI_MASK) >> __SPI_SPI_SHIFT;
irqstate_t flags;
#ifndef CONFIG_SPI_OWNBUS
uint32_t regval;
unsigned int offset;
#endif
/* The support SAM parts have only a single SPI port */
@ -1911,14 +1889,12 @@ struct spi_dev_s *up_spiinitialize(int port)
(void)spi_getreg(spi, SAM_SPI_SR_OFFSET);
(void)spi_getreg(spi, SAM_SPI_RDR_OFFSET);
#ifndef CONFIG_SPI_OWNBUS
/* Initialize the SPI semaphore that enforces mutually exclusive
* access to the SPI registers.
*/
sem_init(&spi->spisem, 0, 1);
spi->initialized = true;
#endif
#ifdef CONFIG_SAM34_SPI_DMA
/* Initialize the SPI semaphore that is used to wake up the waiting
@ -1936,10 +1912,8 @@ struct spi_dev_s *up_spiinitialize(int port)
spi_dumpregs(spi, "After initialization");
}
#ifndef CONFIG_SPI_OWNBUS
/* Set to mode=0 and nbits=8 and impossible frequency. It is only
* critical to do this if CONFIG_SPI_OWNBUS is not defined because in
* that case, the SPI will only be reconfigured if there is a change.
/* Set to mode=0 and nbits=8 and impossible frequency. The SPI will only
* be reconfigured if there is a change.
*/
offset = (unsigned int)g_csroffset[csno];
@ -1950,7 +1924,6 @@ struct spi_dev_s *up_spiinitialize(int port)
spics->nbits = 8;
spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
#endif
return &spics->spidev;
}

34
arch/arm/src/sama5/sam_spi.c
View File

@ -168,13 +168,10 @@
struct sam_spics_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
uint8_t spino; /* SPI controller number (0 or 1) */
@ -280,9 +277,7 @@ static inline uintptr_t spi_physregaddr(struct sam_spics_s *spics,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock);
#endif
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
@ -319,9 +314,7 @@ static const uint8_t g_csroffset[4] =
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -360,9 +353,7 @@ static struct sam_spidev_s g_spi0dev =
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -885,7 +876,6 @@ static inline uintptr_t spi_physregaddr(struct sam_spics_s *spics,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
@ -912,7 +902,6 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_select
@ -1002,14 +991,12 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (spics->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return spics->actual;
}
#endif
/* Configure SPI to a frequency as close as possible to the requested frequency.
*
@ -1074,10 +1061,8 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
spics->frequency = frequency;
spics->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -1109,10 +1094,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != spics->mode)
{
#endif
/* Yes... Set the mode appropriately:
*
* SPI CPOL NCPHA
@ -1154,10 +1137,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
spics->mode = mode;
}
#endif
}
/****************************************************************************
@ -1194,10 +1175,8 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
#ifndef CONFIG_SPI_OWNBUS
if (nbits != spics->nbits)
{
#endif
/* Yes... Set number of bits appropriately */
offset = (unsigned int)g_csroffset[spics->cs];
@ -1210,10 +1189,8 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
spics->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -1690,10 +1667,8 @@ struct spi_dev_s *up_spiinitialize(int port)
int csno = (port & __SPI_CS_MASK) >> __SPI_CS_SHIFT;
int spino = (port & __SPI_SPI_MASK) >> __SPI_SPI_SHIFT;
irqstate_t flags;
#ifndef CONFIG_SPI_OWNBUS
uint32_t regval;
unsigned int offset;
#endif
/* The support SAM parts have only a single SPI port */
@ -1842,14 +1817,12 @@ struct spi_dev_s *up_spiinitialize(int port)
(void)spi_getreg(spi, SAM_SPI_SR_OFFSET);
(void)spi_getreg(spi, SAM_SPI_RDR_OFFSET);
#ifndef CONFIG_SPI_OWNBUS
/* Initialize the SPI semaphore that enforces mutually exclusive
* access to the SPI registers.
*/
sem_init(&spi->spisem, 0, 1);
spi->initialized = true;
#endif
#ifdef CONFIG_SAMA5_SPI_DMA
/* Initialize the SPI semaphore that is used to wake up the waiting
@ -1867,10 +1840,8 @@ struct spi_dev_s *up_spiinitialize(int port)
spi_dumpregs(spi, "After initialization");
}
#ifndef CONFIG_SPI_OWNBUS
/* Set to mode=0 and nbits=8 and impossible frequency. It is only
* critical to do this if CONFIG_SPI_OWNBUS is not defined because in
* that case, the SPI will only be reconfigured if there is a change.
/* Set to mode=0 and nbits=8 and impossible frequency. The SPI will only
* be reconfigured if there is a change.
*/
offset = (unsigned int)g_csroffset[csno];
@ -1881,7 +1852,6 @@ struct spi_dev_s *up_spiinitialize(int port)
spics->nbits = 8;
spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
#endif
return &spics->spidev;
}

42
arch/arm/src/samdl/sam_spi.c
View File

@ -132,12 +132,10 @@ struct sam_spidev_s
/* Dynamic configuration */
#ifndef CONFIG_SPI_OWNBUS
sem_t spilock; /* Used to managed exclusive access to the bus */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
uint8_t nbits; /* Width of word in bits (8 to 16) */
/* Debug stuff */
@ -209,9 +207,7 @@ static int spi5_interrupt(int irq, void *context);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(struct spi_dev_s *dev, int nbits);
@ -239,9 +235,7 @@ static void spi_pad_configure(struct sam_spidev_s *priv);
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi0select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -284,9 +278,7 @@ static struct sam_spidev_s g_spi0dev =
#if 0 /* Not used */
.handler = spi0_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
@ -295,9 +287,7 @@ static struct sam_spidev_s g_spi0dev =
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -337,9 +327,7 @@ static struct sam_spidev_s g_spi1dev =
#if 0 /* Not used */
.handler = spi1_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
@ -348,9 +336,7 @@ static struct sam_spidev_s g_spi1dev =
static const struct spi_ops_s g_spi2ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi0select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -390,9 +376,7 @@ static struct sam_spidev_s g_spi2dev =
#if 0 /* Not used */
.handler = spi2_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
@ -401,9 +385,7 @@ static struct sam_spidev_s g_spi2dev =
static const struct spi_ops_s g_spi3ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi3select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -443,9 +425,7 @@ static struct sam_spidev_s g_spi3dev =
#if 0 /* Not used */
.handler = spi3_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
@ -454,9 +434,7 @@ static struct sam_spidev_s g_spi3dev =
static const struct spi_ops_s g_spi4ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi4select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -496,9 +474,7 @@ static struct sam_spidev_s g_spi4dev =
#if 0 /* Not used */
.handler = spi4_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
@ -507,9 +483,7 @@ static struct sam_spidev_s g_spi4dev =
static const struct spi_ops_s g_spi5ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = sam_spi5select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -549,16 +523,10 @@ static struct sam_spidev_s g_spi5dev =
#if 0 /* Not used */
.handler = spi5_interrupt,
#endif
#ifndef CONFIG_SPI_OWNBUS
.spilock = SEM_INITIALIZER(1),
#endif
};
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -917,7 +885,6 @@ static int spi5_interrupt(int irq, void *context)
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
@ -943,7 +910,6 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -983,14 +949,12 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* For synchronous mode, the BAUAD rate (Fbaud) is generated from the
* source clock frequency (Fref) as follows:
@ -1048,10 +1012,8 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spivdbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -1081,9 +1043,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
#endif
{
/* Yes... Set the mode appropriately */
@ -1116,9 +1076,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
#endif
}
}

32
arch/arm/src/samv7/sam_spi.c
View File

@ -163,12 +163,9 @@
struct sam_spics_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
uint8_t nbits; /* Width of word in bits (8 to 16) */
#if defined(CONFIG_SAMV7_SPI0_MASTER) || defined(CONFIG_SAMV7_SPI1_MASTER)
@ -275,9 +272,7 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
/* SPI master methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock);
#endif
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
@ -314,9 +309,7 @@ static const uint8_t g_csroffset[4] =
static const struct spi_ops_s g_spi0ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -355,9 +348,7 @@ static struct sam_spidev_s g_spi0dev =
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = spi_select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -880,7 +871,6 @@ static inline uintptr_t spi_regaddr(struct sam_spics_s *spics,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
@ -907,7 +897,6 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_select
@ -997,14 +986,12 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (spics->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return spics->actual;
}
#endif
/* Configure SPI to a frequency as close as possible to the requested frequency.
*
@ -1069,10 +1056,8 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
spics->frequency = frequency;
spics->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -1104,10 +1089,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != spics->mode)
{
#endif
/* Yes... Set the mode appropriately:
*
* SPI CPOL NCPHA
@ -1149,10 +1132,8 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
spics->mode = mode;
}
#endif
}
/****************************************************************************
@ -1182,9 +1163,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
#ifndef CONFIG_SPI_OWNBUS
if (nbits != spics->nbits)
#endif
{
/* Yes... Set number of bits appropriately */
@ -1740,10 +1719,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
int csno = (port & __SPI_CS_MASK) >> __SPI_CS_SHIFT;
int spino = (port & __SPI_SPI_MASK) >> __SPI_SPI_SHIFT;
irqstate_t flags;
#ifndef CONFIG_SPI_OWNBUS
uint32_t regval;
unsigned int offset;
#endif
/* The support SAM parts have only a single SPI port */
@ -1889,14 +1866,12 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
(void)spi_getreg(spi, SAM_SPI_SR_OFFSET);
(void)spi_getreg(spi, SAM_SPI_RDR_OFFSET);
#ifndef CONFIG_SPI_OWNBUS
/* Initialize the SPI semaphore that enforces mutually exclusive
* access to the SPI registers.
*/
sem_init(&spi->spisem, 0, 1);
spi->initialized = true;
#endif
#ifdef CONFIG_SAMV7_SPI_DMA
/* Initialize the SPI semaphore that is used to wake up the waiting
@ -1914,10 +1889,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
spi_dumpregs(spi, "After initialization");
}
#ifndef CONFIG_SPI_OWNBUS
/* Set to mode=0 and nbits=8 and impossible frequency. It is only
* critical to do this if CONFIG_SPI_OWNBUS is not defined because in
* that case, the SPI will only be reconfigured if there is a change.
/* Set to mode=0 and nbits=8 and impossible frequency. The SPI will only
* be reconfigured if there is a change.
*/
offset = (unsigned int)g_csroffset[csno];
@ -1928,7 +1901,6 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
spics->nbits = 8;
spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
#endif
return &spics->spidev;
}

37
arch/arm/src/stm32/stm32_spi.c
View File

@ -199,13 +199,11 @@ struct stm32_spidev_s
uint32_t txccr; /* DMA control register for TX transfers */
uint32_t rxccr; /* DMA control register for RX transfers */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
int8_t nbits; /* Width of word in bits (8 or 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/************************************************************************************
@ -240,9 +238,7 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -267,9 +263,7 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv);
#ifdef CONFIG_STM32_SPI1
static const struct spi_ops_s g_sp1iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -313,9 +307,7 @@ static struct stm32_spidev_s g_spi1dev =
#ifdef CONFIG_STM32_SPI2
static const struct spi_ops_s g_sp2iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi2select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -356,9 +348,7 @@ static struct stm32_spidev_s g_spi2dev =
#ifdef CONFIG_STM32_SPI3
static const struct spi_ops_s g_sp3iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi3select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -399,9 +389,7 @@ static struct stm32_spidev_s g_spi3dev =
#ifdef CONFIG_STM32_SPI4
static const struct spi_ops_s g_sp4iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi4select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -442,9 +430,7 @@ static struct stm32_spidev_s g_spi4dev =
#ifdef CONFIG_STM32_SPI5
static const struct spi_ops_s g_sp5iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi5select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -485,9 +471,7 @@ static struct stm32_spidev_s g_spi5dev =
#ifdef CONFIG_STM32_SPI6
static const struct spi_ops_s g_sp6iops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = stm32_spi6select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -944,7 +928,6 @@ static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uin
*
************************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
@ -968,7 +951,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/************************************************************************************
* Name: spi_setfrequency
@ -1000,10 +982,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Has the frequency changed? */
#ifndef CONFIG_SPI_OWNBUS
if (frequency != priv->frequency)
{
#endif
/* Choices are limited by PCLK frequency with a set of divisors */
if (frequency >= priv->spiclock >> 1)
@ -1073,14 +1053,11 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
spivdbg("Frequency %d->%d\n", frequency, actual);
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
}
return priv->actual;
#else
return actual;
#endif
}
/************************************************************************************
@ -1108,10 +1085,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CR1 appropriately */
switch (mode)
@ -1146,10 +1121,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/************************************************************************************
@ -1177,10 +1150,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set CR1 appropriately */
switch (nbits)
@ -1215,10 +1186,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/************************************************************************************
@ -1511,11 +1480,9 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv)
setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM;
spi_modifycr1(priv, setbits, clrbits);
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -1527,9 +1494,7 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Initialize the SPI semaphores that is used to wait for DMA completion */

38
arch/arm/src/tiva/tiva_ssi.c
View File

@ -218,17 +218,14 @@ struct tiva_ssidev_s
uint8_t irq; /* SSI IRQ number */
#endif
/* If there is more than one device on the SPI bus, then we have to enforce
* mutual exclusion and remember some configuration settings to reduce the
* overhead of constant SPI re-configuration.
/* Enforce mutual exclusion and remember some configuration settings to
* reduce the overhead of constant SPI re-configuration.
*/
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* For exclusive access to the SSI bus */
uint32_t frequency; /* Current desired SCLK frequency */
uint32_t actual; /* Current actual SCLK frequency */
uint8_t mode; /* Current mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -280,9 +277,7 @@ static int ssi_interrupt(int irq, void *context);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int ssi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t frequency);
static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev,
@ -311,9 +306,7 @@ static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = ssi_lock,
#endif
.select = tiva_spiselect, /* Provided externally by board logic */
.setfrequency = ssi_setfrequency,
.setmode = ssi_setmode,
@ -457,7 +450,7 @@ static inline void ssi_putreg(struct tiva_ssidev_s *priv,
* State of the SSI before the SSE was disabled
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -486,7 +479,7 @@ static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
* Returned Value:
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -836,7 +829,7 @@ static inline void ssi_performrx(struct tiva_ssidev_s *priv)
* 0: success, <0:Negated error number on failure
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -1092,7 +1085,6 @@ static int ssi_interrupt(int irq, void *context)
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int ssi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct tiva_ssidev_s *priv = (FAR struct tiva_ssidev_s *)dev;
@ -1117,7 +1109,6 @@ static int ssi_lock(FAR struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: ssi_setfrequency
@ -1133,7 +1124,7 @@ static int ssi_lock(FAR struct spi_dev_s *dev, bool lock)
* Returns the actual frequency selected
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -1151,10 +1142,8 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
/* Has the frequency changed? */
#ifndef CONFIG_SPI_OWNBUS
if (frequency != priv->frequency)
{
#endif
/* "The serial bit rate is derived by dividing down the input clock
* (FSysClk). The clock is first divided by an even prescale value
* CPSDVSR from 2 to 254, which is programmed in the SSI Clock Prescale
@ -1228,16 +1217,11 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
* faster.
*/
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
}
return priv->actual;
#else
return actual;
#endif
}
static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
@ -1268,7 +1252,7 @@ static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
* none
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -1282,10 +1266,8 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
/* Has the number of bits per word changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Select the CTL register bits based on the selected mode */
switch (mode)
@ -1320,10 +1302,8 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
@ -1352,7 +1332,7 @@ static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
* none
*
* Assumption:
* Caller holds a lock on the SPI bus (if CONFIG_SPI_OWNBUS not defined)
* Caller holds a lock on the SPI bus
*
****************************************************************************/
@ -1662,9 +1642,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
#ifndef CONFIG_SSI_POLLWAIT
sem_init(&priv->xfrsem, 0, 0);
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Set all CR1 fields to reset state. This will be master mode. */

22
arch/avr/src/avr/up_spi.c
View File

@ -90,12 +90,10 @@
struct avr_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -104,9 +102,7 @@ struct avr_spidev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -120,9 +116,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = avr_spiselect,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -174,7 +168,6 @@ static struct avr_spidev_s g_spidev =
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
@ -198,7 +191,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -217,15 +209,13 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
{
uint32_t actual;
#ifndef CONFIG_SPI_OWNBUS
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
uint32_t actual;
/* Has the request frequency changed? */
if (frequency != priv->frequency)
{
#endif
/* Read the SPI status and control registers, clearing all divider bits */
uint8_t spcr = SPCR & ~((1 << SPR0) | (1 << SPR1));
@ -274,7 +264,6 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
}
@ -282,7 +271,6 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
{
actual = priv->actual;
}
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -305,14 +293,12 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
{
#ifndef CONFIG_SPI_OWNBUS
FAR struct avr_spidev_s *priv = (FAR struct avr_spidev_s *)dev;
/* Has the mode changed? */
if (mode != priv->mode)
{
#endif
uint8_t regval;
/* Yes... Set SPI CR appropriately */
@ -346,10 +332,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -524,10 +508,8 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = 0;
priv->mode = SPIDEV_MODE0;
#endif
/* Select a default frequency of approx. 400KHz */
@ -535,9 +517,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
irqrestore(flags);
return &priv->spidev;

43
arch/mips/src/pic32mx/pic32mx-spi.c
View File

@ -101,13 +101,11 @@ struct pic32mx_dev_s
uint8_t rxirq; /* SPI receive done interrupt number */
uint8_t txirq; /* SPI transfer done interrupt number */
#endif
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (8 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
};
/****************************************************************************
@ -122,9 +120,7 @@ static void spi_putreg(FAR struct pic32mx_dev_s *priv,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -140,9 +136,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mx_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -180,9 +174,7 @@ static struct pic32mx_dev_s g_spi1dev =
#ifdef CONFIG_PIC32MX_SPI2
static const struct spi_ops_s g_spi2ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mx_spi2select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -217,9 +209,7 @@ static struct pic32mx_dev_s g_spi2dev =
#ifdef CONFIG_PIC32MX_SPI3
static const struct spi_ops_s g_spi3ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mx_spi3select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -254,9 +244,7 @@ static struct pic32mx_dev_s g_spi3dev =
#ifdef CONFIG_PIC32MX_SPI4
static const struct spi_ops_s g_spi4ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mx_spi4select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -441,7 +429,6 @@ static void spi_putreg(FAR struct pic32mx_dev_s *priv, unsigned int offset,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
@ -465,7 +452,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -489,23 +475,17 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t actual;
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
priv->frequency, priv->actual, frequency);
#else
spivdbg("New frequency: %d\n", regval);
#endif
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* Calculate the divisor
*
@ -542,10 +522,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("New frequency: %d Actual: %d\n", frequency, actual);
return actual;
@ -571,18 +549,12 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
#else
spivdbg("New mode: %d\n", mode);
#endif
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CON register appropriately.
*
* Standard terminology is as follows:
@ -643,10 +615,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -670,19 +640,14 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
uint32_t setting;
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
#else
spivdbg("New nbits: %d\n", nbits);
#endif
/* Has the number of bits changed? */
DEBUGASSERT(priv && nbits > 7 && nbits < 17);
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
{
#endif
/* Yes... Set the CON register appropriately */
if (nbits == 8)
@ -711,10 +676,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Save the selection so the subsequence re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = nbits;
}
#endif
}
/****************************************************************************
@ -992,16 +955,12 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
#ifdef CONFIG_PIC32MX_SPI_INTERRUPTS
/* Enable interrupts at the SPI controller */

39
arch/mips/src/pic32mz/pic32mz-spi.c
View File

@ -106,13 +106,10 @@ struct pic32mz_dev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
FAR const struct pic32mz_config_s *config;
#ifndef CONFIG_SPI_OWNBUS
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
uint8_t mode; /* Mode 0,1,2,3 */
#endif
uint8_t nbits; /* Width of word in bits (8 to 16) */
#ifdef CONFIG_PIC32MZ_SPI_REGDEBUG
@ -152,9 +149,7 @@ static void spi_exchange8(FAR struct pic32mz_dev_s *priv,
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -177,9 +172,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
static const struct spi_ops_s g_spi1ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -228,9 +221,7 @@ static struct pic32mz_dev_s g_spi1dev =
#ifdef CONFIG_PIC32MZ_SPI2
static const struct spi_ops_s g_spi2ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi2select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -276,9 +267,7 @@ static struct pic32mz_dev_s g_spi2dev =
#ifdef CONFIG_PIC32MZ_SPI3
static const struct spi_ops_s g_spi3ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi3select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -324,9 +313,7 @@ static struct pic32mz_dev_s g_spi3dev =
#ifdef CONFIG_PIC32MZ_SPI4
static const struct spi_ops_s g_spi4ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi4select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -372,9 +359,7 @@ static struct pic32mz_dev_s g_spi4dev =
#ifdef CONFIG_PIC32MZ_SPI5
static const struct spi_ops_s g_spi5ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi5select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -420,9 +405,7 @@ static struct pic32mz_dev_s g_spi5dev =
#ifdef CONFIG_PIC32MZ_SPI6
static const struct spi_ops_s g_spi6ops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spi_lock,
#endif
.select = pic32mz_spi6select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
@ -807,7 +790,6 @@ static void spi_exchange16(FAR struct pic32mz_dev_s *priv,
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct pic32mz_dev_s *priv = (FAR struct pic32mz_dev_s *)dev;
@ -831,7 +813,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -855,23 +836,17 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t actual;
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
priv->frequency, priv->actual, frequency);
#else
spivdbg("New frequency: %d\n", regval);
#endif
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* Calculate the divisor
*
@ -908,10 +883,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("New frequency: %d Actual: %d\n", frequency, actual);
return actual;
@ -937,18 +910,12 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct pic32mz_dev_s *priv = (FAR struct pic32mz_dev_s *)dev;
uint32_t regval;
#ifndef CONFIG_SPI_OWNBUS
spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
#else
spivdbg("New mode: %d\n", mode);
#endif
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set CON register appropriately.
*
* Standard terminology is as follows:
@ -1009,10 +976,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configuratins will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -1392,16 +1357,12 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Set the initial SPI configuration */
#ifndef CONFIG_SPI_OWNBUS
priv->nbits = 8;
priv->mode = SPIDEV_MODE0;
#endif
/* Initialize the SPI semaphore that enforces mutually exclusive access */
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
#ifdef CONFIG_PIC32MZ_SPI_INTERRUPTS
/* Enable interrupts at the SPI controller */

6
arch/sim/src/up_spiflash.c
View File

@ -204,9 +204,7 @@ struct sim_spiflashdev_s
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spiflash_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spiflash_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spiflash_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spiflash_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -235,9 +233,7 @@ static uint16_t spiflash_readword(FAR struct sim_spiflashdev_s *priv);
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
.lock = spiflash_lock,
#endif
.select = spiflash_select,
.setfrequency = spiflash_setfrequency,
.setmode = spiflash_setmode,
@ -293,12 +289,10 @@ struct sim_spiflashdev_s g_spidev =
*
************************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spiflash_lock(FAR struct spi_dev_s *dev, bool lock)
{
return OK;
}
#endif
/************************************************************************************
* Name: spiflash_select

25
arch/z16/src/z16f/z16f_espi.c
View File

@ -90,13 +90,11 @@ struct z16f_spi_s
{
struct spi_dev_s spi; /* Externally visible part of the SPI interface */
bool initialized; /* TRUE: Controller has been initialized */
#ifndef CONFIG_SPI_OWNBUS
uint8_t nbits; /* Width of word in bits (1-8) */
uint8_t mode; /* Mode 0,1,2,3 */
sem_t exclsem; /* Assures mutually exclusive access to SPI */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
#endif
/* Debug stuff */
@ -138,9 +136,7 @@ static void spi_flush(FAR struct z16f_spi_s *priv);
/* SPI methods */
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits);
@ -162,9 +158,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
static const struct spi_ops_s g_epsiops =
{
#ifndef CONFIG_SPI_OWNBUS
spi_lock,
#endif
z16f_espi_select,
spi_setfrequency,
spi_setmode,
@ -396,7 +390,6 @@ static void spi_flush(FAR struct z16f_spi_s *priv)
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
@ -422,7 +415,6 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
return OK;
}
#endif
/****************************************************************************
* Name: spi_setfrequency
@ -449,14 +441,12 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Check if the requested frequency is the same as the frequency selection */
#ifndef CONFIG_SPI_OWNBUS
if (priv->frequency == frequency)
{
/* We are already at this frequency. Return the actual. */
return priv->actual;
}
#endif
/* Fbaud = Fsystem / (2 * BRG)
* BRG = Fsystem / (2 * Fbaud)
@ -482,10 +472,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the frequency setting */
#ifndef CONFIG_SPI_OWNBUS
priv->frequency = frequency;
priv->actual = actual;
#endif
spidbg("Frequency %d->%d\n", frequency, actual);
return actual;
@ -515,10 +503,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Has the mode changed? */
#ifndef CONFIG_SPI_OWNBUS
if (mode != priv->mode)
{
#endif
/* Yes... Set the mode appropriately:
*
* SPI CPOL CPHA
@ -559,10 +545,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
/* Save the mode so that subsequent re-configurations will be faster */
#ifndef CONFIG_SPI_OWNBUS
priv->mode = mode;
}
#endif
}
/****************************************************************************
@ -590,9 +574,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
/* Has the number of bits changed? */
#ifndef CONFIG_SPI_OWNBUS
if (nbits != priv->nbits)
#endif
{
/* Yes... Set number of bits appropriately */
@ -609,11 +591,9 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
spi_putreg8(priv, regval, Z16F_ESPI_MODE);
spivdbg("ESPI MODE: %02x\n", regval);
#ifndef CONFIG_SPI_OWNBUS
/* Save the selection so the subsequence re-configurations will be faster */
priv->nbits = nbits;
#endif
}
}
@ -840,9 +820,6 @@ struct spi_dev_s *up_spiinitialize(int port)
{
FAR struct z16f_spi_s *priv;
irqstate_t flags;
#ifndef CONFIG_SPI_OWNBUS
unsigned int offset;
#endif
uint8_t regval;
spivdbg("port: %d\n", port);
@ -857,9 +834,7 @@ struct spi_dev_s *up_spiinitialize(int port)
flags = irqsave();
priv->spi.ops = &g_epsiops;
#ifndef CONFIG_SPI_OWNBUS
sem_init(&priv->exclsem, 0, 1);
#endif
/* Set up the SPI pin configuration (board-specific logic is required to
* configure and manage all chip selects).

6
arch/z80/src/ez80/ez80_spi.c
View File

@ -68,9 +68,7 @@
* Private Function Prototypes
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
uint32_t frequency);
static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
@ -86,9 +84,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR uint8_t *buffer,
static const struct spi_ops_s g_spiops =
{
#ifndef CONFIG_SPI_OWNBUS
spi_lock,
#endif
ez80_spiselect, /* select: Provided externally by board logic */
spi_setfrequency,
spi_setmode,
@ -142,14 +138,12 @@ static struct spi_dev_s g_spidev = { &g_spiops };
*
****************************************************************************/
#ifndef CONFIG_SPI_OWNBUS
static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
/* Not implemented */
return -ENOSYS;
}
#endif
/****************************************************************************
* Name: spi_setfrequency