Fix LPC2148 PLL setup
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@925 42af7a65-404d-4744-a932-0658087f49c3
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@ -1,7 +1,7 @@
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/************************************************************
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/****************************************************************************
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* common/up_schedulesigaction.c
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -14,7 +14,7 @@
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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@ -31,38 +31,43 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************/
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****************************************************************************/
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/************************************************************
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/****************************************************************************
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* Included Files
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************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <sched.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "os_internal.h"
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#include "up_internal.h"
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#include "up_arch.h"
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/************************************************************
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#ifndef CONFIG_DISABLE_SIGNALS
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/****************************************************************************
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* Private Definitions
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************************************************************/
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****************************************************************************/
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/************************************************************
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/****************************************************************************
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* Private Data
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************************************************************/
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****************************************************************************/
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/************************************************************
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/****************************************************************************
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* Private Funtions
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************************************************************/
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****************************************************************************/
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/************************************************************
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/****************************************************************************
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* Public Funtions
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************************************************************/
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****************************************************************************/
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/************************************************************
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/****************************************************************************
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* Name: up_schedule_sigaction
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*
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* Description:
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@ -93,7 +98,7 @@
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* currently executing task -- just call the signal
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* handler now.
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*
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************************************************************/
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****************************************************************************/
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void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver)
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{
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@ -188,3 +193,5 @@ void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver)
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irqrestore(flags);
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}
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}
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#endif /* !CONFIG_DISABLE_SIGNALS */
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@ -38,15 +38,20 @@
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <sched.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include "os_internal.h"
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#include "up_internal.h"
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#include "up_arch.h"
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#ifndef CONFIG_DISABLE_SIGNALS
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/****************************************************************************
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* Definitions
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****************************************************************************/
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@ -135,3 +140,6 @@ void up_sigdeliver(void)
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up_fullcontextrestore(regs);
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#endif
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}
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#endif /* !CONFIG_DISABLE_SIGNALS */
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@ -40,10 +40,13 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_createstack.c up_dataabort.c up_mdelay.c up_udelay.c \
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up_exit.c up_idle.c up_initialize.c up_initialstate.c \
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up_interruptcontext.c up_prefetchabort.c up_releasepending.c \
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up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
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up_sigdeliver.c up_syscall.c up_unblocktask.c \
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up_releasestack.c up_reprioritizertr.c up_syscall.c up_unblocktask.c \
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up_undefinedinsn.c up_usestack.c
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ifneq ($(CONFIG_DISABLE_SIGNALS),y)
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CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c
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endif
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CHIP_ASRCS = lpc214x_lowputc.S
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CHIP_CSRCS = lpc214x_decodeirq.c lpc214x_irq.c lpc214x_timerisr.c \
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lpc214x_serial.c
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@ -1,80 +0,0 @@
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/*
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* The STARTUP.S code is executed after CPU Reset. This file may be
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* translated with the following SET symbols. In uVision these SET
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* symbols are entered under Options - ASM - Set.
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*
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* REMAP: when set the startup code initializes the register MEMMAP
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* which overwrites the settings of the CPU configuration pins. The
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* startup and interrupt vectors are remapped from:
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* 0x00000000 default setting (not remapped)
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* 0x80000000 when EXTMEM_MODE is used
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* 0x40000000 when RAM_MODE is used
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*
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* EXTMEM_MODE: when set the device is configured for code execution
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* from external memory starting at address 0x80000000. The startup
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* vectors are located to 0x80000000.
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*
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* RAM_MODE: when set the device is configured for code execution
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* from on-chip RAM starting at address 0x40000000. The startup
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* vectors are located to 0x40000000.
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*/
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Reset_Handler:
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/* Memory Mapping */
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/* Setup Stack for each mode */
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ldr r0, =Top_Stack
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/* Enter Undefined Instruction Mode and set its Stack Pointer */
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msr CPSR_c, #UND_MODE | PSR_I_BIT | PSR_F_BIT
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mov SP, r0
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sub r0, r0, #UND_Stack_Size
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/* Enter Abort Mode and set its Stack Pointer */
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msr CPSR_c, #ABT_MODE | PSR_I_BIT | PSR_F_BIT
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mov SP, r0
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sub r0, r0, #ABT_Stack_Size
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/* Enter FIQ Mode and set its Stack Pointer */
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msr CPSR_c, #FIQ_MODE | PSR_I_BIT | PSR_F_BIT
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mov SP, r0
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sub r0, r0, #FIQ_Stack_Size
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/* Enter IRQ Mode and set its Stack Pointer */
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msr CPSR_c, #IRQ_MODE | PSR_I_BIT | PSR_F_BIT
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mov SP, r0
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sub r0, r0, #IRQ_Stack_Size
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/* Enter Supervisor Mode and set its Stack Pointer */
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msr CPSR_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT
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mov SP, r0
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sub r0, r0, #SVC_Stack_Size
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/* Enter User Mode and set its Stack Pointer */
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msr CPSR_c, #USR_MODE
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mov SP, r0
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/* Enter the C code */
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ldr r0,=?C?INIT
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tst r0,#1 ; Bit-0 set: INIT is Thumb
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ldreq LR,=exit?A ; ARM Mode
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ldrne LR,=exit?T ; Thumb Mode
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bx r0
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ENDP
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PUBLIC exit?A
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exit?A PROC CODE32
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B exit?A
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ENDP
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PUBLIC exit?T
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exit?T PROC CODE16
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exit: B exit?T
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ENDP
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END
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@ -256,8 +256,20 @@
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#define LPC214X_PLL_CFG_MSEL (0x1f << 0) /* PLL Multiplier */
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#define LPC214X_PLL_CFG_PSEL (0x03 << 5) /* PLL Divider */
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/* PLL Status Register Bit Settings */
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#define LPC214X_PLL_STAT_MSEL (0x1f << 0) /* PLL Multiplier Readback */
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#define LPC214X_PLL_STAT_PSEL (0x03 << 5) /* PLL Divider Readback */
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#define LPC214X_PLL_STAT_PLLE (1 << 8) /* PLL Enable Readback */
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#define LPC214X_PLL_STAT_PLLC (1 << 9) /* PLL Connect Readback */
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#define LPC214X_PLL_STAT_PLOCK (1 << 10) /* PLL Lock Status */
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/* PLL Feed Register values */
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#define LPC214X_PLL_FEED1 0xaa
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#define LPC214X_PLL_FEED2 0x55
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/* Power Control register offsets */
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#define LPC214X_PCON_OFFSET 0x00 /* Control Register */
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@ -67,7 +67,9 @@
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/* This type arry maps 4 bits into the bit number of the lowest bit that it set */
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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static uint8 g_nibblemap[16] = { 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 };
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#endif
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/********************************************************************************
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* Private Functions
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@ -38,6 +38,8 @@
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*****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "up_internal.h"
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#include "up_arch.h"
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@ -92,6 +94,12 @@
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# define CONFIG_PLLCFG_VALUE 0x00000024
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#endif
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/* PLL Control register */
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#ifndef CONFIG_PLLCON_VALUE /* Can be selected from config file */
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# define CONFIG_PLLCON_VALUE LPC214X_PLL_CON_PLLE
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#endif
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/* Memory Accelerator Module (MAM) initialization values
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*
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* MAM Control Register
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@ -265,32 +273,32 @@
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/* Configure the PLL */
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.macro configpll, base, val1, val2, val3
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#ifdef LPC214X_PLL_SETUP
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#ifdef CONFIG_PLL_SETUP
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ldr \base, =LPC214X_PLL_BASE
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mov \val1, #0xaa
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mov \val2, #0x55
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mov \val1, #LPC214X_PLL_FEED1
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mov \val2, #LPC214X_PLL_FEED2
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/* Configure and Enable PLL */
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mov \val3, #CONFIG_PLLCFG_VALUE
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str \val3, [\base, #LPC214X_PLLCFG_OFFSET]
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mov \val3, #LPC214X_PLLCON_PLLE
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str \val3, [\base, #LPC214X_PLLCON_OFFSET]
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str \val1, [\base, #LPC214X_PLLFEED_OFFSET]
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str \val2, [\base, #LPC214X_PLLFEED_OFFSET]
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str \val3, [\base, #LPC214X_PLL_CFG_OFFSET]
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mov \val3, #CONFIG_PLLCON_VALUE
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str \val3, [\base, #LPC214X_PLL_CON_OFFSET]
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str \val1, [\base, #LPC214X_PLL_FEED_OFFSET]
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str \val2, [\base, #LPC214X_PLL_FEED_OFFSET]
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/* Wait until PLL Locked */
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1:
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ldr \val3, [\base, #LPC214X_PLLSTAT_OFFSET]
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ands \val3, \val3, #LPC214X_PLLSTAT_PLOCK
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ldr \val3, [\base, #LPC214X_PLL_STAT_OFFSET]
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ands \val3, \val3, #LPC214X_PLL_STAT_PLOCK
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beq 1b
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/* Switch to PLL Clock */
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mov \val3, #(LPC214X_PLLCON_PLLE | LPC214X_PLLCON_PLLC)
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str \val3, [\base, #LPC214X_PLLCON__OFFSET]
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str \val1, [\base, #LPC214X_PLLFEED_OFFSET]
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str \val2, [\base, #LPC214X_PLLFEED_OFFSET]
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mov \val3, #(LPC214X_PLL_CON_PLLE | LPC214X_PLL_CON_PLLC)
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str \val3, [\base, #LPC214X_PLL_CON_OFFSET]
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str \val1, [\base, #LPC214X_PLL_FEED_OFFSET]
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str \val2, [\base, #LPC214X_PLL_FEED_OFFSET]
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#endif
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.endm
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@ -99,6 +99,8 @@
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#endif
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#define LPC214X_LCR_VALUE (LPC214X_LCR_CHAR | LPC214X_LCR_PAR | LPC214X_LCR_STOP)
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#define LPC214X_FCR_VALUE (LPC214X_FCR_FIFO_TRIG8 | LPC214X_FCR_TX_FIFO_RESET |\
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LPC214X_FCR_RX_FIFO_RESET | LPC214X_FCR_FIFO_ENABLE)
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/**************************************************************************
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* Private Types
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@ -174,7 +176,7 @@ up_lowsetup:
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/* Configure parity, data bits, stop bits and set DLAB=1 */
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ldr r0, =LPC214X_UART0_BASE
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ldr r0, =LPC214X_UART_BASE
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mov r1, #(LPC214X_LCR_VALUE | LPC214X_LCR_DLAB_ENABLE)
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strb r1, [r0, #LPC214X_UART_LCR_OFFSET]
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@ -191,6 +193,11 @@ up_lowsetup:
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mov r1, #LPC214X_LCR_VALUE
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strb r1, [r0, #LPC214X_UART_LCR_OFFSET]
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/* Configure the FIFOs */
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mov r1, #LPC214X_FCR_VALUE
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strb r1, [r0, #LPC214X_UART_FCR_OFFSET]
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/* And return */
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mov pc, lr
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@ -78,7 +78,7 @@
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/* FIFO Control Register (FCR) bit definitions */
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#define LPC214X_FCR_FIFO_ENABLE (1 << 0) /* FIFO wnable */
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#define LPC214X_FCR_FIFO_ENABLE (1 << 0) /* FIFO enable */
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#define LPC214X_FCR_RX_FIFO_RESET (1 << 1) /* Reset receive FIFO */
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#define LPC214X_FCR_TX_FIFO_RESET (1 << 2) /* Reset transmit FIFO */
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#define LPC214X_FCR_FIFO_TRIG1 (0 << 6) /* Trigger @1 character in FIFO */
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