Merged in kekiefer/nuttx/stm32f7-serial-fix-tiocssinglewire-upstream (pull request #658)
stm32f7: serial: Fix ioctl TIOCSSINGLEWIRE The TRM notes that UE must be disabled in order to write HDSEL in USART_CR3. This was not being done, so calls to TIOCSSINGLEWIRE were silently failing. This change checks the state of UE in USART_CR1, clears the UE bit before writing HDSEL, then re-enables it if neccesary. Approved-by: GregoryN <gnutt@nuttx.org>
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@ -1926,6 +1926,22 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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#ifdef CONFIG_STM32F7_USART_SINGLEWIRE
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#ifdef CONFIG_STM32F7_USART_SINGLEWIRE
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case TIOCSSINGLEWIRE:
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case TIOCSSINGLEWIRE:
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{
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{
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uint32_t cr1;
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uint32_t cr1_ue;
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irqstate_t flags;
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flags = enter_critical_section();
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/* Get the original state of UE */
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cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
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cr1_ue = cr1 & USART_CR1_UE;
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cr1 &= ~USART_CR1_UE;
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/* Disable UE, HDSEL can only be written when UE=0 */
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up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
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/* Change the TX port to be open-drain/push-pull and enable/disable
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/* Change the TX port to be open-drain/push-pull and enable/disable
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* half-duplex mode.
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* half-duplex mode.
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*/
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*/
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@ -1944,6 +1960,11 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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}
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}
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up_serialout(priv, STM32_USART_CR3_OFFSET, cr);
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up_serialout(priv, STM32_USART_CR3_OFFSET, cr);
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/* Re-enable UE if appropriate */
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up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | cr1_ue);
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leave_critical_section(flags);
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}
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}
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break;
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break;
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#endif
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#endif
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