From bacf7cf07ee40028575eb4b3df458b9cd7b078df Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 16 Dec 2015 09:03:14 -0600 Subject: [PATCH] ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit --- arch/arm/include/armv7-a/syscall.h | 2 +- arch/arm/include/armv7-r/irq.h | 412 ++++++++++++++++++ arch/arm/include/armv7-r/syscall.h | 243 +++++++++++ arch/arm/include/irq.h | 6 +- arch/arm/src/armv7-a/arm_memcpy.S | 3 - arch/arm/src/armv7-r/arm_doirq.c | 1 + arch/arm/src/armv7-r/arm_fpuconfig.S | 24 +- arch/arm/src/armv7-r/arm_fullcontextrestore.S | 20 +- arch/arm/src/armv7-r/arm_head.S | 12 +- arch/arm/src/armv7-r/arm_memcpy.S | 15 +- arch/arm/src/armv7-r/arm_restorefpu.S | 16 +- arch/arm/src/armv7-r/arm_saveusercontext.S | 24 +- arch/arm/src/armv7-r/arm_signal_handler.S | 15 +- arch/arm/src/armv7-r/arm_syscall.c | 2 - arch/arm/src/tms570/Make.defs | 2 +- arch/arm/src/tms570/chip/tms570_memorymap.h | 49 +++ arch/arm/src/tms570/tms570_boot.c | 32 +- arch/arm/src/tms570/tms570_boot.h | 142 ++++++ arch/arm/src/tms570/tms570_timerisr.c | 48 ++ 19 files changed, 980 insertions(+), 88 deletions(-) create mode 100644 arch/arm/include/armv7-r/irq.h create mode 100644 arch/arm/include/armv7-r/syscall.h create mode 100644 arch/arm/src/tms570/chip/tms570_memorymap.h create mode 100644 arch/arm/src/tms570/tms570_boot.h create mode 100644 arch/arm/src/tms570/tms570_timerisr.c diff --git a/arch/arm/include/armv7-a/syscall.h b/arch/arm/include/armv7-a/syscall.h index e3a0ab90eb..9b86d06465 100644 --- a/arch/arm/include/armv7-a/syscall.h +++ b/arch/arm/include/armv7-a/syscall.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/include/armv-7a/syscall.h + * arch/arm/include/armv7-a/syscall.h * * Copyright (C) 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/arch/arm/include/armv7-r/irq.h b/arch/arm/include/armv7-r/irq.h new file mode 100644 index 0000000000..7365e6648d --- /dev/null +++ b/arch/arm/include/armv7-r/irq.h @@ -0,0 +1,412 @@ +/**************************************************************************** + * arch/arm/include/armv7-r/irq.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_ARMV7_R_IRQ_H +#define __ARCH_ARM_INCLUDE_ARMV7_R_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* IRQ Stack Frame Format: + * + * Context is always saved/restored in the same way: + * + * (1) stmia rx, {r0-r14} + * (2) then the PC and CPSR + * + * This results in the following set of indices that can be used to access + * individual registers in the xcp.regs array: + */ + +#define REG_R0 (0) +#define REG_R1 (1) +#define REG_R2 (2) +#define REG_R3 (3) +#define REG_R4 (4) +#define REG_R5 (5) +#define REG_R6 (6) +#define REG_R7 (7) +#define REG_R8 (8) +#define REG_R9 (9) +#define REG_R10 (10) +#define REG_R11 (11) +#define REG_R12 (12) +#define REG_R13 (13) +#define REG_R14 (14) +#define REG_R15 (15) +#define REG_CPSR (16) + +#define ARM_CONTEXT_REGS (17) + +/* If the MCU supports a floating point unit, then it will be necessary + * to save the state of the FPU status register and data registers on + * each context switch. These registers are not saved during interrupt + * level processing, however. So, as a consequence, floating point + * operations may NOT be performed in interrupt handlers. + * + * The FPU provides an extension register file containing 32 single- + * precision registers. These can be viewed as: + * + * - Sixteen 64-bit double word registers, D0-D15 + * - Thirty-two 32-bit single-word registers, S0-S31 + * S<2n> maps to the least significant half of D + * S<2n+1> maps to the most significant half of D. + */ + +#ifdef CONFIG_ARCH_FPU +# define REG_D0 (ARM_CONTEXT_REGS+0) /* D0 */ +# define REG_S0 (ARM_CONTEXT_REGS+0) /* S0 */ +# define REG_S1 (ARM_CONTEXT_REGS+1) /* S1 */ +# define REG_D1 (ARM_CONTEXT_REGS+2) /* D1 */ +# define REG_S2 (ARM_CONTEXT_REGS+2) /* S2 */ +# define REG_S3 (ARM_CONTEXT_REGS+3) /* S3 */ +# define REG_D2 (ARM_CONTEXT_REGS+4) /* D2 */ +# define REG_S4 (ARM_CONTEXT_REGS+4) /* S4 */ +# define REG_S5 (ARM_CONTEXT_REGS+5) /* S5 */ +# define REG_D3 (ARM_CONTEXT_REGS+6) /* D3 */ +# define REG_S6 (ARM_CONTEXT_REGS+6) /* S6 */ +# define REG_S7 (ARM_CONTEXT_REGS+7) /* S7 */ +# define REG_D4 (ARM_CONTEXT_REGS+8) /* D4 */ +# define REG_S8 (ARM_CONTEXT_REGS+8) /* S8 */ +# define REG_S9 (ARM_CONTEXT_REGS+9) /* S9 */ +# define REG_D5 (ARM_CONTEXT_REGS+10) /* D5 */ +# define REG_S10 (ARM_CONTEXT_REGS+10) /* S10 */ +# define REG_S11 (ARM_CONTEXT_REGS+11) /* S11 */ +# define REG_D6 (ARM_CONTEXT_REGS+12) /* D6 */ +# define REG_S12 (ARM_CONTEXT_REGS+12) /* S12 */ +# define REG_S13 (ARM_CONTEXT_REGS+13) /* S13 */ +# define REG_D7 (ARM_CONTEXT_REGS+14) /* D7 */ +# define REG_S14 (ARM_CONTEXT_REGS+14) /* S14 */ +# define REG_S15 (ARM_CONTEXT_REGS+15) /* S15 */ +# define REG_D8 (ARM_CONTEXT_REGS+16) /* D8 */ +# define REG_S16 (ARM_CONTEXT_REGS+16) /* S16 */ +# define REG_S17 (ARM_CONTEXT_REGS+17) /* S17 */ +# define REG_D9 (ARM_CONTEXT_REGS+18) /* D9 */ +# define REG_S18 (ARM_CONTEXT_REGS+18) /* S18 */ +# define REG_S19 (ARM_CONTEXT_REGS+19) /* S19 */ +# define REG_D10 (ARM_CONTEXT_REGS+20) /* D10 */ +# define REG_S20 (ARM_CONTEXT_REGS+20) /* S20 */ +# define REG_S21 (ARM_CONTEXT_REGS+21) /* S21 */ +# define REG_D11 (ARM_CONTEXT_REGS+22) /* D11 */ +# define REG_S22 (ARM_CONTEXT_REGS+22) /* S22 */ +# define REG_S23 (ARM_CONTEXT_REGS+23) /* S23 */ +# define REG_D12 (ARM_CONTEXT_REGS+24) /* D12 */ +# define REG_S24 (ARM_CONTEXT_REGS+24) /* S24 */ +# define REG_S25 (ARM_CONTEXT_REGS+25) /* S25 */ +# define REG_D13 (ARM_CONTEXT_REGS+26) /* D13 */ +# define REG_S26 (ARM_CONTEXT_REGS+26) /* S26 */ +# define REG_S27 (ARM_CONTEXT_REGS+27) /* S27 */ +# define REG_D14 (ARM_CONTEXT_REGS+28) /* D14 */ +# define REG_S28 (ARM_CONTEXT_REGS+28) /* S28 */ +# define REG_S29 (ARM_CONTEXT_REGS+29) /* S29 */ +# define REG_D15 (ARM_CONTEXT_REGS+30) /* D15 */ +# define REG_S30 (ARM_CONTEXT_REGS+30) /* S30 */ +# define REG_S31 (ARM_CONTEXT_REGS+31) /* S31 */ +# define REG_FPSCR (ARM_CONTEXT_REGS+32) /* Floating point status and control */ +# define FPU_CONTEXT_REGS (33) +#else +# define FPU_CONTEXT_REGS (0) +#endif + +/* The total number of registers saved by software */ + +#define XCPTCONTEXT_REGS (ARM_CONTEXT_REGS + FPU_CONTEXT_REGS) +#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) + +/* Friendly register names */ + +#define REG_A1 REG_R0 +#define REG_A2 REG_R1 +#define REG_A3 REG_R2 +#define REG_A4 REG_R3 +#define REG_V1 REG_R4 +#define REG_V2 REG_R5 +#define REG_V3 REG_R6 +#define REG_V4 REG_R7 +#define REG_V5 REG_R8 +#define REG_V6 REG_R9 +#define REG_V7 REG_R10 +#define REG_SB REG_R9 +#define REG_SL REG_R10 +#define REG_FP REG_R11 +#define REG_IP REG_R12 +#define REG_SP REG_R13 +#define REG_LR REG_R14 +#define REG_PC REG_R15 + +/* The PIC register is usually R10. It can be R9 is stack checking is enabled + * or if the user changes it with -mpic-register on the GCC command line. + */ + +#define REG_PIC REG_R10 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* This structure represents the return state from a system call */ + +#ifdef CONFIG_LIB_SYSCALL +struct xcpt_syscall_s +{ +#ifdef CONFIG_BUILD_KERNEL + uint32_t cpsr; /* The CPSR value */ +#endif + uint32_t sysreturn; /* The return PC */ +}; +#endif + +/* This struct defines the way the registers are stored. We need to save: + * + * 1 CPSR + * 7 Static registers, v1-v7 (aka r4-r10) + * 1 Frame pointer, fp (aka r11) + * 1 Stack pointer, sp (aka r13) + * 1 Return address, lr (aka r14) + * --- + * 11 (XCPTCONTEXT_USER_REG) + * + * On interrupts, we also need to save: + * 4 Volatile registers, a1-a4 (aka r0-r3) + * 1 Scratch Register, ip (aka r12) + *--- + * 5 (XCPTCONTEXT_IRQ_REGS) + * + * For a total of 17 (XCPTCONTEXT_REGS) + */ + +#ifndef __ASSEMBLY__ +struct xcptcontext +{ + /* The following function pointer is non-zero if there are pending signals + * to be processed. + */ + +#ifndef CONFIG_DISABLE_SIGNALS + void *sigdeliver; /* Actual type is sig_deliver_t */ + + /* These are saved copies of LR and CPSR used during signal processing. */ + + uint32_t saved_pc; + uint32_t saved_cpsr; + +# ifdef CONFIG_BUILD_KERNEL + /* This is the saved address to use when returning from a user-space + * signal handler. + */ + + uint32_t sigreturn; + +# endif +#endif + + /* Register save area */ + + uint32_t regs[XCPTCONTEXT_REGS]; + + /* Extra fault address register saved for common paging logic. In the + * case of the pre-fetch abort, this value is the same as regs[REG_R15]; + * For the case of the data abort, this value is the value of the fault + * address register (FAR) at the time of data abort exception. + */ + +#ifdef CONFIG_PAGING + uintptr_t far; +#endif + +#ifdef CONFIG_LIB_SYSCALL + /* The following array holds the return address and the exc_return value + * needed to return from each nested system call. + */ + + uint8_t nsyscalls; + struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST]; +#endif + +#ifdef CONFIG_ARCH_ADDRENV +#ifdef CONFIG_ARCH_STACK_DYNAMIC + /* This array holds the physical address of the level 2 page table used + * to map the thread's stack memory. This array will be initially of + * zeroed and would be back-up up with pages during page fault exception + * handling to support dynamically sized stacks for each thread. + */ + + FAR uintptr_t *ustack[ARCH_STACK_NSECTS]; +#endif + +#ifdef CONFIG_ARCH_KERNEL_STACK + /* In this configuration, all syscalls execute from an internal kernel + * stack. Why? Because when we instantiate and initialize the address + * environment of the new user process, we will temporarily lose the + * address environment of the old user process, including its stack + * contents. The kernel C logic will crash immediately with no valid + * stack in place. + */ + + FAR uint32_t *ustkptr; /* Saved user stack pointer */ + FAR uint32_t *kstack; /* Allocate base of the (aligned) kernel stack */ +#ifndef CONFIG_DISABLE_SIGNALS + FAR uint32_t *kstkptr; /* Saved kernel stack pointer */ +#endif +#endif +#endif +}; +#endif + +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Return the current IRQ state */ + +static inline irqstate_t irqstate(void) +{ + unsigned int cpsr; + + __asm__ __volatile__ + ( + "\tmrs %0, cpsr\n" + : "=r" (cpsr) + : + : "memory" + ); + + return cpsr; +} + +/* Disable IRQs and return the previous IRQ state */ + +static inline irqstate_t irqsave(void) +{ + unsigned int cpsr; + + __asm__ __volatile__ + ( + "\tmrs %0, cpsr\n" + "\tcpsid i\n" +#if defined(CONFIG_ARMV7A_DECODEFIQ) + "\tcpsid f\n" +#endif + : "=r" (cpsr) + : + : "memory" + ); + + return cpsr; +} + +/* Enable IRQs and return the previous IRQ state */ + +static inline irqstate_t irqenable(void) +{ + unsigned int cpsr; + + __asm__ __volatile__ + ( + "\tmrs %0, cpsr\n" + "\tcpsie i\n" +#if defined(CONFIG_ARMV7A_DECODEFIQ) + "\tcpsie f\n" +#endif + : "=r" (cpsr) + : + : "memory" + ); + + return cpsr; +} + +/* Restore saved IRQ & FIQ state */ + +static inline void irqrestore(irqstate_t flags) +{ + __asm__ __volatile__ + ( + "msr cpsr_c, %0" + : + : "r" (flags) + : "memory" + ); +} + +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_ARM_INCLUDE_ARMV7_R_IRQ_H */ diff --git a/arch/arm/include/armv7-r/syscall.h b/arch/arm/include/armv7-r/syscall.h new file mode 100644 index 0000000000..2c0cb7ca37 --- /dev/null +++ b/arch/arm/include/armv7-r/syscall.h @@ -0,0 +1,243 @@ +/**************************************************************************** + * arch/arm/include/armv7-r/syscall.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through include/syscall.h or include/sys/sycall.h + */ + +#ifndef __ARCH_ARM_INCLUDE_ARMV7_R_SYSCALL_H +#define __ARCH_ARM_INCLUDE_ARMV7_R_SYSCALL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SYS_syscall 0x900001 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* SVC with SYS_ call number and no parameters */ + +static inline uintptr_t sys_call0(unsigned int nbr) +{ + register long reg0 __asm__("r0") = (long)(nbr); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and one parameter */ + +static inline uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and two parameters */ + +static inline uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, + uintptr_t parm2) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg2 __asm__("r2") = (long)(parm2); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and three parameters */ + +static inline uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, + uintptr_t parm2, uintptr_t parm3) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg3 __asm__("r3") = (long)(parm3); + register long reg2 __asm__("r2") = (long)(parm2); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), "r"(reg3) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and four parameters */ + +static inline uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, + uintptr_t parm2, uintptr_t parm3, + uintptr_t parm4) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg4 __asm__("r4") = (long)(parm4); + register long reg3 __asm__("r3") = (long)(parm3); + register long reg2 __asm__("r2") = (long)(parm2); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), + "r"(reg3), "r"(reg4) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and five parameters */ + +static inline uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, + uintptr_t parm2, uintptr_t parm3, + uintptr_t parm4, uintptr_t parm5) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg5 __asm__("r5") = (long)(parm5); + register long reg4 __asm__("r4") = (long)(parm4); + register long reg3 __asm__("r3") = (long)(parm3); + register long reg2 __asm__("r2") = (long)(parm2); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), + "r"(reg3), "r"(reg4), "r"(reg5) + : "memory", "r14" + ); + + return reg0; +} + +/* SVC with SYS_ call number and six parameters */ + +static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1, + uintptr_t parm2, uintptr_t parm3, + uintptr_t parm4, uintptr_t parm5, + uintptr_t parm6) +{ + register long reg0 __asm__("r0") = (long)(nbr); + register long reg6 __asm__("r6") = (long)(parm6); + register long reg5 __asm__("r5") = (long)(parm5); + register long reg4 __asm__("r4") = (long)(parm4); + register long reg3 __asm__("r3") = (long)(parm3); + register long reg2 __asm__("r2") = (long)(parm2); + register long reg1 __asm__("r1") = (long)(parm1); + + __asm__ __volatile__ + ( + "svc %1" + : "=r"(reg0) + : "i"(SYS_syscall), "r"(reg0), "r"(reg1), "r"(reg2), + "r"(reg3), "r"(reg4), "r"(reg5), "r"(reg6) + : "memory", "r14" + ); + + return reg0; +} + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_INCLUDE_ARMV7_R_SYSCALL_H */ diff --git a/arch/arm/include/irq.h b/arch/arm/include/irq.h index 5f3389bfa2..0a4ad1bc3e 100644 --- a/arch/arm/include/irq.h +++ b/arch/arm/include/irq.h @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/include/irq.h * - * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011, 2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -58,6 +58,10 @@ #if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) # include +#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \ + defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \ + defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F) +# include #elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \ defined(CONFIG_ARCH_CORTEXM7) # include diff --git a/arch/arm/src/armv7-a/arm_memcpy.S b/arch/arm/src/armv7-a/arm_memcpy.S index f66307a603..48e1294986 100644 --- a/arch/arm/src/armv7-a/arm_memcpy.S +++ b/arch/arm/src/armv7-a/arm_memcpy.S @@ -60,7 +60,6 @@ .global memcpy .syntax unified - .thumb .file "arm_memcpy.S" @@ -149,7 +148,6 @@ MEM_LongCopyTable: ************************************************************************************/ .align 4 - .thumb_func memcpy: push {r14} @@ -160,7 +158,6 @@ memcpy: .align 4 - .thumb_func _do_memcpy: push {r14} diff --git a/arch/arm/src/armv7-r/arm_doirq.c b/arch/arm/src/armv7-r/arm_doirq.c index 1307b1c343..7aa78aa3d2 100644 --- a/arch/arm/src/armv7-r/arm_doirq.c +++ b/arch/arm/src/armv7-r/arm_doirq.c @@ -117,5 +117,6 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) current_regs = NULL; board_autoled_off(LED_INIRQ); +#endif return regs; } diff --git a/arch/arm/src/armv7-r/arm_fpuconfig.S b/arch/arm/src/armv7-r/arm_fpuconfig.S index 3c568d1820..7f81415ad4 100644 --- a/arch/arm/src/armv7-r/arm_fpuconfig.S +++ b/arch/arm/src/armv7-r/arm_fpuconfig.S @@ -40,32 +40,26 @@ #include #include "cp15.h" - .file "arm_fpuconfig.S" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Symbols ****************************************************************************/ .globl arm_fpuconfig -/**************************************************************************** - * Assembly Macros - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - - .text +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_fpuconfig.S" /**************************************************************************** * Public Functions ****************************************************************************/ + .text + /**************************************************************************** * Name: sam_fpuconfig * diff --git a/arch/arm/src/armv7-r/arm_fullcontextrestore.S b/arch/arm/src/armv7-r/arm_fullcontextrestore.S index 48813d192e..58acde0914 100644 --- a/arch/arm/src/armv7-r/arm_fullcontextrestore.S +++ b/arch/arm/src/armv7-r/arm_fullcontextrestore.S @@ -54,22 +54,20 @@ .globl up_fullcontextrestore -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_fullcontextrestore.S" /**************************************************************************** * Public Functions ****************************************************************************/ + .text + /**************************************************************************** * Name: up_fullcontextrestore * diff --git a/arch/arm/src/armv7-r/arm_head.S b/arch/arm/src/armv7-r/arm_head.S index 8975a8b463..2c1bd3bbbd 100644 --- a/arch/arm/src/armv7-r/arm_head.S +++ b/arch/arm/src/armv7-r/arm_head.S @@ -101,6 +101,15 @@ /* Exported symbols */ .global __start /* Power-up/Reset entry point */ + .globl g_idle_topstack /* Top of the initial/IDLE stack */ + +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_head.S" /*************************************************************************** * .text @@ -422,13 +431,12 @@ arm_data_initialize: ***************************************************************************/ /* This global variable is unsigned long g_idle_topstack and is - * exported from here only because of its coupling to LCO + * exported from here only because of its coupling to .Lstackpointer * above. */ .rodata .align 4 - .globl g_idle_topstack .type g_idle_topstack, object g_idle_topstack: .long _ebss+CONFIG_IDLETHREAD_STACKSIZE diff --git a/arch/arm/src/armv7-r/arm_memcpy.S b/arch/arm/src/armv7-r/arm_memcpy.S index ad9878f941..b88a0e0869 100644 --- a/arch/arm/src/armv7-r/arm_memcpy.S +++ b/arch/arm/src/armv7-r/arm_memcpy.S @@ -57,12 +57,15 @@ * Public Symbols ************************************************************************************/ - .global memcpy + .global memcpy - .syntax unified - .thumb - - .file "arm_memcpy.S" +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_memcpy.S" /************************************************************************************ * .text @@ -149,7 +152,6 @@ MEM_LongCopyTable: ************************************************************************************/ .align 4 - .thumb_func memcpy: push {r14} @@ -160,7 +162,6 @@ memcpy: .align 4 - .thumb_func _do_memcpy: push {r14} diff --git a/arch/arm/src/armv7-r/arm_restorefpu.S b/arch/arm/src/armv7-r/arm_restorefpu.S index 751b71f13a..1557986e55 100644 --- a/arch/arm/src/armv7-r/arm_restorefpu.S +++ b/arch/arm/src/armv7-r/arm_restorefpu.S @@ -43,17 +43,19 @@ #ifdef CONFIG_ARCH_FPU - .file "arm_restorefpu.S" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - /************************************************************************************ * Public Symbols ************************************************************************************/ - .globl up_restorefpu + .globl up_restorefpu + +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_restorefpu.S" /************************************************************************************ * Public Functions diff --git a/arch/arm/src/armv7-r/arm_saveusercontext.S b/arch/arm/src/armv7-r/arm_saveusercontext.S index 8723f571fe..19b198077c 100644 --- a/arch/arm/src/armv7-r/arm_saveusercontext.S +++ b/arch/arm/src/armv7-r/arm_saveusercontext.S @@ -40,29 +40,19 @@ #include #include "up_internal.h" - .file "arm_saveusercontext.S" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Symbols ****************************************************************************/ .globl up_saveusercontext -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_saveusercontext.S" /**************************************************************************** * Public Functions diff --git a/arch/arm/src/armv7-r/arm_signal_handler.S b/arch/arm/src/armv7-r/arm_signal_handler.S index f0dcc26284..43f629a3ba 100644 --- a/arch/arm/src/armv7-r/arm_signal_handler.S +++ b/arch/arm/src/armv7-r/arm_signal_handler.S @@ -47,10 +47,13 @@ * File info ****************************************************************************/ - .syntax unified - .thumb - .cpu cortex-r4 - .file "arm_signal_handler.S" +#ifdef CONFIG_ARCH_FPU + .cpu cortex-r4 +#else + .cpu cortex-r4f +#endif + .syntax unified + .file "arm_signal_handler.S" /**************************************************************************** * Private Functions @@ -60,6 +63,8 @@ * Public Functions ****************************************************************************/ + .text + /**************************************************************************** * Name: up_signal_handler * @@ -83,8 +88,6 @@ * ****************************************************************************/ - .text - .thumb_func .globl up_signal_handler .type up_signal_handler, function up_signal_handler: diff --git a/arch/arm/src/armv7-r/arm_syscall.c b/arch/arm/src/armv7-r/arm_syscall.c index 2135f35671..d5bdddfc98 100644 --- a/arch/arm/src/armv7-r/arm_syscall.c +++ b/arch/arm/src/armv7-r/arm_syscall.c @@ -58,11 +58,9 @@ #include #include -#include #include "arm.h" #include "svcall.h" -#include "addrenv.h" #include "up_internal.h" /**************************************************************************** diff --git a/arch/arm/src/tms570/Make.defs b/arch/arm/src/tms570/Make.defs index 3eb06569c7..f361de2f44 100644 --- a/arch/arm/src/tms570/Make.defs +++ b/arch/arm/src/tms570/Make.defs @@ -59,7 +59,7 @@ CMN_CSRCS += up_puts.c up_mdelay.c up_stackframe.c up_udelay.c CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c -CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c +CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_prefetchabort.c CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c diff --git a/arch/arm/src/tms570/chip/tms570_memorymap.h b/arch/arm/src/tms570/chip/tms570_memorymap.h new file mode 100644 index 0000000000..1b5f7d193f --- /dev/null +++ b/arch/arm/src/tms570/chip/tms570_memorymap.h @@ -0,0 +1,49 @@ +/************************************************************************************ + * arch/arm/src/tms570/chip/tms570_memorymap.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_TMS570_CHIP_TMS570_MEMORYMAP_H +#define __ARCH_ARM_SRC_TMS570_CHIP_TMS570_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_TMS570_CHIP_TMS570_MEMORYMAP_H */ diff --git a/arch/arm/src/tms570/tms570_boot.c b/arch/arm/src/tms570/tms570_boot.c index 7f71412609..32651a9f02 100644 --- a/arch/arm/src/tms570/tms570_boot.c +++ b/arch/arm/src/tms570/tms570_boot.c @@ -52,6 +52,14 @@ #include "up_internal.h" #include "up_arch.h" +#include "tms570_boot.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define HIGH_VECTOR_ADDRESS 0xffff0000 + /**************************************************************************** * Public Data ****************************************************************************/ @@ -61,10 +69,6 @@ extern uint32_t _vector_start; /* Beginning of vector block */ extern uint32_t _vector_end; /* End+1 of vector block */ -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -109,26 +113,24 @@ static void tms570_copyvectorblock(void) /* Copy the vectors into ISRAM at the address that will be mapped to the vector * address: * - * SAM_VECTOR_PADDR - Unmapped, physical address of vector table in SRAM - * SAM_VECTOR_VSRAM - Virtual address of vector table in SRAM - * SAM_VECTOR_VADDR - Virtual address of vector table (0x00000000 or - * 0xffff0000) + * _vector_start - Start sourcea ddress of the vector table + * _vector_end - End+1 source address of the vector table + * HIGH_VECTOR_ADDRESS - Destinatino ddress of vector table in RAM */ src = (uint32_t *)&_vector_start; end = (uint32_t *)&_vector_end; - dest = (uint32_t *)SAM_VECTOR_VSRAM; + dest = (uint32_t *)HIGH_VECTOR_ADDRESS; while (src < end) { *dest++ = *src++; } - /* Flush the DCache to assure that the vector data is in physical in ISRAM */ + /* Flush the DCache to assure that the vector data is in physical in RAM */ - arch_clean_dcache((uintptr_t)SAM_VECTOR_VSRAM, - (uintptr_t)SAM_VECTOR_VSRAM + tms570_vectorsize()); -#endif + arch_clean_dcache((uintptr_t)HIGH_VECTOR_ADDRESS, + (uintptr_t)HIGH_VECTOR_ADDRESS + tms570_vectorsize()); } #else @@ -232,14 +234,14 @@ void arm_boot(void) /* Perform board-specific initialization, This must include: * * - Initialization of board-specific memory resources (e.g., SDRAM) - * - Configuration of board specific resources (PIOs, LEDs, etc). + * - Configuration of board specific resources (GPIOs, LEDs, etc). * * NOTE: We must use caution prior to this point to make sure that * the logic does not access any global variables that might lie * in SDRAM. */ - tms570_boardinitialize(); + tms570_board_initialize(); #ifdef CONFIG_BOOT_SDRAM_DATA /* If .data and .bss reside in SDRAM, then initialize the data sections diff --git a/arch/arm/src/tms570/tms570_boot.h b/arch/arm/src/tms570/tms570_boot.h new file mode 100644 index 0000000000..a674095d11 --- /dev/null +++ b/arch/arm/src/tms570/tms570_boot.h @@ -0,0 +1,142 @@ +/************************************************************************************ + * arch/arm/src/samv7/tms570_start.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMV7_SAM_START_H +#define __ARCH_ARM_SRC_SAMV7_SAM_START_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include +#include + +#include "up_internal.h" +#include "chip.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/* g_idle_topstack: _sbss is the start of the BSS region as defined by the linker + * script. _ebss lies at the end of the BSS region. The idle task stack starts at + * the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE thread is + * the thread that the system boots on and, eventually, becomes the IDLE, do + * nothing task that runs only when there is nothing else to run. The heap + * continues from there until the end of memory. g_idle_topstack is a read-only + * variable the provides this computed address. + */ + +EXTERN const uintptr_t g_idle_topstack; + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: tms570_lowsetup + * + * Description: + * Called at the very beginning of _start. Performs low level initialization + * including setup of the console UART. This UART done early so that the serial + * console is available for debugging very early in the boot sequence. + * + ************************************************************************************/ + +void tms570_lowsetup(void); + +/************************************************************************************ + * Name: tms570_boardinitialize + * + * Description: + * All TMS570 architectures must provide the following entry point. This function + * is called near the beginning of _start. This function is called after clocking + * has been configured but before caches have been enabled and before any devices + * have been initialized. .data/.bss memory may or may not have been initialized + * (see the "special precautions" below). + * + * This function must perform low level initialization including + * + * - Initialization of board-specific memory resources (e.g., SDRAM) + * - Configuration of board specific resources (GPIOs, LEDs, etc). + * - Setup of the console UART. This UART done early so that the serial console + * is available for debugging very early in the boot sequence. + * + * Special precautions must be taken if .data/.bss lie in SRAM. in that case, + * the boot logic cannot initialize .data or .bss. The function must then: + * + * - Take precautions to assume that logic does not access any global data that + * might lie in SDRAM. + * - Call the function arm_data_initialize() as soon as SDRAM has been + * properly configured for use. + * + ************************************************************************************/ + +void tms570_board_initialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAMV7_SAM_START_H */ diff --git a/arch/arm/src/tms570/tms570_timerisr.c b/arch/arm/src/tms570/tms570_timerisr.c new file mode 100644 index 0000000000..bd3553b1e9 --- /dev/null +++ b/arch/arm/src/tms570/tms570_timerisr.c @@ -0,0 +1,48 @@ +/**************************************************************************** + * arch/arm/src/tms570/tms570_timerisr.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/