SAMA5: Add slow clock support
This commit is contained in:
parent
140bb640d8
commit
bad3ad58cb
@ -99,7 +99,7 @@ CHIP_ASRCS =
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CHIP_CSRCS = sam_allocateheap.c sam_boot.c sam_clockconfig.c sam_irq.c
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CHIP_CSRCS = sam_allocateheap.c sam_boot.c sam_clockconfig.c sam_irq.c
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CHIP_CSRCS += sam_lowputc.c sam_memories.c sam_pck.c sam_pio.c sam_pmc.c
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CHIP_CSRCS += sam_lowputc.c sam_memories.c sam_pck.c sam_pio.c sam_pmc.c
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CHIP_CSRCS += sam_serial.c sam_timerisr.c
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CHIP_CSRCS += sam_sckc.c sam_serial.c sam_timerisr.c
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# Configuration dependent C and assembly language files
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# Configuration dependent C and assembly language files
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63
arch/arm/src/sama5/chip/sam_sckc.h
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63
arch/arm/src/sama5/chip/sam_sckc.h
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@ -0,0 +1,63 @@
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/************************************************************************************
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* arch/arm/src/sama5/chip/sam_sckc.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_SCKC_H
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#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_SCKC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/sam_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* SCKC Register Offsets ************************************************************/
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#define SAM_SCKC_CR_OFFSET 0x0000 /* Slow Clock Controller Configuration Register */
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/* SCKC Register Addresses **********************************************************/
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#define SAM_SCKC_CR (SAM_SCKCR_VBASE+SAM_SCKC_CR_OFFSET)
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/* SCKC Register Bit Definitions ****************************************************/
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/* Slow Clock Controller Configuration Register */
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#define SCKC_CR_OSCSEL (1 << 3) /* Bit 3: Slow Clock Selector */
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#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_SCKC_H */
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103
arch/arm/src/sama5/sam_sckc.c
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103
arch/arm/src/sama5/sam_sckc.c
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@ -0,0 +1,103 @@
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/****************************************************************************
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* arch/arm/src/sama5/sam_sckc.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/clock.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "sam_sckc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_sckc_enable
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*
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* Description:
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* Enable or disable the slow clock oscillator driver by an external
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* crystal.
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*
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* Input Parameters:
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* enable - True: enable the slow clock, False: disable the slow clock
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void sam_sckc_enable(bool enable)
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{
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uint32_t regval;
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/* Enable / disable the slow clock */
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regval = enable ? SCKC_CR_OSCSEL : 0;
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putreg32(regval, SAM_SCKC_CR);
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/* Wait 5 slow clock cycles for internal resynchronization */
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up_udelay(5 * USEC_PER_SEC / BOARD_SLOWCLK_FREQUENCY);
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}
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91
arch/arm/src/sama5/sam_sckc.h
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91
arch/arm/src/sama5/sam_sckc.h
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@ -0,0 +1,91 @@
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/****************************************************************************
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* arch/arm/src/sama5/sam_sckc.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_SAM_SCKC_H
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#define __ARCH_ARM_SRC_SAMA5_SAM_SCKC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "chip.h"
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#include "chip/sam_sckc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_sckc_enable
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*
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* Description:
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* Enable or disable the slow clock oscillator driver by an external
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* crystal.
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*
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* Input Parameters:
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* enable - True: enable the slow clock, False: disable the slow clock
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void sam_sckc_enable(bool enable);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAMA5_SAM_SCKC_H */
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@ -52,6 +52,11 @@
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* definitions will configure operational clocking.
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* definitions will configure operational clocking.
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*/
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*/
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/* On-board crystal frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
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#if defined(CONFIG_SAMA5_BOOT_SDRAM)
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#if defined(CONFIG_SAMA5_BOOT_SDRAM)
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/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
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/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
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* That bootloader had to have already configured the PLL and SDRAM for proper
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* That bootloader had to have already configured the PLL and SDRAM for proper
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@ -161,7 +161,6 @@
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/* Resulting frequencies */
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/* Resulting frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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/* Resulting frequencies */
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/* Resulting frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
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#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
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/* Resulting frequencies */
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/* Resulting frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
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#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
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#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
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#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
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* the Main clock source in the on-board 12MHz crystal.
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* the Main clock source in the on-board 12MHz crystal.
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*/
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*/
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
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#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
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@ -52,6 +52,11 @@
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* definitions will configure operational clocking.
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* definitions will configure operational clocking.
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*/
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*/
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/* On-board crystal frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
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#if defined(CONFIG_SAMA5_BOOT_SDRAM)
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#if defined(CONFIG_SAMA5_BOOT_SDRAM)
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/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
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/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
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* That bootloader had to have already configured the PLL and SDRAM for proper
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* That bootloader had to have already configured the PLL and SDRAM for proper
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@ -161,7 +161,6 @@
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/* Resulting frequencies */
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/* Resulting frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
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@ -119,7 +119,6 @@
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/* Resulting frequencies */
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/* Resulting frequencies */
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|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
|
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
|
||||||
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
|
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
|
||||||
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
||||||
|
@ -118,7 +118,6 @@
|
|||||||
|
|
||||||
/* Resulting frequencies */
|
/* Resulting frequencies */
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
|
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
|
||||||
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
|
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
|
||||||
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
|
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
|
||||||
|
@ -57,7 +57,6 @@
|
|||||||
* the Main clock source in the on-board 12MHz crystal.
|
* the Main clock source in the on-board 12MHz crystal.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
|
@ -2754,7 +2754,8 @@ Audio Support
|
|||||||
CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers
|
CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers
|
||||||
CONFIG_SAMA5_SSC0_MASTER=y : Master mode
|
CONFIG_SAMA5_SSC0_MASTER=y : Master mode
|
||||||
CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data
|
CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data
|
||||||
CONFIG_SAMA5_SSC0_RX=n : No receiver
|
CONFIG_SAMA5_SSC0_RX=y : Support a receiver
|
||||||
|
CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock from RK input
|
||||||
CONFIG_SAMA5_SSC0_TX=y : Support a transmitter
|
CONFIG_SAMA5_SSC0_TX=y : Support a transmitter
|
||||||
CONFIG_SAMA5_SSC0_TX_MCKDIV=y : Transmitter gets clock from MCK/2
|
CONFIG_SAMA5_SSC0_TX_MCKDIV=y : Transmitter gets clock from MCK/2
|
||||||
CONFIG_SAMA5_SSC0_MCKDIV_SAMPLERATE=48000 : Sampling at 48K samples/sec
|
CONFIG_SAMA5_SSC0_MCKDIV_SAMPLERATE=48000 : Sampling at 48K samples/sec
|
||||||
|
@ -52,6 +52,11 @@
|
|||||||
* definitions will configure operational clocking.
|
* definitions will configure operational clocking.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* On-board crystal frequencies */
|
||||||
|
|
||||||
|
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
||||||
|
#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
|
||||||
|
|
||||||
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
|
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
|
||||||
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
|
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
|
||||||
* That bootloader had to have already configured the PLL and SDRAM for proper
|
* That bootloader had to have already configured the PLL and SDRAM for proper
|
||||||
|
@ -159,7 +159,6 @@
|
|||||||
|
|
||||||
/* Resulting frequencies */
|
/* Resulting frequencies */
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
|
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
|
||||||
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
|
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
|
||||||
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
||||||
|
@ -117,7 +117,6 @@
|
|||||||
|
|
||||||
/* Resulting frequencies */
|
/* Resulting frequencies */
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
|
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
|
||||||
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
|
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
|
||||||
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
|
||||||
|
@ -116,7 +116,6 @@
|
|||||||
|
|
||||||
/* Resulting frequencies */
|
/* Resulting frequencies */
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
|
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
|
||||||
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
|
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
|
||||||
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
|
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
|
||||||
|
@ -57,7 +57,6 @@
|
|||||||
* the Main clock source in the on-board 12MHz crystal.
|
* the Main clock source in the on-board 12MHz crystal.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
|
|
||||||
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
|
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
|
||||||
|
@ -49,10 +49,14 @@
|
|||||||
#include <nuttx/audio/i2s.h>
|
#include <nuttx/audio/i2s.h>
|
||||||
#include <nuttx/audio/wm8904.h>
|
#include <nuttx/audio/wm8904.h>
|
||||||
|
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
|
||||||
#include "up_arch.h"
|
#include "up_arch.h"
|
||||||
#include "sam_pio.h"
|
#include "sam_pio.h"
|
||||||
#include "sam_twi.h"
|
#include "sam_twi.h"
|
||||||
#include "sam_ssc.h"
|
#include "sam_ssc.h"
|
||||||
|
#include "sam_sckc.h"
|
||||||
|
#include "sam_pck.h"
|
||||||
|
|
||||||
#include "sama5d4-ek.h"
|
#include "sama5d4-ek.h"
|
||||||
|
|
||||||
@ -270,6 +274,18 @@ int sam_wm8904_initialize(int minor)
|
|||||||
goto errout_with_i2s;
|
goto errout_with_i2s;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Configure the DAC master clock. This clock is provided by PCK0 (PB26)
|
||||||
|
* that is connected to the WM8904 BCLK/GPIO4 and also drives the SSC
|
||||||
|
* TK0 input clock.
|
||||||
|
*/
|
||||||
|
|
||||||
|
sam_sckc_enable(true);
|
||||||
|
(void)sam_pck_configure(PCK0, BOARD_SLOWCLK_FREQUENCY);
|
||||||
|
|
||||||
|
/* Enable the DAC master clock */
|
||||||
|
|
||||||
|
sam_pck_enable(PCK0, true);
|
||||||
|
|
||||||
/* Configure WM8904 interrupts */
|
/* Configure WM8904 interrupts */
|
||||||
|
|
||||||
sam_pioirq(PIO_INT_WM8904);
|
sam_pioirq(PIO_INT_WM8904);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user