From bae87a0ea1e8bdfd30b4ccedd068170fb8a5ca37 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 9 Jun 2013 10:57:42 -0600 Subject: [PATCH] SAM4L: Mic fixes to get the SAM4L Xplained running. The ostest now passes. --- arch/arm/src/sam34/Kconfig | 2 +- arch/arm/src/sam34/chip/sam4l_bscif.h | 2 +- arch/arm/src/sam34/sam4l_clockconfig.c | 68 +++++++++++++++----------- arch/arm/src/sam34/sam_lowputc.c | 4 +- arch/arm/src/sam34/sam_serial.c | 4 +- 5 files changed, 47 insertions(+), 33 deletions(-) diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig index 7c7d75ba4d..0ac0e3d58b 100644 --- a/arch/arm/src/sam34/Kconfig +++ b/arch/arm/src/sam34/Kconfig @@ -140,7 +140,7 @@ config ARCH_CHIP_SAM4S bool default n -menu "AT91SAM3 Peripheral Support" +menu "AT91SAM3/4 Peripheral Support" config SAM_PICOCACHE bool "PICOCACHE" diff --git a/arch/arm/src/sam34/chip/sam4l_bscif.h b/arch/arm/src/sam34/chip/sam4l_bscif.h index 027426f83d..a1663aa7a6 100644 --- a/arch/arm/src/sam34/chip/sam4l_bscif.h +++ b/arch/arm/src/sam34/chip/sam4l_bscif.h @@ -156,7 +156,7 @@ #define BSCIF_PCLKSR_BOD18SYNRDY (1 << 8) /* Bit 8 */ #define BSCIF_PCLKSR_SSWRDY (1 << 9) /* Bit 9: Buck voltage regulator has stopped switching */ #define BSCIF_PCLKSR_VREGOK (1 << 10) /* Bit 10 */ -#define BSCIF_PCLKSR_RC1MRDY (1 << 10) /* Bit 11 */ +#define BSCIF_PCLKSR_RC1MRDY (1 << 11) /* Bit 11 */ #define BSCIF_PCLKSR_LPBGRDY (1 << 12) /* Bit 12 */ /* Unlock Register */ diff --git a/arch/arm/src/sam34/sam4l_clockconfig.c b/arch/arm/src/sam34/sam4l_clockconfig.c index 0a3c4915b4..1b373b8918 100644 --- a/arch/arm/src/sam34/sam4l_clockconfig.c +++ b/arch/arm/src/sam34/sam4l_clockconfig.c @@ -133,7 +133,7 @@ # error BOARD_OSC0_STARTUP_US is out of range # endif -# ifdef BOARD_OSC0_IS_XTAL +# ifdef BOARD_OSC0_ISXTAL # define SAM_OSC0_MODE_VALUE SCIF_OSCCTRL0_MODE # if BOARD_OSC0_FREQUENCY < 2000000 # define SAM_OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(0) @@ -188,8 +188,8 @@ # error BOARD_OSC32_STARTUP_US is out of range # endif -# ifdef BOARD_OSC32_IS_XTAL -# define SAM_OSC32_MODE_VALUE SCIF_OSCCTRL32_MODE_XTAL +# ifdef BOARD_OSC32_ISXTAL +# define SAM_OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_XTAL # else # define SAM_OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_EXTCLK # endif @@ -915,6 +915,25 @@ static inline void sam_setdividers(void) putreg32(pbdsel, SAM_PM_PBDSEL); } +/**************************************************************************** + * Name: sam_enable_fastwakeup + * + * Description: + * Enable FLASH fast wakeup mode. + * + ****************************************************************************/ + +static inline void sam_enable_fastwakeup(void) +{ + uint32_t regval; + + regval = getreg32(SAM_BPM_PMCON); + regval |= BPM_PMCON_FASTWKUP; + putreg32(BPM_UNLOCK_KEY(0xaa) | BPM_UNLOCK_ADDR(SAM_BPM_PMCON_OFFSET), + SAM_BPM_UNLOCK); + putreg32(regval, SAM_BPM_PMCON); +} + /**************************************************************************** * Name: set_flash_waitstate * @@ -1148,7 +1167,7 @@ static inline void sam_setpsm(uint32_t psm) regval = getreg32(SAM_BPM_PMCON); regval &= ~BPM_PMCON_PS_MASK; - regval |= (psm | BPM_PMCON_PSCM | BPM_PMCON_PSCREQ); + regval |= (psm | BPM_PMCON_PSCM | BPM_PMCON_PSCREQ); /* Then call the RAMFUNC sam_setpsm() to set the new power scaling mode */ @@ -1206,7 +1225,6 @@ static inline void sam_usbclock(void) void sam_clockconfig(void) { - uint32_t regval; uint32_t psm; bool fastwkup; @@ -1248,32 +1266,24 @@ void sam_clockconfig(void) psm = BPM_PMCON_PS2; fastwkup = false; + +#elif BOARD_CPU_FREQUENCY <= FLASH_MAXFREQ_PS1_HSDIS_FWS1 + /* Not high speed mode and frequency is below the thrshold. We can go to + * power scaling mode 1. + */ + + psm = BPM_PMCON_PS1; + +# if BOARD_CPU_FREQUENCY > FLASH_MAXFREQ_PS1_HSDIS_FWS0 + /* We need to enable fast wakeup */ + + sam_enable_fastwakeup() + fastwkup = true; +# endif #else - /* Not high speed mode. Check if we can go to power scaling mode 1. */ + /* Power scaling mode 0, disable high speed mode, no fast wakeup */ - if (BOARD_CPU_FREQUENCY <= FLASH_MAXFREQ_PS1_HSDIS_FWS1) - { - /* Yes.. Do we also need to enable fast wakeup? */ - - psm = BPM_PMCON_PS1; - if (BOARD_CPU_FREQUENCY > FLASH_MAXFREQ_PS1_HSDIS_FWS0) - { - /* Yes.. enable fast wakeup */ - - regval = getreg32(SAM_BPM_PMCON); - regval |= BPM_PMCON_FASTWKUP; - putreg32(BPM_UNLOCK_KEY(0xaa) | BPM_UNLOCK_ADDR(SAM_BPM_PMCON_OFFSET), SAM_BPM_UNLOCK); - putreg32(regval, SAM_BPM_PMCON); - - /* We need to remember that we did this */ - - fastwkup = true; - } - } - else - { - psm = BPM_PMCON_PS0; - } + psm = BPM_PMCON_PS0; #endif /* Enable clock sources: diff --git a/arch/arm/src/sam34/sam_lowputc.c b/arch/arm/src/sam34/sam_lowputc.c index b09e18e2b7..53fe8fae7a 100644 --- a/arch/arm/src/sam34/sam_lowputc.c +++ b/arch/arm/src/sam34/sam_lowputc.c @@ -351,7 +351,9 @@ void sam_lowsetup(void) putreg32(MR_VALUE, SAM_CONSOLE_BASE + SAM_UART_MR_OFFSET); - /* Configure the console baud */ + /* Configure the console baud. NOTE: Oversampling by 8 is not supported. + * This may limit BAUD rates for lower USART clocks. + */ putreg32(((SAM_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) / (SAM_CONSOLE_BAUD << 4)), SAM_CONSOLE_BASE + SAM_UART_BRGR_OFFSET); diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index 72ee144d10..713326e07c 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -959,7 +959,9 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, SAM_UART_MR_OFFSET, regval); - /* Configure the console baud */ + /* Configure the console baud. NOTE: Oversampling by 8 is not supported. + * This may limit BAUD rates for lower USART clocks. + */ regval = (SAM_USART_CLOCK + (priv->baud << 3))/(priv->baud << 4); up_serialout(priv, SAM_UART_BRGR_OFFSET, regval);