arch/xmc4: Added pwm driver
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@ -51,4 +51,8 @@ if(CONFIG_XMC4_USCI_SPI)
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list(APPEND SRCS xmc4_spi.c)
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endif()
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if(CONFIG_XMC4_PWM)
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list(APPEND SRCS xmc4_pwm.c)
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endif()
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target_sources(arch PRIVATE ${SRCS})
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@ -194,6 +194,12 @@ config XMC4_ECAT_P1
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default n
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depends on XMC4_ECAT
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config XMC4_PWM
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bool "Enable Capture Compare Units 4 (CCU4x) for PWM"
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default n
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---help---
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Support CCU4x
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endmenu
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menu "XMC4xxx USIC Configuration"
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@ -620,3 +626,144 @@ config XMC4_USIC2_CHAN1_RX_BUFFER_SIZE
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endmenu # USIC2 Channel 1 Configuration
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endmenu # XMC4xxx USIC Configuration
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menu "XMC4xxx PWM Configuration"
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depends on XMC4_PWM
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config XMC4_CCU40
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bool "Enable CCU40"
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default n
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---help---
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Support CCU40
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config XMC4_CCU40_CC40
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bool "Enable CCU40 Slice 0 (not compatible with tickless)"
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default n
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depends on XMC4_CCU40 && !CONFIG_SCHED_TICKLESS
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---help---
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Support CCU40 CC40, cannot be activated when tickless OS is enabled
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config XMC4_CCU40_CC41
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bool "Enable CCU40 Slice 1"
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default n
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depends on XMC4_CCU40
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---help---
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Support CCU40 CC41
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config XMC4_CCU40_CC42
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bool "Enable CCU40 Slice 2"
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default n
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depends on XMC4_CCU40
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---help---
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Support CCU40 CC42
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config XMC4_CCU40_CC43
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bool "Enable CCU40 Slice 3"
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default n
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depends on XMC4_CCU40
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---help---
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Support CCU40 CC43
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config XMC4_CCU41
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bool "Enable CCU41"
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default n
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---help---
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Support CCU41
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config XMC4_CCU41_CC40
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bool "Enable CCU41 Slice 0 (not compatible with tickless)"
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default n
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depends on XMC4_CCU41 && !CONFIG_SCHED_TICKLESS
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---help---
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Support CCU41 CC40, cannot be activated when tickless OS is enabled
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config XMC4_CCU41_CC41
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bool "Enable CCU41 Slice 1"
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default n
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depends on XMC4_CCU41
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---help---
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Support CCU41 CC41
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config XMC4_CCU41_CC42
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bool "Enable CCU41 Slice 2"
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default n
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depends on XMC4_CCU41
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---help---
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Support CCU41 CC42
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config XMC4_CCU41_CC43
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bool "Enable CCU41 Slice 3"
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default n
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depends on XMC4_CCU41
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---help---
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Support CCU41 CC43
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config XMC4_CCU42
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bool "Enable CCU42"
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default n
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---help---
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Support CCU42
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config XMC4_CCU42_CC40
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bool "Enable CCU42 Slice 0"
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default n
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depends on XMC4_CCU42
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---help---
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Support CCU42 CC40
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config XMC4_CCU42_CC41
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bool "Enable CCU42 Slice 1"
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default n
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depends on XMC4_CCU42
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---help---
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Support CCU42 CC41
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config XMC4_CCU42_CC42
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bool "Enable CCU42 Slice 2"
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default n
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depends on XMC4_CCU42
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---help---
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Support CCU42 CC42
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config XMC4_CCU42_CC43
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bool "Enable CCU42 Slice 3"
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default n
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depends on XMC4_CCU42
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---help---
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Support CCU42 CC43
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config XMC4_CCU43
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bool "Enable CCU43"
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default n
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---help---
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Support CCU43
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config XMC4_CCU43_CC40
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bool "Enable CCU43 Slice 0"
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default n
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depends on XMC4_CCU43
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---help---
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Support CCU43 CC40
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config XMC4_CCU43_CC41
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bool "Enable CCU43 Slice 1"
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default n
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depends on XMC4_CCU43
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---help---
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Support CCU43 CC41
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config XMC4_CCU43_CC42
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bool "Enable CCU43 Slice 2"
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default n
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depends on XMC4_CCU43
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---help---
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Support CCU43 CC42
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config XMC4_CCU43_CC43
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bool "Enable CCU43 Slice 3"
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default n
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depends on XMC4_CCU43
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---help---
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Support CCU43 CC43
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endmenu # XMC4xxx PWM Configuration
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@ -55,3 +55,7 @@ endif
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ifeq ($(CONFIG_XMC4_ECAT),y)
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CHIP_CSRCS += xmc4_ecat.c
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endif
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ifeq ($(CONFIG_XMC4_PWM),y)
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CHIP_CSRCS += xmc4_pwm.c
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endif
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@ -783,9 +783,9 @@
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#define CCU4_GSTAT_S2I_SHIFT (2) /* Bits 2: CC42 IDLE status */
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#define CCU4_GSTAT_S2I_MASK (1 << CCU4_GSTAT_S2I_SHIFT)
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#define CCU4_GSTAT_S3I_SHIFT (3) /* Bits 3: CC43 IDLE status */
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#define CCU4_GSTAT_S3I_MASK (1 << CCU4_GSTAT_SI_SHIFT)
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#define CCU4_GSTAT_S3I_MASK (1 << CCU4_GSTAT_S3I_SHIFT)
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#define CCU4_GSTAT_PRB_SHIFT (8) /* Bits 8: Prescaler Run Bit */
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#define CCU4_GSTAT_PRB_MASK (1 << CCU4_GSTAT_SI_SHIFT)
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#define CCU4_GSTAT_PRB_MASK (1 << CCU4_GSTAT_PRB_SHIFT)
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/* Global Idle Set (GIDLS) */
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@ -72,4 +72,15 @@ uint32_t xmc4_get_coreclock(void);
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uint32_t xmc4_get_periphclock(void);
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/****************************************************************************
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* Name: xmc4_get_ccuclock
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*
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* Description:
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* The ccu clock is either fCPU or fCPU/2, depending on the state
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* of the peripheral divider.
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*
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****************************************************************************/
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uint32_t xmc4_get_ccuclock(void);
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#endif /* __ARCH_ARM_SRC_XMC4_XMC4_CLOCKCONFIG_H */
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@ -186,3 +186,20 @@ uint32_t xmc4_get_periphclock(void)
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return periphclock;
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}
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/****************************************************************************
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* Name: xmc4_get_ccuclock
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*
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* Description:
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* The ccu clock is either fCPU or fCPU/2, depending on the state
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* of the peripheral divider.
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*
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****************************************************************************/
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uint32_t xmc4_get_ccuclock(void)
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{
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uint32_t f_cpu = xmc4_get_coreclock();
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uint32_t f_ccu =
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f_cpu >> ((uint32_t)(getreg32(XMC4_SCU_CCUCLKCR) & SCU_CCUCLKCR_CCUDIV));
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return f_ccu;
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}
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1365
arch/arm/src/xmc4/xmc4_pwm.c
Normal file
1365
arch/arm/src/xmc4/xmc4_pwm.c
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File diff suppressed because it is too large
Load Diff
@ -29,6 +29,10 @@
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#include "chip.h"
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#include <nuttx/timers/pwm.h>
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@ -73,7 +77,7 @@ extern "C"
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*
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****************************************************************************/
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struct pwm_lowerhalf_s *xmc4_pwm_initialize(int timer);
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struct pwm_lowerhalf_s *xmc4_pwminitialize(int module, int slice);
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#undef EXTERN
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#if defined(__cplusplus)
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@ -81,5 +85,4 @@ struct pwm_lowerhalf_s *xmc4_pwm_initialize(int timer);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_XMC4_FTMx_PWM */
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#endif /* __ARCH_ARM_SRC_XMC4_XMC4_PWM_H */
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